zynqmp_dpsub.c 7.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * ZynqMP DisplayPort Subsystem Driver
  4. *
  5. * Copyright (C) 2017 - 2020 Xilinx, Inc.
  6. *
  7. * Authors:
  8. * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
  9. * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. */
  11. #include <linux/clk.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/module.h>
  14. #include <linux/of_reserved_mem.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/pm_runtime.h>
  17. #include <drm/drm_atomic_helper.h>
  18. #include <drm/drm_device.h>
  19. #include <drm/drm_drv.h>
  20. #include <drm/drm_fb_helper.h>
  21. #include <drm/drm_fourcc.h>
  22. #include <drm/drm_gem_cma_helper.h>
  23. #include <drm/drm_gem_framebuffer_helper.h>
  24. #include <drm/drm_managed.h>
  25. #include <drm/drm_mode_config.h>
  26. #include <drm/drm_probe_helper.h>
  27. #include <drm/drm_vblank.h>
  28. #include "zynqmp_disp.h"
  29. #include "zynqmp_dp.h"
  30. #include "zynqmp_dpsub.h"
  31. /* -----------------------------------------------------------------------------
  32. * Dumb Buffer & Framebuffer Allocation
  33. */
  34. static int zynqmp_dpsub_dumb_create(struct drm_file *file_priv,
  35. struct drm_device *drm,
  36. struct drm_mode_create_dumb *args)
  37. {
  38. struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm);
  39. unsigned int pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
  40. /* Enforce the alignment constraints of the DMA engine. */
  41. args->pitch = ALIGN(pitch, dpsub->dma_align);
  42. return drm_gem_cma_dumb_create_internal(file_priv, drm, args);
  43. }
  44. static struct drm_framebuffer *
  45. zynqmp_dpsub_fb_create(struct drm_device *drm, struct drm_file *file_priv,
  46. const struct drm_mode_fb_cmd2 *mode_cmd)
  47. {
  48. struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm);
  49. struct drm_mode_fb_cmd2 cmd = *mode_cmd;
  50. unsigned int i;
  51. /* Enforce the alignment constraints of the DMA engine. */
  52. for (i = 0; i < ARRAY_SIZE(cmd.pitches); ++i)
  53. cmd.pitches[i] = ALIGN(cmd.pitches[i], dpsub->dma_align);
  54. return drm_gem_fb_create(drm, file_priv, &cmd);
  55. }
  56. static const struct drm_mode_config_funcs zynqmp_dpsub_mode_config_funcs = {
  57. .fb_create = zynqmp_dpsub_fb_create,
  58. .atomic_check = drm_atomic_helper_check,
  59. .atomic_commit = drm_atomic_helper_commit,
  60. };
  61. /* -----------------------------------------------------------------------------
  62. * DRM/KMS Driver
  63. */
  64. DEFINE_DRM_GEM_CMA_FOPS(zynqmp_dpsub_drm_fops);
  65. static struct drm_driver zynqmp_dpsub_drm_driver = {
  66. .driver_features = DRIVER_MODESET | DRIVER_GEM |
  67. DRIVER_ATOMIC,
  68. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  69. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  70. .gem_prime_export = drm_gem_prime_export,
  71. .gem_prime_import = drm_gem_prime_import,
  72. .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
  73. .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
  74. .gem_prime_vmap = drm_gem_cma_prime_vmap,
  75. .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
  76. .gem_prime_mmap = drm_gem_cma_prime_mmap,
  77. .gem_free_object_unlocked = drm_gem_cma_free_object,
  78. .gem_vm_ops = &drm_gem_cma_vm_ops,
  79. .dumb_create = zynqmp_dpsub_dumb_create,
  80. .dumb_destroy = drm_gem_dumb_destroy,
  81. .fops = &zynqmp_dpsub_drm_fops,
  82. .name = "zynqmp-dpsub",
  83. .desc = "Xilinx DisplayPort Subsystem Driver",
  84. .date = "20130509",
  85. .major = 1,
  86. .minor = 0,
  87. };
  88. static int zynqmp_dpsub_drm_init(struct zynqmp_dpsub *dpsub)
  89. {
  90. struct drm_device *drm = &dpsub->drm;
  91. int ret;
  92. /* Initialize mode config, vblank and the KMS poll helper. */
  93. ret = drmm_mode_config_init(drm);
  94. if (ret < 0)
  95. return ret;
  96. drm->mode_config.funcs = &zynqmp_dpsub_mode_config_funcs;
  97. drm->mode_config.min_width = 0;
  98. drm->mode_config.min_height = 0;
  99. drm->mode_config.max_width = ZYNQMP_DISP_MAX_WIDTH;
  100. drm->mode_config.max_height = ZYNQMP_DISP_MAX_HEIGHT;
  101. ret = drm_vblank_init(drm, 1);
  102. if (ret)
  103. return ret;
  104. drm->irq_enabled = 1;
  105. drm_kms_helper_poll_init(drm);
  106. /*
  107. * Initialize the DISP and DP components. This will creates planes,
  108. * CRTC, encoder and connector. The DISP should be initialized first as
  109. * the DP encoder needs the CRTC.
  110. */
  111. ret = zynqmp_disp_drm_init(dpsub);
  112. if (ret)
  113. goto err_poll_fini;
  114. ret = zynqmp_dp_drm_init(dpsub);
  115. if (ret)
  116. goto err_poll_fini;
  117. /* Reset all components and register the DRM device. */
  118. drm_mode_config_reset(drm);
  119. ret = drm_dev_register(drm, 0);
  120. if (ret < 0)
  121. goto err_poll_fini;
  122. /* Initialize fbdev generic emulation. */
  123. drm_fbdev_generic_setup(drm, 24);
  124. return 0;
  125. err_poll_fini:
  126. drm_kms_helper_poll_fini(drm);
  127. return ret;
  128. }
  129. /* -----------------------------------------------------------------------------
  130. * Power Management
  131. */
  132. static int __maybe_unused zynqmp_dpsub_suspend(struct device *dev)
  133. {
  134. struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
  135. return drm_mode_config_helper_suspend(&dpsub->drm);
  136. }
  137. static int __maybe_unused zynqmp_dpsub_resume(struct device *dev)
  138. {
  139. struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
  140. return drm_mode_config_helper_resume(&dpsub->drm);
  141. }
  142. static const struct dev_pm_ops zynqmp_dpsub_pm_ops = {
  143. SET_SYSTEM_SLEEP_PM_OPS(zynqmp_dpsub_suspend, zynqmp_dpsub_resume)
  144. };
  145. /* -----------------------------------------------------------------------------
  146. * Probe & Remove
  147. */
  148. static int zynqmp_dpsub_init_clocks(struct zynqmp_dpsub *dpsub)
  149. {
  150. int ret;
  151. dpsub->apb_clk = devm_clk_get(dpsub->dev, "dp_apb_clk");
  152. if (IS_ERR(dpsub->apb_clk))
  153. return PTR_ERR(dpsub->apb_clk);
  154. ret = clk_prepare_enable(dpsub->apb_clk);
  155. if (ret) {
  156. dev_err(dpsub->dev, "failed to enable the APB clock\n");
  157. return ret;
  158. }
  159. return 0;
  160. }
  161. static int zynqmp_dpsub_probe(struct platform_device *pdev)
  162. {
  163. struct zynqmp_dpsub *dpsub;
  164. int ret;
  165. /* Allocate private data. */
  166. dpsub = devm_drm_dev_alloc(&pdev->dev, &zynqmp_dpsub_drm_driver,
  167. struct zynqmp_dpsub, drm);
  168. if (IS_ERR(dpsub))
  169. return PTR_ERR(dpsub);
  170. dpsub->dev = &pdev->dev;
  171. platform_set_drvdata(pdev, dpsub);
  172. dma_set_mask(dpsub->dev, DMA_BIT_MASK(ZYNQMP_DISP_MAX_DMA_BIT));
  173. /* Try the reserved memory. Proceed if there's none. */
  174. of_reserved_mem_device_init(&pdev->dev);
  175. ret = zynqmp_dpsub_init_clocks(dpsub);
  176. if (ret < 0)
  177. goto err_mem;
  178. pm_runtime_enable(&pdev->dev);
  179. /*
  180. * DP should be probed first so that the zynqmp_disp can set the output
  181. * format accordingly.
  182. */
  183. ret = zynqmp_dp_probe(dpsub, &dpsub->drm);
  184. if (ret)
  185. goto err_pm;
  186. ret = zynqmp_disp_probe(dpsub, &dpsub->drm);
  187. if (ret)
  188. goto err_dp;
  189. ret = zynqmp_dpsub_drm_init(dpsub);
  190. if (ret)
  191. goto err_disp;
  192. dev_info(&pdev->dev, "ZynqMP DisplayPort Subsystem driver probed");
  193. return 0;
  194. err_disp:
  195. zynqmp_disp_remove(dpsub);
  196. err_dp:
  197. zynqmp_dp_remove(dpsub);
  198. err_pm:
  199. pm_runtime_disable(&pdev->dev);
  200. clk_disable_unprepare(dpsub->apb_clk);
  201. err_mem:
  202. of_reserved_mem_device_release(&pdev->dev);
  203. return ret;
  204. }
  205. static int zynqmp_dpsub_remove(struct platform_device *pdev)
  206. {
  207. struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
  208. struct drm_device *drm = &dpsub->drm;
  209. drm_dev_unregister(drm);
  210. drm_atomic_helper_shutdown(drm);
  211. drm_kms_helper_poll_fini(drm);
  212. zynqmp_disp_remove(dpsub);
  213. zynqmp_dp_remove(dpsub);
  214. pm_runtime_disable(&pdev->dev);
  215. clk_disable_unprepare(dpsub->apb_clk);
  216. of_reserved_mem_device_release(&pdev->dev);
  217. return 0;
  218. }
  219. static void zynqmp_dpsub_shutdown(struct platform_device *pdev)
  220. {
  221. struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
  222. drm_atomic_helper_shutdown(&dpsub->drm);
  223. }
  224. static const struct of_device_id zynqmp_dpsub_of_match[] = {
  225. { .compatible = "xlnx,zynqmp-dpsub-1.7", },
  226. { /* end of table */ },
  227. };
  228. MODULE_DEVICE_TABLE(of, zynqmp_dpsub_of_match);
  229. static struct platform_driver zynqmp_dpsub_driver = {
  230. .probe = zynqmp_dpsub_probe,
  231. .remove = zynqmp_dpsub_remove,
  232. .shutdown = zynqmp_dpsub_shutdown,
  233. .driver = {
  234. .name = "zynqmp-dpsub",
  235. .pm = &zynqmp_dpsub_pm_ops,
  236. .of_match_table = zynqmp_dpsub_of_match,
  237. },
  238. };
  239. module_platform_driver(zynqmp_dpsub_driver);
  240. MODULE_AUTHOR("Xilinx, Inc.");
  241. MODULE_DESCRIPTION("ZynqMP DP Subsystem Driver");
  242. MODULE_LICENSE("GPL v2");