vs_dc_mmu.h 2.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2020 VeriSilicon Holdings Co., Ltd.
  4. */
  5. #ifndef _VS_DC_MMU_H_
  6. #define _VS_DC_MMU_H_
  7. #include "vs_type.h"
  8. #define DC_INFINITE ((u32)(~0U))
  9. #define DC_ENTRY_TYPE(x) (x & 0xF0)
  10. #define DC_SINGLE_PAGE_NODE_INITIALIZE (~((1U << 8) - 1))
  11. #define DC_INVALID_PHYSICAL_ADDRESS ~0ULL
  12. #define DC_INVALID_ADDRESS ~0U
  13. /* 1k mode */
  14. #define MMU_MTLB_SHIFT 24
  15. #define MMU_STLB_4K_SHIFT 12
  16. #define MMU_MTLB_BITS (32 - MMU_MTLB_SHIFT)
  17. #define MMU_PAGE_4K_BITS MMU_STLB_4K_SHIFT
  18. #define MMU_STLB_4K_BITS (32 - MMU_MTLB_BITS - MMU_PAGE_4K_BITS)
  19. #define MMU_MTLB_ENTRY_NUM (1 << MMU_MTLB_BITS)
  20. #define MMU_MTLB_SIZE (MMU_MTLB_ENTRY_NUM << 2)
  21. #define MMU_STLB_4K_ENTRY_NUM (1 << MMU_STLB_4K_BITS)
  22. #define MMU_STLB_4K_SIZE (MMU_STLB_4K_ENTRY_NUM << 2)
  23. #define MMU_PAGE_4K_SIZE (1 << MMU_STLB_4K_SHIFT)
  24. #define MMU_MTLB_MASK (~((1U << MMU_MTLB_SHIFT)-1))
  25. #define MMU_STLB_4K_MASK ((~0U << MMU_STLB_4K_SHIFT) ^ MMU_MTLB_MASK)
  26. #define MMU_PAGE_4K_MASK (MMU_PAGE_4K_SIZE - 1)
  27. /* page offset definitions. */
  28. #define MMU_OFFSET_4K_BITS (32 - MMU_MTLB_BITS - MMU_STLB_4K_BITS)
  29. #define MMU_OFFSET_4K_MASK ((1U << MMU_OFFSET_4K_BITS) - 1)
  30. #define MMU_MTLB_PRESENT 0x00000001
  31. #define MMU_MTLB_EXCEPTION 0x00000002
  32. #define MMU_MTLB_SECURITY 0x00000010
  33. #define MMU_MTLB_4K_PAGE 0x00000000
  34. typedef enum _dc_mmu_type
  35. {
  36. DC_MMU_USED = (0 << 4),
  37. DC_MMU_SINGLE = (1 << 4),
  38. DC_MMU_FREE = (2 << 4),
  39. }
  40. dc_mmu_type;
  41. typedef enum _dc_mmu_mode
  42. {
  43. MMU_MODE_1K,
  44. MMU_MODE_4K,
  45. }
  46. dc_mmu_mode;
  47. typedef struct _dc_mmu_stlb
  48. {
  49. u32 *logical;
  50. void *physical;
  51. u32 size;
  52. u64 physBase;
  53. u32 pageCount;
  54. }
  55. dc_mmu_stlb, *dc_mmu_stlb_pt;
  56. typedef struct _dc_mmu {
  57. u32 mtlb_bytes;
  58. u64 mtlb_physical;
  59. u32 *mtlb_logical;
  60. void *safe_page_logical;
  61. u64 safe_page_physical;
  62. u32 dynamic_mapping_start;
  63. void *stlbs;
  64. u64 stlb_physicals[MMU_MTLB_ENTRY_NUM];
  65. u32 page_table_entries;
  66. u32 page_table_size;
  67. u32 heap_list;
  68. u32 *map_logical;
  69. bool free_nodes;
  70. void *page_table_mutex;
  71. dc_mmu_mode mode;
  72. void *static_stlb;
  73. }
  74. dc_mmu, *dc_mmu_pt;
  75. int dc_mmu_construct(struct device *dev, dc_mmu_pt *mmu);
  76. int dc_mmu_map_memory(dc_mmu_pt mmu, u64 physical, u32 page_count,
  77. u32 *address, bool continuous, bool security);
  78. int dc_mmu_unmap_memory(dc_mmu_pt mmu, u32 gpu_address, u32 page_count);
  79. #endif /* _VS_DC_MMU_H_ */