v3d_drv.c 9.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /* Copyright (C) 2014-2018 Broadcom */
  3. /**
  4. * DOC: Broadcom V3D Graphics Driver
  5. *
  6. * This driver supports the Broadcom V3D 3.3 and 4.1 OpenGL ES GPUs.
  7. * For V3D 2.x support, see the VC4 driver.
  8. *
  9. * The V3D GPU includes a tiled render (composed of a bin and render
  10. * pipelines), the TFU (texture formatting unit), and the CSD (compute
  11. * shader dispatch).
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/device.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/io.h>
  17. #include <linux/module.h>
  18. #include <linux/of_platform.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/pm_runtime.h>
  21. #include <linux/reset.h>
  22. #include <drm/drm_drv.h>
  23. #include <drm/drm_fb_cma_helper.h>
  24. #include <drm/drm_fb_helper.h>
  25. #include <drm/drm_managed.h>
  26. #include <uapi/drm/v3d_drm.h>
  27. #include "v3d_drv.h"
  28. #include "v3d_regs.h"
  29. #define DRIVER_NAME "v3d"
  30. #define DRIVER_DESC "Broadcom V3D graphics"
  31. #define DRIVER_DATE "20180419"
  32. #define DRIVER_MAJOR 1
  33. #define DRIVER_MINOR 0
  34. #define DRIVER_PATCHLEVEL 0
  35. #ifdef CONFIG_PM
  36. static int v3d_runtime_suspend(struct device *dev)
  37. {
  38. struct drm_device *drm = dev_get_drvdata(dev);
  39. struct v3d_dev *v3d = to_v3d_dev(drm);
  40. v3d_irq_disable(v3d);
  41. clk_disable_unprepare(v3d->clk);
  42. return 0;
  43. }
  44. static int v3d_runtime_resume(struct device *dev)
  45. {
  46. struct drm_device *drm = dev_get_drvdata(dev);
  47. struct v3d_dev *v3d = to_v3d_dev(drm);
  48. int ret;
  49. ret = clk_prepare_enable(v3d->clk);
  50. if (ret != 0)
  51. return ret;
  52. /* XXX: VPM base */
  53. v3d_mmu_set_page_table(v3d);
  54. v3d_irq_enable(v3d);
  55. return 0;
  56. }
  57. #endif
  58. static const struct dev_pm_ops v3d_v3d_pm_ops = {
  59. SET_RUNTIME_PM_OPS(v3d_runtime_suspend, v3d_runtime_resume, NULL)
  60. };
  61. static int v3d_get_param_ioctl(struct drm_device *dev, void *data,
  62. struct drm_file *file_priv)
  63. {
  64. struct v3d_dev *v3d = to_v3d_dev(dev);
  65. struct drm_v3d_get_param *args = data;
  66. int ret;
  67. static const u32 reg_map[] = {
  68. [DRM_V3D_PARAM_V3D_UIFCFG] = V3D_HUB_UIFCFG,
  69. [DRM_V3D_PARAM_V3D_HUB_IDENT1] = V3D_HUB_IDENT1,
  70. [DRM_V3D_PARAM_V3D_HUB_IDENT2] = V3D_HUB_IDENT2,
  71. [DRM_V3D_PARAM_V3D_HUB_IDENT3] = V3D_HUB_IDENT3,
  72. [DRM_V3D_PARAM_V3D_CORE0_IDENT0] = V3D_CTL_IDENT0,
  73. [DRM_V3D_PARAM_V3D_CORE0_IDENT1] = V3D_CTL_IDENT1,
  74. [DRM_V3D_PARAM_V3D_CORE0_IDENT2] = V3D_CTL_IDENT2,
  75. };
  76. if (args->pad != 0)
  77. return -EINVAL;
  78. /* Note that DRM_V3D_PARAM_V3D_CORE0_IDENT0 is 0, so we need
  79. * to explicitly allow it in the "the register in our
  80. * parameter map" check.
  81. */
  82. if (args->param < ARRAY_SIZE(reg_map) &&
  83. (reg_map[args->param] ||
  84. args->param == DRM_V3D_PARAM_V3D_CORE0_IDENT0)) {
  85. u32 offset = reg_map[args->param];
  86. if (args->value != 0)
  87. return -EINVAL;
  88. ret = pm_runtime_get_sync(v3d->drm.dev);
  89. if (ret < 0)
  90. return ret;
  91. if (args->param >= DRM_V3D_PARAM_V3D_CORE0_IDENT0 &&
  92. args->param <= DRM_V3D_PARAM_V3D_CORE0_IDENT2) {
  93. args->value = V3D_CORE_READ(0, offset);
  94. } else {
  95. args->value = V3D_READ(offset);
  96. }
  97. pm_runtime_mark_last_busy(v3d->drm.dev);
  98. pm_runtime_put_autosuspend(v3d->drm.dev);
  99. return 0;
  100. }
  101. switch (args->param) {
  102. case DRM_V3D_PARAM_SUPPORTS_TFU:
  103. args->value = 1;
  104. return 0;
  105. case DRM_V3D_PARAM_SUPPORTS_CSD:
  106. args->value = v3d_has_csd(v3d);
  107. return 0;
  108. case DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH:
  109. args->value = 1;
  110. return 0;
  111. default:
  112. DRM_DEBUG("Unknown parameter %d\n", args->param);
  113. return -EINVAL;
  114. }
  115. }
  116. static int
  117. v3d_open(struct drm_device *dev, struct drm_file *file)
  118. {
  119. struct v3d_dev *v3d = to_v3d_dev(dev);
  120. struct v3d_file_priv *v3d_priv;
  121. struct drm_gpu_scheduler *sched;
  122. int i;
  123. v3d_priv = kzalloc(sizeof(*v3d_priv), GFP_KERNEL);
  124. if (!v3d_priv)
  125. return -ENOMEM;
  126. v3d_priv->v3d = v3d;
  127. for (i = 0; i < V3D_MAX_QUEUES; i++) {
  128. sched = &v3d->queue[i].sched;
  129. drm_sched_entity_init(&v3d_priv->sched_entity[i],
  130. DRM_SCHED_PRIORITY_NORMAL, &sched,
  131. 1, NULL);
  132. }
  133. file->driver_priv = v3d_priv;
  134. return 0;
  135. }
  136. static void
  137. v3d_postclose(struct drm_device *dev, struct drm_file *file)
  138. {
  139. struct v3d_file_priv *v3d_priv = file->driver_priv;
  140. enum v3d_queue q;
  141. for (q = 0; q < V3D_MAX_QUEUES; q++) {
  142. drm_sched_entity_destroy(&v3d_priv->sched_entity[q]);
  143. }
  144. kfree(v3d_priv);
  145. }
  146. DEFINE_DRM_GEM_FOPS(v3d_drm_fops);
  147. /* DRM_AUTH is required on SUBMIT_CL for now, while we don't have GMP
  148. * protection between clients. Note that render nodes would be be
  149. * able to submit CLs that could access BOs from clients authenticated
  150. * with the master node. The TFU doesn't use the GMP, so it would
  151. * need to stay DRM_AUTH until we do buffer size/offset validation.
  152. */
  153. static const struct drm_ioctl_desc v3d_drm_ioctls[] = {
  154. DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CL, v3d_submit_cl_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
  155. DRM_IOCTL_DEF_DRV(V3D_WAIT_BO, v3d_wait_bo_ioctl, DRM_RENDER_ALLOW),
  156. DRM_IOCTL_DEF_DRV(V3D_CREATE_BO, v3d_create_bo_ioctl, DRM_RENDER_ALLOW),
  157. DRM_IOCTL_DEF_DRV(V3D_MMAP_BO, v3d_mmap_bo_ioctl, DRM_RENDER_ALLOW),
  158. DRM_IOCTL_DEF_DRV(V3D_GET_PARAM, v3d_get_param_ioctl, DRM_RENDER_ALLOW),
  159. DRM_IOCTL_DEF_DRV(V3D_GET_BO_OFFSET, v3d_get_bo_offset_ioctl, DRM_RENDER_ALLOW),
  160. DRM_IOCTL_DEF_DRV(V3D_SUBMIT_TFU, v3d_submit_tfu_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
  161. DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CSD, v3d_submit_csd_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
  162. };
  163. static struct drm_driver v3d_drm_driver = {
  164. .driver_features = (DRIVER_GEM |
  165. DRIVER_RENDER |
  166. DRIVER_SYNCOBJ),
  167. .open = v3d_open,
  168. .postclose = v3d_postclose,
  169. #if defined(CONFIG_DEBUG_FS)
  170. .debugfs_init = v3d_debugfs_init,
  171. #endif
  172. .gem_create_object = v3d_create_object,
  173. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  174. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  175. .gem_prime_import_sg_table = v3d_prime_import_sg_table,
  176. .gem_prime_mmap = drm_gem_prime_mmap,
  177. .ioctls = v3d_drm_ioctls,
  178. .num_ioctls = ARRAY_SIZE(v3d_drm_ioctls),
  179. .fops = &v3d_drm_fops,
  180. .name = DRIVER_NAME,
  181. .desc = DRIVER_DESC,
  182. .date = DRIVER_DATE,
  183. .major = DRIVER_MAJOR,
  184. .minor = DRIVER_MINOR,
  185. .patchlevel = DRIVER_PATCHLEVEL,
  186. };
  187. static const struct of_device_id v3d_of_match[] = {
  188. { .compatible = "brcm,7268-v3d" },
  189. { .compatible = "brcm,7278-v3d" },
  190. {},
  191. };
  192. MODULE_DEVICE_TABLE(of, v3d_of_match);
  193. static int
  194. map_regs(struct v3d_dev *v3d, void __iomem **regs, const char *name)
  195. {
  196. struct resource *res =
  197. platform_get_resource_byname(v3d_to_pdev(v3d), IORESOURCE_MEM, name);
  198. *regs = devm_ioremap_resource(v3d->drm.dev, res);
  199. return PTR_ERR_OR_ZERO(*regs);
  200. }
  201. static int v3d_platform_drm_probe(struct platform_device *pdev)
  202. {
  203. struct device *dev = &pdev->dev;
  204. struct drm_device *drm;
  205. struct v3d_dev *v3d;
  206. int ret;
  207. u32 mmu_debug;
  208. u32 ident1;
  209. v3d = devm_drm_dev_alloc(dev, &v3d_drm_driver, struct v3d_dev, drm);
  210. if (IS_ERR(v3d))
  211. return PTR_ERR(v3d);
  212. drm = &v3d->drm;
  213. platform_set_drvdata(pdev, drm);
  214. ret = map_regs(v3d, &v3d->hub_regs, "hub");
  215. if (ret)
  216. return ret;
  217. ret = map_regs(v3d, &v3d->core_regs[0], "core0");
  218. if (ret)
  219. return ret;
  220. mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO);
  221. dev->coherent_dma_mask =
  222. DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH));
  223. v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH);
  224. ident1 = V3D_READ(V3D_HUB_IDENT1);
  225. v3d->ver = (V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_TVER) * 10 +
  226. V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_REV));
  227. v3d->cores = V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_NCORES);
  228. WARN_ON(v3d->cores > 1); /* multicore not yet implemented */
  229. v3d->reset = devm_reset_control_get_exclusive(dev, NULL);
  230. if (IS_ERR(v3d->reset)) {
  231. ret = PTR_ERR(v3d->reset);
  232. if (ret == -EPROBE_DEFER)
  233. return ret;
  234. v3d->reset = NULL;
  235. ret = map_regs(v3d, &v3d->bridge_regs, "bridge");
  236. if (ret) {
  237. dev_err(dev,
  238. "Failed to get reset control or bridge regs\n");
  239. return ret;
  240. }
  241. }
  242. if (v3d->ver < 41) {
  243. ret = map_regs(v3d, &v3d->gca_regs, "gca");
  244. if (ret)
  245. return ret;
  246. }
  247. v3d->mmu_scratch = dma_alloc_wc(dev, 4096, &v3d->mmu_scratch_paddr,
  248. GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
  249. if (!v3d->mmu_scratch) {
  250. dev_err(dev, "Failed to allocate MMU scratch page\n");
  251. return -ENOMEM;
  252. }
  253. pm_runtime_use_autosuspend(dev);
  254. pm_runtime_set_autosuspend_delay(dev, 50);
  255. pm_runtime_enable(dev);
  256. ret = v3d_gem_init(drm);
  257. if (ret)
  258. goto dma_free;
  259. ret = v3d_irq_init(v3d);
  260. if (ret)
  261. goto gem_destroy;
  262. ret = drm_dev_register(drm, 0);
  263. if (ret)
  264. goto irq_disable;
  265. return 0;
  266. irq_disable:
  267. v3d_irq_disable(v3d);
  268. gem_destroy:
  269. v3d_gem_destroy(drm);
  270. dma_free:
  271. dma_free_wc(dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
  272. return ret;
  273. }
  274. static int v3d_platform_drm_remove(struct platform_device *pdev)
  275. {
  276. struct drm_device *drm = platform_get_drvdata(pdev);
  277. struct v3d_dev *v3d = to_v3d_dev(drm);
  278. drm_dev_unregister(drm);
  279. v3d_gem_destroy(drm);
  280. dma_free_wc(v3d->drm.dev, 4096, v3d->mmu_scratch,
  281. v3d->mmu_scratch_paddr);
  282. return 0;
  283. }
  284. static struct platform_driver v3d_platform_driver = {
  285. .probe = v3d_platform_drm_probe,
  286. .remove = v3d_platform_drm_remove,
  287. .driver = {
  288. .name = "v3d",
  289. .of_match_table = v3d_of_match,
  290. },
  291. };
  292. module_platform_driver(v3d_platform_driver);
  293. MODULE_ALIAS("platform:v3d-drm");
  294. MODULE_DESCRIPTION("Broadcom V3D DRM Driver");
  295. MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
  296. MODULE_LICENSE("GPL v2");