gr2d.c 5.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2012-2013, NVIDIA Corporation.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/iommu.h>
  7. #include <linux/module.h>
  8. #include <linux/of_device.h>
  9. #include "drm.h"
  10. #include "gem.h"
  11. #include "gr2d.h"
  12. struct gr2d_soc {
  13. unsigned int version;
  14. };
  15. struct gr2d {
  16. struct tegra_drm_client client;
  17. struct host1x_channel *channel;
  18. struct clk *clk;
  19. const struct gr2d_soc *soc;
  20. DECLARE_BITMAP(addr_regs, GR2D_NUM_REGS);
  21. };
  22. static inline struct gr2d *to_gr2d(struct tegra_drm_client *client)
  23. {
  24. return container_of(client, struct gr2d, client);
  25. }
  26. static int gr2d_init(struct host1x_client *client)
  27. {
  28. struct tegra_drm_client *drm = host1x_to_drm_client(client);
  29. struct drm_device *dev = dev_get_drvdata(client->host);
  30. unsigned long flags = HOST1X_SYNCPT_HAS_BASE;
  31. struct gr2d *gr2d = to_gr2d(drm);
  32. int err;
  33. gr2d->channel = host1x_channel_request(client);
  34. if (!gr2d->channel)
  35. return -ENOMEM;
  36. client->syncpts[0] = host1x_syncpt_request(client, flags);
  37. if (!client->syncpts[0]) {
  38. err = -ENOMEM;
  39. dev_err(client->dev, "failed to request syncpoint: %d\n", err);
  40. goto put;
  41. }
  42. err = host1x_client_iommu_attach(client);
  43. if (err < 0) {
  44. dev_err(client->dev, "failed to attach to domain: %d\n", err);
  45. goto free;
  46. }
  47. err = tegra_drm_register_client(dev->dev_private, drm);
  48. if (err < 0) {
  49. dev_err(client->dev, "failed to register client: %d\n", err);
  50. goto detach;
  51. }
  52. return 0;
  53. detach:
  54. host1x_client_iommu_detach(client);
  55. free:
  56. host1x_syncpt_free(client->syncpts[0]);
  57. put:
  58. host1x_channel_put(gr2d->channel);
  59. return err;
  60. }
  61. static int gr2d_exit(struct host1x_client *client)
  62. {
  63. struct tegra_drm_client *drm = host1x_to_drm_client(client);
  64. struct drm_device *dev = dev_get_drvdata(client->host);
  65. struct tegra_drm *tegra = dev->dev_private;
  66. struct gr2d *gr2d = to_gr2d(drm);
  67. int err;
  68. err = tegra_drm_unregister_client(tegra, drm);
  69. if (err < 0)
  70. return err;
  71. host1x_client_iommu_detach(client);
  72. host1x_syncpt_free(client->syncpts[0]);
  73. host1x_channel_put(gr2d->channel);
  74. return 0;
  75. }
  76. static const struct host1x_client_ops gr2d_client_ops = {
  77. .init = gr2d_init,
  78. .exit = gr2d_exit,
  79. };
  80. static int gr2d_open_channel(struct tegra_drm_client *client,
  81. struct tegra_drm_context *context)
  82. {
  83. struct gr2d *gr2d = to_gr2d(client);
  84. context->channel = host1x_channel_get(gr2d->channel);
  85. if (!context->channel)
  86. return -ENOMEM;
  87. return 0;
  88. }
  89. static void gr2d_close_channel(struct tegra_drm_context *context)
  90. {
  91. host1x_channel_put(context->channel);
  92. }
  93. static int gr2d_is_addr_reg(struct device *dev, u32 class, u32 offset)
  94. {
  95. struct gr2d *gr2d = dev_get_drvdata(dev);
  96. switch (class) {
  97. case HOST1X_CLASS_HOST1X:
  98. if (offset == 0x2b)
  99. return 1;
  100. break;
  101. case HOST1X_CLASS_GR2D:
  102. case HOST1X_CLASS_GR2D_SB:
  103. if (offset >= GR2D_NUM_REGS)
  104. break;
  105. if (test_bit(offset, gr2d->addr_regs))
  106. return 1;
  107. break;
  108. }
  109. return 0;
  110. }
  111. static int gr2d_is_valid_class(u32 class)
  112. {
  113. return (class == HOST1X_CLASS_GR2D ||
  114. class == HOST1X_CLASS_GR2D_SB);
  115. }
  116. static const struct tegra_drm_client_ops gr2d_ops = {
  117. .open_channel = gr2d_open_channel,
  118. .close_channel = gr2d_close_channel,
  119. .is_addr_reg = gr2d_is_addr_reg,
  120. .is_valid_class = gr2d_is_valid_class,
  121. .submit = tegra_drm_submit,
  122. };
  123. static const struct gr2d_soc tegra20_gr2d_soc = {
  124. .version = 0x20,
  125. };
  126. static const struct gr2d_soc tegra30_gr2d_soc = {
  127. .version = 0x30,
  128. };
  129. static const struct of_device_id gr2d_match[] = {
  130. { .compatible = "nvidia,tegra30-gr2d", .data = &tegra20_gr2d_soc },
  131. { .compatible = "nvidia,tegra20-gr2d", .data = &tegra30_gr2d_soc },
  132. { },
  133. };
  134. MODULE_DEVICE_TABLE(of, gr2d_match);
  135. static const u32 gr2d_addr_regs[] = {
  136. GR2D_UA_BASE_ADDR,
  137. GR2D_VA_BASE_ADDR,
  138. GR2D_PAT_BASE_ADDR,
  139. GR2D_DSTA_BASE_ADDR,
  140. GR2D_DSTB_BASE_ADDR,
  141. GR2D_DSTC_BASE_ADDR,
  142. GR2D_SRCA_BASE_ADDR,
  143. GR2D_SRCB_BASE_ADDR,
  144. GR2D_PATBASE_ADDR,
  145. GR2D_SRC_BASE_ADDR_SB,
  146. GR2D_DSTA_BASE_ADDR_SB,
  147. GR2D_DSTB_BASE_ADDR_SB,
  148. GR2D_UA_BASE_ADDR_SB,
  149. GR2D_VA_BASE_ADDR_SB,
  150. };
  151. static int gr2d_probe(struct platform_device *pdev)
  152. {
  153. struct device *dev = &pdev->dev;
  154. struct host1x_syncpt **syncpts;
  155. struct gr2d *gr2d;
  156. unsigned int i;
  157. int err;
  158. gr2d = devm_kzalloc(dev, sizeof(*gr2d), GFP_KERNEL);
  159. if (!gr2d)
  160. return -ENOMEM;
  161. gr2d->soc = of_device_get_match_data(dev);
  162. syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL);
  163. if (!syncpts)
  164. return -ENOMEM;
  165. gr2d->clk = devm_clk_get(dev, NULL);
  166. if (IS_ERR(gr2d->clk)) {
  167. dev_err(dev, "cannot get clock\n");
  168. return PTR_ERR(gr2d->clk);
  169. }
  170. err = clk_prepare_enable(gr2d->clk);
  171. if (err) {
  172. dev_err(dev, "cannot turn on clock\n");
  173. return err;
  174. }
  175. INIT_LIST_HEAD(&gr2d->client.base.list);
  176. gr2d->client.base.ops = &gr2d_client_ops;
  177. gr2d->client.base.dev = dev;
  178. gr2d->client.base.class = HOST1X_CLASS_GR2D;
  179. gr2d->client.base.syncpts = syncpts;
  180. gr2d->client.base.num_syncpts = 1;
  181. INIT_LIST_HEAD(&gr2d->client.list);
  182. gr2d->client.version = gr2d->soc->version;
  183. gr2d->client.ops = &gr2d_ops;
  184. err = host1x_client_register(&gr2d->client.base);
  185. if (err < 0) {
  186. dev_err(dev, "failed to register host1x client: %d\n", err);
  187. clk_disable_unprepare(gr2d->clk);
  188. return err;
  189. }
  190. /* initialize address register map */
  191. for (i = 0; i < ARRAY_SIZE(gr2d_addr_regs); i++)
  192. set_bit(gr2d_addr_regs[i], gr2d->addr_regs);
  193. platform_set_drvdata(pdev, gr2d);
  194. return 0;
  195. }
  196. static int gr2d_remove(struct platform_device *pdev)
  197. {
  198. struct gr2d *gr2d = platform_get_drvdata(pdev);
  199. int err;
  200. err = host1x_client_unregister(&gr2d->client.base);
  201. if (err < 0) {
  202. dev_err(&pdev->dev, "failed to unregister host1x client: %d\n",
  203. err);
  204. return err;
  205. }
  206. clk_disable_unprepare(gr2d->clk);
  207. return 0;
  208. }
  209. struct platform_driver tegra_gr2d_driver = {
  210. .driver = {
  211. .name = "tegra-gr2d",
  212. .of_match_table = gr2d_match,
  213. },
  214. .probe = gr2d_probe,
  215. .remove = gr2d_remove,
  216. };