sun4i_frontend.h 5.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017 Free Electrons
  4. * Maxime Ripard <maxime.ripard@free-electrons.com>
  5. */
  6. #ifndef _SUN4I_FRONTEND_H_
  7. #define _SUN4I_FRONTEND_H_
  8. #include <linux/list.h>
  9. #define SUN4I_FRONTEND_EN_REG 0x000
  10. #define SUN4I_FRONTEND_EN_EN BIT(0)
  11. #define SUN4I_FRONTEND_FRM_CTRL_REG 0x004
  12. #define SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL BIT(23)
  13. #define SUN4I_FRONTEND_FRM_CTRL_FRM_START BIT(16)
  14. #define SUN4I_FRONTEND_FRM_CTRL_COEF_RDY BIT(1)
  15. #define SUN4I_FRONTEND_FRM_CTRL_REG_RDY BIT(0)
  16. #define SUN4I_FRONTEND_BYPASS_REG 0x008
  17. #define SUN4I_FRONTEND_BYPASS_CSC_EN BIT(1)
  18. #define SUN4I_FRONTEND_BUF_ADDR0_REG 0x020
  19. #define SUN4I_FRONTEND_BUF_ADDR1_REG 0x024
  20. #define SUN4I_FRONTEND_BUF_ADDR2_REG 0x028
  21. #define SUN4I_FRONTEND_TB_OFF0_REG 0x030
  22. #define SUN4I_FRONTEND_TB_OFF1_REG 0x034
  23. #define SUN4I_FRONTEND_TB_OFF2_REG 0x038
  24. #define SUN4I_FRONTEND_TB_OFF_X1(x1) ((x1) << 16)
  25. #define SUN4I_FRONTEND_TB_OFF_Y0(y0) ((y0) << 8)
  26. #define SUN4I_FRONTEND_TB_OFF_X0(x0) (x0)
  27. #define SUN4I_FRONTEND_LINESTRD0_REG 0x040
  28. #define SUN4I_FRONTEND_LINESTRD1_REG 0x044
  29. #define SUN4I_FRONTEND_LINESTRD2_REG 0x048
  30. /*
  31. * In tiled mode, the stride is defined as the distance between the start of the
  32. * end line of the current tile and the start of the first line in the next
  33. * vertical tile.
  34. *
  35. * Tiles are represented in row-major order, thus the end line of current tile
  36. * starts at: 31 * 32 (31 lines of 32 cols), the next vertical tile starts at:
  37. * 32-bit-aligned-width * 32 and the distance is:
  38. * 32 * (32-bit-aligned-width - 31).
  39. */
  40. #define SUN4I_FRONTEND_LINESTRD_TILED(stride) (((stride) - 31) * 32)
  41. #define SUN4I_FRONTEND_INPUT_FMT_REG 0x04c
  42. #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PLANAR (0 << 8)
  43. #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED (1 << 8)
  44. #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR (2 << 8)
  45. #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_MB32_PLANAR (4 << 8)
  46. #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_MB32_SEMIPLANAR (6 << 8)
  47. #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV444 (0 << 4)
  48. #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422 (1 << 4)
  49. #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV420 (2 << 4)
  50. #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV411 (3 << 4)
  51. #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB (5 << 4)
  52. #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UYVY 0
  53. #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YUYV 1
  54. #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VYUY 2
  55. #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YVYU 3
  56. #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UV 0
  57. #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VU 1
  58. #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_BGRX 0
  59. #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_XRGB 1
  60. #define SUN4I_FRONTEND_OUTPUT_FMT_REG 0x05c
  61. #define SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT_BGRX8888 1
  62. #define SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT_XRGB8888 2
  63. #define SUN4I_FRONTEND_CSC_COEF_REG(c) (0x070 + (0x4 * (c)))
  64. #define SUN4I_FRONTEND_CH0_INSIZE_REG 0x100
  65. #define SUN4I_FRONTEND_INSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1)))
  66. #define SUN4I_FRONTEND_CH0_OUTSIZE_REG 0x104
  67. #define SUN4I_FRONTEND_OUTSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1)))
  68. #define SUN4I_FRONTEND_CH0_HORZFACT_REG 0x108
  69. #define SUN4I_FRONTEND_HORZFACT(i, f) (((i) << 16) | (f))
  70. #define SUN4I_FRONTEND_CH0_VERTFACT_REG 0x10c
  71. #define SUN4I_FRONTEND_VERTFACT(i, f) (((i) << 16) | (f))
  72. #define SUN4I_FRONTEND_CH0_HORZPHASE_REG 0x110
  73. #define SUN4I_FRONTEND_CH0_VERTPHASE0_REG 0x114
  74. #define SUN4I_FRONTEND_CH0_VERTPHASE1_REG 0x118
  75. #define SUN4I_FRONTEND_CH1_INSIZE_REG 0x200
  76. #define SUN4I_FRONTEND_CH1_OUTSIZE_REG 0x204
  77. #define SUN4I_FRONTEND_CH1_HORZFACT_REG 0x208
  78. #define SUN4I_FRONTEND_CH1_VERTFACT_REG 0x20c
  79. #define SUN4I_FRONTEND_CH1_HORZPHASE_REG 0x210
  80. #define SUN4I_FRONTEND_CH1_VERTPHASE0_REG 0x214
  81. #define SUN4I_FRONTEND_CH1_VERTPHASE1_REG 0x218
  82. #define SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i) (0x400 + i * 4)
  83. #define SUN4I_FRONTEND_CH0_HORZCOEF1_REG(i) (0x480 + i * 4)
  84. #define SUN4I_FRONTEND_CH0_VERTCOEF_REG(i) (0x500 + i * 4)
  85. #define SUN4I_FRONTEND_CH1_HORZCOEF0_REG(i) (0x600 + i * 4)
  86. #define SUN4I_FRONTEND_CH1_HORZCOEF1_REG(i) (0x680 + i * 4)
  87. #define SUN4I_FRONTEND_CH1_VERTCOEF_REG(i) (0x700 + i * 4)
  88. struct clk;
  89. struct device_node;
  90. struct drm_plane;
  91. struct regmap;
  92. struct reset_control;
  93. struct sun4i_frontend_data {
  94. bool has_coef_access_ctrl;
  95. bool has_coef_rdy;
  96. u32 ch_phase[2];
  97. };
  98. struct sun4i_frontend {
  99. struct list_head list;
  100. struct device *dev;
  101. struct device_node *node;
  102. struct clk *bus_clk;
  103. struct clk *mod_clk;
  104. struct clk *ram_clk;
  105. struct regmap *regs;
  106. struct reset_control *reset;
  107. const struct sun4i_frontend_data *data;
  108. };
  109. extern const struct of_device_id sun4i_frontend_of_table[];
  110. extern const u32 sunxi_bt601_yuv2rgb_coef[12];
  111. int sun4i_frontend_init(struct sun4i_frontend *frontend);
  112. void sun4i_frontend_exit(struct sun4i_frontend *frontend);
  113. int sun4i_frontend_enable(struct sun4i_frontend *frontend);
  114. void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend,
  115. struct drm_plane *plane);
  116. void sun4i_frontend_update_coord(struct sun4i_frontend *frontend,
  117. struct drm_plane *plane);
  118. int sun4i_frontend_update_formats(struct sun4i_frontend *frontend,
  119. struct drm_plane *plane, uint32_t out_fmt);
  120. bool sun4i_frontend_format_is_supported(uint32_t fmt, uint64_t modifier);
  121. #endif /* _SUN4I_FRONTEND_H_ */