shmob_drm_crtc.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * shmob_drm_crtc.c -- SH Mobile DRM CRTCs
  4. *
  5. * Copyright (C) 2012 Renesas Electronics Corporation
  6. *
  7. * Laurent Pinchart (laurent.pinchart@ideasonboard.com)
  8. */
  9. #include <linux/backlight.h>
  10. #include <linux/clk.h>
  11. #include <drm/drm_crtc.h>
  12. #include <drm/drm_crtc_helper.h>
  13. #include <drm/drm_fb_cma_helper.h>
  14. #include <drm/drm_fourcc.h>
  15. #include <drm/drm_gem_cma_helper.h>
  16. #include <drm/drm_plane_helper.h>
  17. #include <drm/drm_probe_helper.h>
  18. #include <drm/drm_simple_kms_helper.h>
  19. #include <drm/drm_vblank.h>
  20. #include "shmob_drm_backlight.h"
  21. #include "shmob_drm_crtc.h"
  22. #include "shmob_drm_drv.h"
  23. #include "shmob_drm_kms.h"
  24. #include "shmob_drm_plane.h"
  25. #include "shmob_drm_regs.h"
  26. /*
  27. * TODO: panel support
  28. */
  29. /* -----------------------------------------------------------------------------
  30. * Clock management
  31. */
  32. static int shmob_drm_clk_on(struct shmob_drm_device *sdev)
  33. {
  34. int ret;
  35. if (sdev->clock) {
  36. ret = clk_prepare_enable(sdev->clock);
  37. if (ret < 0)
  38. return ret;
  39. }
  40. return 0;
  41. }
  42. static void shmob_drm_clk_off(struct shmob_drm_device *sdev)
  43. {
  44. if (sdev->clock)
  45. clk_disable_unprepare(sdev->clock);
  46. }
  47. /* -----------------------------------------------------------------------------
  48. * CRTC
  49. */
  50. static void shmob_drm_crtc_setup_geometry(struct shmob_drm_crtc *scrtc)
  51. {
  52. struct drm_crtc *crtc = &scrtc->crtc;
  53. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  54. const struct shmob_drm_interface_data *idata = &sdev->pdata->iface;
  55. const struct drm_display_mode *mode = &crtc->mode;
  56. u32 value;
  57. value = sdev->ldmt1r
  58. | ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? 0 : LDMT1R_VPOL)
  59. | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? 0 : LDMT1R_HPOL)
  60. | ((idata->flags & SHMOB_DRM_IFACE_FL_DWPOL) ? LDMT1R_DWPOL : 0)
  61. | ((idata->flags & SHMOB_DRM_IFACE_FL_DIPOL) ? LDMT1R_DIPOL : 0)
  62. | ((idata->flags & SHMOB_DRM_IFACE_FL_DAPOL) ? LDMT1R_DAPOL : 0)
  63. | ((idata->flags & SHMOB_DRM_IFACE_FL_HSCNT) ? LDMT1R_HSCNT : 0)
  64. | ((idata->flags & SHMOB_DRM_IFACE_FL_DWCNT) ? LDMT1R_DWCNT : 0);
  65. lcdc_write(sdev, LDMT1R, value);
  66. if (idata->interface >= SHMOB_DRM_IFACE_SYS8A &&
  67. idata->interface <= SHMOB_DRM_IFACE_SYS24) {
  68. /* Setup SYS bus. */
  69. value = (idata->sys.cs_setup << LDMT2R_CSUP_SHIFT)
  70. | (idata->sys.vsync_active_high ? LDMT2R_RSV : 0)
  71. | (idata->sys.vsync_dir_input ? LDMT2R_VSEL : 0)
  72. | (idata->sys.write_setup << LDMT2R_WCSC_SHIFT)
  73. | (idata->sys.write_cycle << LDMT2R_WCEC_SHIFT)
  74. | (idata->sys.write_strobe << LDMT2R_WCLW_SHIFT);
  75. lcdc_write(sdev, LDMT2R, value);
  76. value = (idata->sys.read_latch << LDMT3R_RDLC_SHIFT)
  77. | (idata->sys.read_setup << LDMT3R_RCSC_SHIFT)
  78. | (idata->sys.read_cycle << LDMT3R_RCEC_SHIFT)
  79. | (idata->sys.read_strobe << LDMT3R_RCLW_SHIFT);
  80. lcdc_write(sdev, LDMT3R, value);
  81. }
  82. value = ((mode->hdisplay / 8) << 16) /* HDCN */
  83. | (mode->htotal / 8); /* HTCN */
  84. lcdc_write(sdev, LDHCNR, value);
  85. value = (((mode->hsync_end - mode->hsync_start) / 8) << 16) /* HSYNW */
  86. | (mode->hsync_start / 8); /* HSYNP */
  87. lcdc_write(sdev, LDHSYNR, value);
  88. value = ((mode->hdisplay & 7) << 24) | ((mode->htotal & 7) << 16)
  89. | (((mode->hsync_end - mode->hsync_start) & 7) << 8)
  90. | (mode->hsync_start & 7);
  91. lcdc_write(sdev, LDHAJR, value);
  92. value = ((mode->vdisplay) << 16) /* VDLN */
  93. | mode->vtotal; /* VTLN */
  94. lcdc_write(sdev, LDVLNR, value);
  95. value = ((mode->vsync_end - mode->vsync_start) << 16) /* VSYNW */
  96. | mode->vsync_start; /* VSYNP */
  97. lcdc_write(sdev, LDVSYNR, value);
  98. }
  99. static void shmob_drm_crtc_start_stop(struct shmob_drm_crtc *scrtc, bool start)
  100. {
  101. struct shmob_drm_device *sdev = scrtc->crtc.dev->dev_private;
  102. u32 value;
  103. value = lcdc_read(sdev, LDCNT2R);
  104. if (start)
  105. lcdc_write(sdev, LDCNT2R, value | LDCNT2R_DO);
  106. else
  107. lcdc_write(sdev, LDCNT2R, value & ~LDCNT2R_DO);
  108. /* Wait until power is applied/stopped. */
  109. while (1) {
  110. value = lcdc_read(sdev, LDPMR) & LDPMR_LPS;
  111. if ((start && value) || (!start && !value))
  112. break;
  113. cpu_relax();
  114. }
  115. if (!start) {
  116. /* Stop the dot clock. */
  117. lcdc_write(sdev, LDDCKSTPR, LDDCKSTPR_DCKSTP);
  118. }
  119. }
  120. /*
  121. * shmob_drm_crtc_start - Configure and start the LCDC
  122. * @scrtc: the SH Mobile CRTC
  123. *
  124. * Configure and start the LCDC device. External devices (clocks, MERAM, panels,
  125. * ...) are not touched by this function.
  126. */
  127. static void shmob_drm_crtc_start(struct shmob_drm_crtc *scrtc)
  128. {
  129. struct drm_crtc *crtc = &scrtc->crtc;
  130. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  131. const struct shmob_drm_interface_data *idata = &sdev->pdata->iface;
  132. const struct shmob_drm_format_info *format;
  133. struct drm_device *dev = sdev->ddev;
  134. struct drm_plane *plane;
  135. u32 value;
  136. int ret;
  137. if (scrtc->started)
  138. return;
  139. format = shmob_drm_format_info(crtc->primary->fb->format->format);
  140. if (WARN_ON(format == NULL))
  141. return;
  142. /* Enable clocks before accessing the hardware. */
  143. ret = shmob_drm_clk_on(sdev);
  144. if (ret < 0)
  145. return;
  146. /* Reset and enable the LCDC. */
  147. lcdc_write(sdev, LDCNT2R, lcdc_read(sdev, LDCNT2R) | LDCNT2R_BR);
  148. lcdc_wait_bit(sdev, LDCNT2R, LDCNT2R_BR, 0);
  149. lcdc_write(sdev, LDCNT2R, LDCNT2R_ME);
  150. /* Stop the LCDC first and disable all interrupts. */
  151. shmob_drm_crtc_start_stop(scrtc, false);
  152. lcdc_write(sdev, LDINTR, 0);
  153. /* Configure power supply, dot clocks and start them. */
  154. lcdc_write(sdev, LDPMR, 0);
  155. value = sdev->lddckr;
  156. if (idata->clk_div) {
  157. /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
  158. * denominator.
  159. */
  160. lcdc_write(sdev, LDDCKPAT1R, 0);
  161. lcdc_write(sdev, LDDCKPAT2R, (1 << (idata->clk_div / 2)) - 1);
  162. if (idata->clk_div == 1)
  163. value |= LDDCKR_MOSEL;
  164. else
  165. value |= idata->clk_div;
  166. }
  167. lcdc_write(sdev, LDDCKR, value);
  168. lcdc_write(sdev, LDDCKSTPR, 0);
  169. lcdc_wait_bit(sdev, LDDCKSTPR, ~0, 0);
  170. /* TODO: Setup SYS panel */
  171. /* Setup geometry, format, frame buffer memory and operation mode. */
  172. shmob_drm_crtc_setup_geometry(scrtc);
  173. /* TODO: Handle YUV colorspaces. Hardcode REC709 for now. */
  174. lcdc_write(sdev, LDDFR, format->lddfr | LDDFR_CF1);
  175. lcdc_write(sdev, LDMLSR, scrtc->line_size);
  176. lcdc_write(sdev, LDSA1R, scrtc->dma[0]);
  177. if (format->yuv)
  178. lcdc_write(sdev, LDSA2R, scrtc->dma[1]);
  179. lcdc_write(sdev, LDSM1R, 0);
  180. /* Word and long word swap. */
  181. switch (format->fourcc) {
  182. case DRM_FORMAT_RGB565:
  183. case DRM_FORMAT_NV21:
  184. case DRM_FORMAT_NV61:
  185. case DRM_FORMAT_NV42:
  186. value = LDDDSR_LS | LDDDSR_WS;
  187. break;
  188. case DRM_FORMAT_RGB888:
  189. case DRM_FORMAT_NV12:
  190. case DRM_FORMAT_NV16:
  191. case DRM_FORMAT_NV24:
  192. value = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
  193. break;
  194. case DRM_FORMAT_ARGB8888:
  195. default:
  196. value = LDDDSR_LS;
  197. break;
  198. }
  199. lcdc_write(sdev, LDDDSR, value);
  200. /* Setup planes. */
  201. drm_for_each_legacy_plane(plane, dev) {
  202. if (plane->crtc == crtc)
  203. shmob_drm_plane_setup(plane);
  204. }
  205. /* Enable the display output. */
  206. lcdc_write(sdev, LDCNT1R, LDCNT1R_DE);
  207. shmob_drm_crtc_start_stop(scrtc, true);
  208. scrtc->started = true;
  209. }
  210. static void shmob_drm_crtc_stop(struct shmob_drm_crtc *scrtc)
  211. {
  212. struct drm_crtc *crtc = &scrtc->crtc;
  213. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  214. if (!scrtc->started)
  215. return;
  216. /* Stop the LCDC. */
  217. shmob_drm_crtc_start_stop(scrtc, false);
  218. /* Disable the display output. */
  219. lcdc_write(sdev, LDCNT1R, 0);
  220. /* Stop clocks. */
  221. shmob_drm_clk_off(sdev);
  222. scrtc->started = false;
  223. }
  224. void shmob_drm_crtc_suspend(struct shmob_drm_crtc *scrtc)
  225. {
  226. shmob_drm_crtc_stop(scrtc);
  227. }
  228. void shmob_drm_crtc_resume(struct shmob_drm_crtc *scrtc)
  229. {
  230. if (scrtc->dpms != DRM_MODE_DPMS_ON)
  231. return;
  232. shmob_drm_crtc_start(scrtc);
  233. }
  234. static void shmob_drm_crtc_compute_base(struct shmob_drm_crtc *scrtc,
  235. int x, int y)
  236. {
  237. struct drm_crtc *crtc = &scrtc->crtc;
  238. struct drm_framebuffer *fb = crtc->primary->fb;
  239. struct drm_gem_cma_object *gem;
  240. unsigned int bpp;
  241. bpp = scrtc->format->yuv ? 8 : scrtc->format->bpp;
  242. gem = drm_fb_cma_get_gem_obj(fb, 0);
  243. scrtc->dma[0] = gem->paddr + fb->offsets[0]
  244. + y * fb->pitches[0] + x * bpp / 8;
  245. if (scrtc->format->yuv) {
  246. bpp = scrtc->format->bpp - 8;
  247. gem = drm_fb_cma_get_gem_obj(fb, 1);
  248. scrtc->dma[1] = gem->paddr + fb->offsets[1]
  249. + y / (bpp == 4 ? 2 : 1) * fb->pitches[1]
  250. + x * (bpp == 16 ? 2 : 1);
  251. }
  252. }
  253. static void shmob_drm_crtc_update_base(struct shmob_drm_crtc *scrtc)
  254. {
  255. struct drm_crtc *crtc = &scrtc->crtc;
  256. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  257. shmob_drm_crtc_compute_base(scrtc, crtc->x, crtc->y);
  258. lcdc_write_mirror(sdev, LDSA1R, scrtc->dma[0]);
  259. if (scrtc->format->yuv)
  260. lcdc_write_mirror(sdev, LDSA2R, scrtc->dma[1]);
  261. lcdc_write(sdev, LDRCNTR, lcdc_read(sdev, LDRCNTR) ^ LDRCNTR_MRS);
  262. }
  263. #define to_shmob_crtc(c) container_of(c, struct shmob_drm_crtc, crtc)
  264. static void shmob_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
  265. {
  266. struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
  267. if (scrtc->dpms == mode)
  268. return;
  269. if (mode == DRM_MODE_DPMS_ON)
  270. shmob_drm_crtc_start(scrtc);
  271. else
  272. shmob_drm_crtc_stop(scrtc);
  273. scrtc->dpms = mode;
  274. }
  275. static void shmob_drm_crtc_mode_prepare(struct drm_crtc *crtc)
  276. {
  277. shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
  278. }
  279. static int shmob_drm_crtc_mode_set(struct drm_crtc *crtc,
  280. struct drm_display_mode *mode,
  281. struct drm_display_mode *adjusted_mode,
  282. int x, int y,
  283. struct drm_framebuffer *old_fb)
  284. {
  285. struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
  286. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  287. const struct shmob_drm_format_info *format;
  288. format = shmob_drm_format_info(crtc->primary->fb->format->format);
  289. if (format == NULL) {
  290. dev_dbg(sdev->dev, "mode_set: unsupported format %08x\n",
  291. crtc->primary->fb->format->format);
  292. return -EINVAL;
  293. }
  294. scrtc->format = format;
  295. scrtc->line_size = crtc->primary->fb->pitches[0];
  296. shmob_drm_crtc_compute_base(scrtc, x, y);
  297. return 0;
  298. }
  299. static void shmob_drm_crtc_mode_commit(struct drm_crtc *crtc)
  300. {
  301. shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
  302. }
  303. static int shmob_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
  304. struct drm_framebuffer *old_fb)
  305. {
  306. shmob_drm_crtc_update_base(to_shmob_crtc(crtc));
  307. return 0;
  308. }
  309. static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
  310. .dpms = shmob_drm_crtc_dpms,
  311. .prepare = shmob_drm_crtc_mode_prepare,
  312. .commit = shmob_drm_crtc_mode_commit,
  313. .mode_set = shmob_drm_crtc_mode_set,
  314. .mode_set_base = shmob_drm_crtc_mode_set_base,
  315. };
  316. void shmob_drm_crtc_finish_page_flip(struct shmob_drm_crtc *scrtc)
  317. {
  318. struct drm_pending_vblank_event *event;
  319. struct drm_device *dev = scrtc->crtc.dev;
  320. unsigned long flags;
  321. spin_lock_irqsave(&dev->event_lock, flags);
  322. event = scrtc->event;
  323. scrtc->event = NULL;
  324. if (event) {
  325. drm_crtc_send_vblank_event(&scrtc->crtc, event);
  326. drm_crtc_vblank_put(&scrtc->crtc);
  327. }
  328. spin_unlock_irqrestore(&dev->event_lock, flags);
  329. }
  330. static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc,
  331. struct drm_framebuffer *fb,
  332. struct drm_pending_vblank_event *event,
  333. uint32_t page_flip_flags,
  334. struct drm_modeset_acquire_ctx *ctx)
  335. {
  336. struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
  337. struct drm_device *dev = scrtc->crtc.dev;
  338. unsigned long flags;
  339. spin_lock_irqsave(&dev->event_lock, flags);
  340. if (scrtc->event != NULL) {
  341. spin_unlock_irqrestore(&dev->event_lock, flags);
  342. return -EBUSY;
  343. }
  344. spin_unlock_irqrestore(&dev->event_lock, flags);
  345. crtc->primary->fb = fb;
  346. shmob_drm_crtc_update_base(scrtc);
  347. if (event) {
  348. event->pipe = 0;
  349. drm_crtc_vblank_get(&scrtc->crtc);
  350. spin_lock_irqsave(&dev->event_lock, flags);
  351. scrtc->event = event;
  352. spin_unlock_irqrestore(&dev->event_lock, flags);
  353. }
  354. return 0;
  355. }
  356. static void shmob_drm_crtc_enable_vblank(struct shmob_drm_device *sdev,
  357. bool enable)
  358. {
  359. unsigned long flags;
  360. u32 ldintr;
  361. /* Be careful not to acknowledge any pending interrupt. */
  362. spin_lock_irqsave(&sdev->irq_lock, flags);
  363. ldintr = lcdc_read(sdev, LDINTR) | LDINTR_STATUS_MASK;
  364. if (enable)
  365. ldintr |= LDINTR_VEE;
  366. else
  367. ldintr &= ~LDINTR_VEE;
  368. lcdc_write(sdev, LDINTR, ldintr);
  369. spin_unlock_irqrestore(&sdev->irq_lock, flags);
  370. }
  371. static int shmob_drm_enable_vblank(struct drm_crtc *crtc)
  372. {
  373. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  374. shmob_drm_crtc_enable_vblank(sdev, true);
  375. return 0;
  376. }
  377. static void shmob_drm_disable_vblank(struct drm_crtc *crtc)
  378. {
  379. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  380. shmob_drm_crtc_enable_vblank(sdev, false);
  381. }
  382. static const struct drm_crtc_funcs crtc_funcs = {
  383. .destroy = drm_crtc_cleanup,
  384. .set_config = drm_crtc_helper_set_config,
  385. .page_flip = shmob_drm_crtc_page_flip,
  386. .enable_vblank = shmob_drm_enable_vblank,
  387. .disable_vblank = shmob_drm_disable_vblank,
  388. };
  389. int shmob_drm_crtc_create(struct shmob_drm_device *sdev)
  390. {
  391. struct drm_crtc *crtc = &sdev->crtc.crtc;
  392. int ret;
  393. sdev->crtc.dpms = DRM_MODE_DPMS_OFF;
  394. ret = drm_crtc_init(sdev->ddev, crtc, &crtc_funcs);
  395. if (ret < 0)
  396. return ret;
  397. drm_crtc_helper_add(crtc, &crtc_helper_funcs);
  398. return 0;
  399. }
  400. /* -----------------------------------------------------------------------------
  401. * Encoder
  402. */
  403. #define to_shmob_encoder(e) \
  404. container_of(e, struct shmob_drm_encoder, encoder)
  405. static void shmob_drm_encoder_dpms(struct drm_encoder *encoder, int mode)
  406. {
  407. struct shmob_drm_encoder *senc = to_shmob_encoder(encoder);
  408. struct shmob_drm_device *sdev = encoder->dev->dev_private;
  409. struct shmob_drm_connector *scon = &sdev->connector;
  410. if (senc->dpms == mode)
  411. return;
  412. shmob_drm_backlight_dpms(scon, mode);
  413. senc->dpms = mode;
  414. }
  415. static bool shmob_drm_encoder_mode_fixup(struct drm_encoder *encoder,
  416. const struct drm_display_mode *mode,
  417. struct drm_display_mode *adjusted_mode)
  418. {
  419. struct drm_device *dev = encoder->dev;
  420. struct shmob_drm_device *sdev = dev->dev_private;
  421. struct drm_connector *connector = &sdev->connector.connector;
  422. const struct drm_display_mode *panel_mode;
  423. if (list_empty(&connector->modes)) {
  424. dev_dbg(dev->dev, "mode_fixup: empty modes list\n");
  425. return false;
  426. }
  427. /* The flat panel mode is fixed, just copy it to the adjusted mode. */
  428. panel_mode = list_first_entry(&connector->modes,
  429. struct drm_display_mode, head);
  430. drm_mode_copy(adjusted_mode, panel_mode);
  431. return true;
  432. }
  433. static void shmob_drm_encoder_mode_prepare(struct drm_encoder *encoder)
  434. {
  435. /* No-op, everything is handled in the CRTC code. */
  436. }
  437. static void shmob_drm_encoder_mode_set(struct drm_encoder *encoder,
  438. struct drm_display_mode *mode,
  439. struct drm_display_mode *adjusted_mode)
  440. {
  441. /* No-op, everything is handled in the CRTC code. */
  442. }
  443. static void shmob_drm_encoder_mode_commit(struct drm_encoder *encoder)
  444. {
  445. /* No-op, everything is handled in the CRTC code. */
  446. }
  447. static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
  448. .dpms = shmob_drm_encoder_dpms,
  449. .mode_fixup = shmob_drm_encoder_mode_fixup,
  450. .prepare = shmob_drm_encoder_mode_prepare,
  451. .commit = shmob_drm_encoder_mode_commit,
  452. .mode_set = shmob_drm_encoder_mode_set,
  453. };
  454. int shmob_drm_encoder_create(struct shmob_drm_device *sdev)
  455. {
  456. struct drm_encoder *encoder = &sdev->encoder.encoder;
  457. int ret;
  458. sdev->encoder.dpms = DRM_MODE_DPMS_OFF;
  459. encoder->possible_crtcs = 1;
  460. ret = drm_simple_encoder_init(sdev->ddev, encoder,
  461. DRM_MODE_ENCODER_LVDS);
  462. if (ret < 0)
  463. return ret;
  464. drm_encoder_helper_add(encoder, &encoder_helper_funcs);
  465. return 0;
  466. }
  467. /* -----------------------------------------------------------------------------
  468. * Connector
  469. */
  470. #define to_shmob_connector(c) \
  471. container_of(c, struct shmob_drm_connector, connector)
  472. static int shmob_drm_connector_get_modes(struct drm_connector *connector)
  473. {
  474. struct shmob_drm_device *sdev = connector->dev->dev_private;
  475. struct drm_display_mode *mode;
  476. mode = drm_mode_create(connector->dev);
  477. if (mode == NULL)
  478. return 0;
  479. mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
  480. mode->clock = sdev->pdata->panel.mode.clock;
  481. mode->hdisplay = sdev->pdata->panel.mode.hdisplay;
  482. mode->hsync_start = sdev->pdata->panel.mode.hsync_start;
  483. mode->hsync_end = sdev->pdata->panel.mode.hsync_end;
  484. mode->htotal = sdev->pdata->panel.mode.htotal;
  485. mode->vdisplay = sdev->pdata->panel.mode.vdisplay;
  486. mode->vsync_start = sdev->pdata->panel.mode.vsync_start;
  487. mode->vsync_end = sdev->pdata->panel.mode.vsync_end;
  488. mode->vtotal = sdev->pdata->panel.mode.vtotal;
  489. mode->flags = sdev->pdata->panel.mode.flags;
  490. drm_mode_set_name(mode);
  491. drm_mode_probed_add(connector, mode);
  492. connector->display_info.width_mm = sdev->pdata->panel.width_mm;
  493. connector->display_info.height_mm = sdev->pdata->panel.height_mm;
  494. return 1;
  495. }
  496. static struct drm_encoder *
  497. shmob_drm_connector_best_encoder(struct drm_connector *connector)
  498. {
  499. struct shmob_drm_connector *scon = to_shmob_connector(connector);
  500. return scon->encoder;
  501. }
  502. static const struct drm_connector_helper_funcs connector_helper_funcs = {
  503. .get_modes = shmob_drm_connector_get_modes,
  504. .best_encoder = shmob_drm_connector_best_encoder,
  505. };
  506. static void shmob_drm_connector_destroy(struct drm_connector *connector)
  507. {
  508. struct shmob_drm_connector *scon = to_shmob_connector(connector);
  509. shmob_drm_backlight_exit(scon);
  510. drm_connector_unregister(connector);
  511. drm_connector_cleanup(connector);
  512. }
  513. static const struct drm_connector_funcs connector_funcs = {
  514. .dpms = drm_helper_connector_dpms,
  515. .fill_modes = drm_helper_probe_single_connector_modes,
  516. .destroy = shmob_drm_connector_destroy,
  517. };
  518. int shmob_drm_connector_create(struct shmob_drm_device *sdev,
  519. struct drm_encoder *encoder)
  520. {
  521. struct drm_connector *connector = &sdev->connector.connector;
  522. int ret;
  523. sdev->connector.encoder = encoder;
  524. connector->display_info.width_mm = sdev->pdata->panel.width_mm;
  525. connector->display_info.height_mm = sdev->pdata->panel.height_mm;
  526. ret = drm_connector_init(sdev->ddev, connector, &connector_funcs,
  527. DRM_MODE_CONNECTOR_LVDS);
  528. if (ret < 0)
  529. return ret;
  530. drm_connector_helper_add(connector, &connector_helper_funcs);
  531. ret = shmob_drm_backlight_init(&sdev->connector);
  532. if (ret < 0)
  533. goto err_cleanup;
  534. ret = drm_connector_attach_encoder(connector, encoder);
  535. if (ret < 0)
  536. goto err_backlight;
  537. drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
  538. drm_object_property_set_value(&connector->base,
  539. sdev->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
  540. return 0;
  541. err_backlight:
  542. shmob_drm_backlight_exit(&sdev->connector);
  543. err_cleanup:
  544. drm_connector_cleanup(connector);
  545. return ret;
  546. }