panel-samsung-s6e63j0x03.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * MIPI-DSI based S6E63J0X03 AMOLED lcd 1.63 inch panel driver.
  4. *
  5. * Copyright (c) 2014-2017 Samsung Electronics Co., Ltd
  6. *
  7. * Inki Dae <inki.dae@samsung.com>
  8. * Hoegeun Kwon <hoegeun.kwon@samsung.com>
  9. */
  10. #include <linux/backlight.h>
  11. #include <linux/delay.h>
  12. #include <linux/gpio/consumer.h>
  13. #include <linux/module.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <video/mipi_display.h>
  16. #include <drm/drm_mipi_dsi.h>
  17. #include <drm/drm_modes.h>
  18. #include <drm/drm_panel.h>
  19. #define MCS_LEVEL2_KEY 0xf0
  20. #define MCS_MTP_KEY 0xf1
  21. #define MCS_MTP_SET3 0xd4
  22. #define MAX_BRIGHTNESS 100
  23. #define DEFAULT_BRIGHTNESS 80
  24. #define NUM_GAMMA_STEPS 9
  25. #define GAMMA_CMD_CNT 28
  26. #define FIRST_COLUMN 20
  27. struct s6e63j0x03 {
  28. struct device *dev;
  29. struct drm_panel panel;
  30. struct backlight_device *bl_dev;
  31. struct regulator_bulk_data supplies[2];
  32. struct gpio_desc *reset_gpio;
  33. };
  34. static const struct drm_display_mode default_mode = {
  35. .clock = 4649,
  36. .hdisplay = 320,
  37. .hsync_start = 320 + 1,
  38. .hsync_end = 320 + 1 + 1,
  39. .htotal = 320 + 1 + 1 + 1,
  40. .vdisplay = 320,
  41. .vsync_start = 320 + 150,
  42. .vsync_end = 320 + 150 + 1,
  43. .vtotal = 320 + 150 + 1 + 2,
  44. .flags = 0,
  45. };
  46. static const unsigned char gamma_tbl[NUM_GAMMA_STEPS][GAMMA_CMD_CNT] = {
  47. { /* Gamma 10 */
  48. MCS_MTP_SET3,
  49. 0x00, 0x00, 0x00, 0x7f, 0x7f, 0x7f, 0x52, 0x6b, 0x6f, 0x26,
  50. 0x28, 0x2d, 0x28, 0x26, 0x27, 0x33, 0x34, 0x32, 0x36, 0x36,
  51. 0x35, 0x00, 0xab, 0x00, 0xae, 0x00, 0xbf
  52. },
  53. { /* gamma 30 */
  54. MCS_MTP_SET3,
  55. 0x00, 0x00, 0x00, 0x70, 0x7f, 0x7f, 0x4e, 0x64, 0x69, 0x26,
  56. 0x27, 0x2a, 0x28, 0x29, 0x27, 0x31, 0x32, 0x31, 0x35, 0x34,
  57. 0x35, 0x00, 0xc4, 0x00, 0xca, 0x00, 0xdc
  58. },
  59. { /* gamma 60 */
  60. MCS_MTP_SET3,
  61. 0x00, 0x00, 0x00, 0x65, 0x7b, 0x7d, 0x5f, 0x67, 0x68, 0x2a,
  62. 0x28, 0x29, 0x28, 0x2a, 0x27, 0x31, 0x2f, 0x30, 0x34, 0x33,
  63. 0x34, 0x00, 0xd9, 0x00, 0xe4, 0x00, 0xf5
  64. },
  65. { /* gamma 90 */
  66. MCS_MTP_SET3,
  67. 0x00, 0x00, 0x00, 0x4d, 0x6f, 0x71, 0x67, 0x6a, 0x6c, 0x29,
  68. 0x28, 0x28, 0x28, 0x29, 0x27, 0x30, 0x2e, 0x30, 0x32, 0x31,
  69. 0x31, 0x00, 0xea, 0x00, 0xf6, 0x01, 0x09
  70. },
  71. { /* gamma 120 */
  72. MCS_MTP_SET3,
  73. 0x00, 0x00, 0x00, 0x3d, 0x66, 0x68, 0x69, 0x69, 0x69, 0x28,
  74. 0x28, 0x27, 0x28, 0x28, 0x27, 0x30, 0x2e, 0x2f, 0x31, 0x31,
  75. 0x30, 0x00, 0xf9, 0x01, 0x05, 0x01, 0x1b
  76. },
  77. { /* gamma 150 */
  78. MCS_MTP_SET3,
  79. 0x00, 0x00, 0x00, 0x31, 0x51, 0x53, 0x66, 0x66, 0x67, 0x28,
  80. 0x29, 0x27, 0x28, 0x27, 0x27, 0x2e, 0x2d, 0x2e, 0x31, 0x31,
  81. 0x30, 0x01, 0x04, 0x01, 0x11, 0x01, 0x29
  82. },
  83. { /* gamma 200 */
  84. MCS_MTP_SET3,
  85. 0x00, 0x00, 0x00, 0x2f, 0x4f, 0x51, 0x67, 0x65, 0x65, 0x29,
  86. 0x2a, 0x28, 0x27, 0x25, 0x26, 0x2d, 0x2c, 0x2c, 0x30, 0x30,
  87. 0x30, 0x01, 0x14, 0x01, 0x23, 0x01, 0x3b
  88. },
  89. { /* gamma 240 */
  90. MCS_MTP_SET3,
  91. 0x00, 0x00, 0x00, 0x2c, 0x4d, 0x50, 0x65, 0x63, 0x64, 0x2a,
  92. 0x2c, 0x29, 0x26, 0x24, 0x25, 0x2c, 0x2b, 0x2b, 0x30, 0x30,
  93. 0x30, 0x01, 0x1e, 0x01, 0x2f, 0x01, 0x47
  94. },
  95. { /* gamma 300 */
  96. MCS_MTP_SET3,
  97. 0x00, 0x00, 0x00, 0x38, 0x61, 0x64, 0x65, 0x63, 0x64, 0x28,
  98. 0x2a, 0x27, 0x26, 0x23, 0x25, 0x2b, 0x2b, 0x2a, 0x30, 0x2f,
  99. 0x30, 0x01, 0x2d, 0x01, 0x3f, 0x01, 0x57
  100. }
  101. };
  102. static inline struct s6e63j0x03 *panel_to_s6e63j0x03(struct drm_panel *panel)
  103. {
  104. return container_of(panel, struct s6e63j0x03, panel);
  105. }
  106. static inline ssize_t s6e63j0x03_dcs_write_seq(struct s6e63j0x03 *ctx,
  107. const void *seq, size_t len)
  108. {
  109. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  110. return mipi_dsi_dcs_write_buffer(dsi, seq, len);
  111. }
  112. #define s6e63j0x03_dcs_write_seq_static(ctx, seq...) \
  113. ({ \
  114. static const u8 d[] = { seq }; \
  115. s6e63j0x03_dcs_write_seq(ctx, d, ARRAY_SIZE(d)); \
  116. })
  117. static inline int s6e63j0x03_enable_lv2_command(struct s6e63j0x03 *ctx)
  118. {
  119. return s6e63j0x03_dcs_write_seq_static(ctx, MCS_LEVEL2_KEY, 0x5a, 0x5a);
  120. }
  121. static inline int s6e63j0x03_apply_mtp_key(struct s6e63j0x03 *ctx, bool on)
  122. {
  123. if (on)
  124. return s6e63j0x03_dcs_write_seq_static(ctx,
  125. MCS_MTP_KEY, 0x5a, 0x5a);
  126. return s6e63j0x03_dcs_write_seq_static(ctx, MCS_MTP_KEY, 0xa5, 0xa5);
  127. }
  128. static int s6e63j0x03_power_on(struct s6e63j0x03 *ctx)
  129. {
  130. int ret;
  131. ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
  132. if (ret < 0)
  133. return ret;
  134. msleep(30);
  135. gpiod_set_value(ctx->reset_gpio, 1);
  136. usleep_range(1000, 2000);
  137. gpiod_set_value(ctx->reset_gpio, 0);
  138. usleep_range(5000, 6000);
  139. return 0;
  140. }
  141. static int s6e63j0x03_power_off(struct s6e63j0x03 *ctx)
  142. {
  143. return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
  144. }
  145. static unsigned int s6e63j0x03_get_brightness_index(unsigned int brightness)
  146. {
  147. unsigned int index;
  148. index = brightness / (MAX_BRIGHTNESS / NUM_GAMMA_STEPS);
  149. if (index >= NUM_GAMMA_STEPS)
  150. index = NUM_GAMMA_STEPS - 1;
  151. return index;
  152. }
  153. static int s6e63j0x03_update_gamma(struct s6e63j0x03 *ctx,
  154. unsigned int brightness)
  155. {
  156. struct backlight_device *bl_dev = ctx->bl_dev;
  157. unsigned int index = s6e63j0x03_get_brightness_index(brightness);
  158. int ret;
  159. ret = s6e63j0x03_apply_mtp_key(ctx, true);
  160. if (ret < 0)
  161. return ret;
  162. ret = s6e63j0x03_dcs_write_seq(ctx, gamma_tbl[index], GAMMA_CMD_CNT);
  163. if (ret < 0)
  164. return ret;
  165. ret = s6e63j0x03_apply_mtp_key(ctx, false);
  166. if (ret < 0)
  167. return ret;
  168. bl_dev->props.brightness = brightness;
  169. return 0;
  170. }
  171. static int s6e63j0x03_set_brightness(struct backlight_device *bl_dev)
  172. {
  173. struct s6e63j0x03 *ctx = bl_get_data(bl_dev);
  174. unsigned int brightness = bl_dev->props.brightness;
  175. return s6e63j0x03_update_gamma(ctx, brightness);
  176. }
  177. static const struct backlight_ops s6e63j0x03_bl_ops = {
  178. .update_status = s6e63j0x03_set_brightness,
  179. };
  180. static int s6e63j0x03_disable(struct drm_panel *panel)
  181. {
  182. struct s6e63j0x03 *ctx = panel_to_s6e63j0x03(panel);
  183. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  184. int ret;
  185. ret = mipi_dsi_dcs_set_display_off(dsi);
  186. if (ret < 0)
  187. return ret;
  188. ctx->bl_dev->props.power = FB_BLANK_NORMAL;
  189. ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
  190. if (ret < 0)
  191. return ret;
  192. msleep(120);
  193. return 0;
  194. }
  195. static int s6e63j0x03_unprepare(struct drm_panel *panel)
  196. {
  197. struct s6e63j0x03 *ctx = panel_to_s6e63j0x03(panel);
  198. int ret;
  199. ret = s6e63j0x03_power_off(ctx);
  200. if (ret < 0)
  201. return ret;
  202. ctx->bl_dev->props.power = FB_BLANK_POWERDOWN;
  203. return 0;
  204. }
  205. static int s6e63j0x03_panel_init(struct s6e63j0x03 *ctx)
  206. {
  207. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  208. int ret;
  209. ret = s6e63j0x03_enable_lv2_command(ctx);
  210. if (ret < 0)
  211. return ret;
  212. ret = s6e63j0x03_apply_mtp_key(ctx, true);
  213. if (ret < 0)
  214. return ret;
  215. /* set porch adjustment */
  216. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xf2, 0x1c, 0x28);
  217. if (ret < 0)
  218. return ret;
  219. /* set frame freq */
  220. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb5, 0x00, 0x02, 0x00);
  221. if (ret < 0)
  222. return ret;
  223. /* set caset, paset */
  224. ret = mipi_dsi_dcs_set_column_address(dsi, FIRST_COLUMN,
  225. default_mode.hdisplay - 1 + FIRST_COLUMN);
  226. if (ret < 0)
  227. return ret;
  228. ret = mipi_dsi_dcs_set_page_address(dsi, 0, default_mode.vdisplay - 1);
  229. if (ret < 0)
  230. return ret;
  231. /* set ltps timming 0, 1 */
  232. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xf8, 0x08, 0x08, 0x08, 0x17,
  233. 0x00, 0x2a, 0x02, 0x26, 0x00, 0x00, 0x02, 0x00, 0x00);
  234. if (ret < 0)
  235. return ret;
  236. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xf7, 0x02);
  237. if (ret < 0)
  238. return ret;
  239. /* set param pos te_edge */
  240. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb0, 0x01);
  241. if (ret < 0)
  242. return ret;
  243. /* set te rising edge */
  244. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xe2, 0x0f);
  245. if (ret < 0)
  246. return ret;
  247. /* set param pos default */
  248. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb0, 0x00);
  249. if (ret < 0)
  250. return ret;
  251. ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
  252. if (ret < 0)
  253. return ret;
  254. ret = s6e63j0x03_apply_mtp_key(ctx, false);
  255. if (ret < 0)
  256. return ret;
  257. return 0;
  258. }
  259. static int s6e63j0x03_prepare(struct drm_panel *panel)
  260. {
  261. struct s6e63j0x03 *ctx = panel_to_s6e63j0x03(panel);
  262. int ret;
  263. ret = s6e63j0x03_power_on(ctx);
  264. if (ret < 0)
  265. return ret;
  266. ret = s6e63j0x03_panel_init(ctx);
  267. if (ret < 0)
  268. goto err;
  269. ctx->bl_dev->props.power = FB_BLANK_NORMAL;
  270. return 0;
  271. err:
  272. s6e63j0x03_power_off(ctx);
  273. return ret;
  274. }
  275. static int s6e63j0x03_enable(struct drm_panel *panel)
  276. {
  277. struct s6e63j0x03 *ctx = panel_to_s6e63j0x03(panel);
  278. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  279. int ret;
  280. msleep(120);
  281. ret = s6e63j0x03_apply_mtp_key(ctx, true);
  282. if (ret < 0)
  283. return ret;
  284. /* set elvss_cond */
  285. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb1, 0x00, 0x09);
  286. if (ret < 0)
  287. return ret;
  288. /* set pos */
  289. ret = s6e63j0x03_dcs_write_seq_static(ctx,
  290. MIPI_DCS_SET_ADDRESS_MODE, 0x40);
  291. if (ret < 0)
  292. return ret;
  293. /* set default white brightness */
  294. ret = mipi_dsi_dcs_set_display_brightness(dsi, 0x00ff);
  295. if (ret < 0)
  296. return ret;
  297. /* set white ctrl */
  298. ret = s6e63j0x03_dcs_write_seq_static(ctx,
  299. MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
  300. if (ret < 0)
  301. return ret;
  302. /* set acl off */
  303. ret = s6e63j0x03_dcs_write_seq_static(ctx,
  304. MIPI_DCS_WRITE_POWER_SAVE, 0x00);
  305. if (ret < 0)
  306. return ret;
  307. ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
  308. if (ret < 0)
  309. return ret;
  310. ret = s6e63j0x03_apply_mtp_key(ctx, false);
  311. if (ret < 0)
  312. return ret;
  313. ret = mipi_dsi_dcs_set_display_on(dsi);
  314. if (ret < 0)
  315. return ret;
  316. ctx->bl_dev->props.power = FB_BLANK_UNBLANK;
  317. return 0;
  318. }
  319. static int s6e63j0x03_get_modes(struct drm_panel *panel,
  320. struct drm_connector *connector)
  321. {
  322. struct drm_display_mode *mode;
  323. mode = drm_mode_duplicate(connector->dev, &default_mode);
  324. if (!mode) {
  325. dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
  326. default_mode.hdisplay, default_mode.vdisplay,
  327. drm_mode_vrefresh(&default_mode));
  328. return -ENOMEM;
  329. }
  330. drm_mode_set_name(mode);
  331. mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
  332. drm_mode_probed_add(connector, mode);
  333. connector->display_info.width_mm = 29;
  334. connector->display_info.height_mm = 29;
  335. return 1;
  336. }
  337. static const struct drm_panel_funcs s6e63j0x03_funcs = {
  338. .disable = s6e63j0x03_disable,
  339. .unprepare = s6e63j0x03_unprepare,
  340. .prepare = s6e63j0x03_prepare,
  341. .enable = s6e63j0x03_enable,
  342. .get_modes = s6e63j0x03_get_modes,
  343. };
  344. static int s6e63j0x03_probe(struct mipi_dsi_device *dsi)
  345. {
  346. struct device *dev = &dsi->dev;
  347. struct s6e63j0x03 *ctx;
  348. int ret;
  349. ctx = devm_kzalloc(dev, sizeof(struct s6e63j0x03), GFP_KERNEL);
  350. if (!ctx)
  351. return -ENOMEM;
  352. mipi_dsi_set_drvdata(dsi, ctx);
  353. ctx->dev = dev;
  354. dsi->lanes = 1;
  355. dsi->format = MIPI_DSI_FMT_RGB888;
  356. dsi->mode_flags = MIPI_DSI_MODE_EOT_PACKET;
  357. ctx->supplies[0].supply = "vdd3";
  358. ctx->supplies[1].supply = "vci";
  359. ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
  360. ctx->supplies);
  361. if (ret < 0) {
  362. dev_err(dev, "failed to get regulators: %d\n", ret);
  363. return ret;
  364. }
  365. ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
  366. if (IS_ERR(ctx->reset_gpio)) {
  367. dev_err(dev, "cannot get reset-gpio: %ld\n",
  368. PTR_ERR(ctx->reset_gpio));
  369. return PTR_ERR(ctx->reset_gpio);
  370. }
  371. drm_panel_init(&ctx->panel, dev, &s6e63j0x03_funcs,
  372. DRM_MODE_CONNECTOR_DSI);
  373. ctx->bl_dev = backlight_device_register("s6e63j0x03", dev, ctx,
  374. &s6e63j0x03_bl_ops, NULL);
  375. if (IS_ERR(ctx->bl_dev)) {
  376. dev_err(dev, "failed to register backlight device\n");
  377. return PTR_ERR(ctx->bl_dev);
  378. }
  379. ctx->bl_dev->props.max_brightness = MAX_BRIGHTNESS;
  380. ctx->bl_dev->props.brightness = DEFAULT_BRIGHTNESS;
  381. ctx->bl_dev->props.power = FB_BLANK_POWERDOWN;
  382. drm_panel_add(&ctx->panel);
  383. ret = mipi_dsi_attach(dsi);
  384. if (ret < 0)
  385. goto remove_panel;
  386. return ret;
  387. remove_panel:
  388. drm_panel_remove(&ctx->panel);
  389. backlight_device_unregister(ctx->bl_dev);
  390. return ret;
  391. }
  392. static int s6e63j0x03_remove(struct mipi_dsi_device *dsi)
  393. {
  394. struct s6e63j0x03 *ctx = mipi_dsi_get_drvdata(dsi);
  395. mipi_dsi_detach(dsi);
  396. drm_panel_remove(&ctx->panel);
  397. backlight_device_unregister(ctx->bl_dev);
  398. return 0;
  399. }
  400. static const struct of_device_id s6e63j0x03_of_match[] = {
  401. { .compatible = "samsung,s6e63j0x03" },
  402. { }
  403. };
  404. MODULE_DEVICE_TABLE(of, s6e63j0x03_of_match);
  405. static struct mipi_dsi_driver s6e63j0x03_driver = {
  406. .probe = s6e63j0x03_probe,
  407. .remove = s6e63j0x03_remove,
  408. .driver = {
  409. .name = "panel_samsung_s6e63j0x03",
  410. .of_match_table = s6e63j0x03_of_match,
  411. },
  412. };
  413. module_mipi_dsi_driver(s6e63j0x03_driver);
  414. MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
  415. MODULE_AUTHOR("Hoegeun Kwon <hoegeun.kwon@samsung.com>");
  416. MODULE_DESCRIPTION("MIPI-DSI based s6e63j0x03 AMOLED LCD Panel Driver");
  417. MODULE_LICENSE("GPL v2");