panel-leadtek-ltk050h3146w.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2020 Theobroma Systems Design und Consulting GmbH
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/gpio/consumer.h>
  7. #include <linux/media-bus-format.h>
  8. #include <linux/module.h>
  9. #include <linux/of.h>
  10. #include <linux/of_device.h>
  11. #include <linux/regulator/consumer.h>
  12. #include <video/display_timing.h>
  13. #include <video/mipi_display.h>
  14. #include <drm/drm_mipi_dsi.h>
  15. #include <drm/drm_modes.h>
  16. #include <drm/drm_panel.h>
  17. struct ltk050h3146w_cmd {
  18. char cmd;
  19. char data;
  20. };
  21. struct ltk050h3146w;
  22. struct ltk050h3146w_desc {
  23. const struct drm_display_mode *mode;
  24. int (*init)(struct ltk050h3146w *ctx);
  25. };
  26. struct ltk050h3146w {
  27. struct device *dev;
  28. struct drm_panel panel;
  29. struct gpio_desc *reset_gpio;
  30. struct regulator *vci;
  31. struct regulator *iovcc;
  32. const struct ltk050h3146w_desc *panel_desc;
  33. bool prepared;
  34. };
  35. static const struct ltk050h3146w_cmd page1_cmds[] = {
  36. { 0x22, 0x0A }, /* BGR SS GS */
  37. { 0x31, 0x00 }, /* column inversion */
  38. { 0x53, 0xA2 }, /* VCOM1 */
  39. { 0x55, 0xA2 }, /* VCOM2 */
  40. { 0x50, 0x81 }, /* VREG1OUT=5V */
  41. { 0x51, 0x85 }, /* VREG2OUT=-5V */
  42. { 0x62, 0x0D }, /* EQT Time setting */
  43. /*
  44. * The vendor init selected page 1 here _again_
  45. * Is this supposed to be page 2?
  46. */
  47. { 0xA0, 0x00 },
  48. { 0xA1, 0x1A },
  49. { 0xA2, 0x28 },
  50. { 0xA3, 0x13 },
  51. { 0xA4, 0x16 },
  52. { 0xA5, 0x29 },
  53. { 0xA6, 0x1D },
  54. { 0xA7, 0x1E },
  55. { 0xA8, 0x84 },
  56. { 0xA9, 0x1C },
  57. { 0xAA, 0x28 },
  58. { 0xAB, 0x75 },
  59. { 0xAC, 0x1A },
  60. { 0xAD, 0x19 },
  61. { 0xAE, 0x4D },
  62. { 0xAF, 0x22 },
  63. { 0xB0, 0x28 },
  64. { 0xB1, 0x54 },
  65. { 0xB2, 0x66 },
  66. { 0xB3, 0x39 },
  67. { 0xC0, 0x00 },
  68. { 0xC1, 0x1A },
  69. { 0xC2, 0x28 },
  70. { 0xC3, 0x13 },
  71. { 0xC4, 0x16 },
  72. { 0xC5, 0x29 },
  73. { 0xC6, 0x1D },
  74. { 0xC7, 0x1E },
  75. { 0xC8, 0x84 },
  76. { 0xC9, 0x1C },
  77. { 0xCA, 0x28 },
  78. { 0xCB, 0x75 },
  79. { 0xCC, 0x1A },
  80. { 0xCD, 0x19 },
  81. { 0xCE, 0x4D },
  82. { 0xCF, 0x22 },
  83. { 0xD0, 0x28 },
  84. { 0xD1, 0x54 },
  85. { 0xD2, 0x66 },
  86. { 0xD3, 0x39 },
  87. };
  88. static const struct ltk050h3146w_cmd page3_cmds[] = {
  89. { 0x01, 0x00 },
  90. { 0x02, 0x00 },
  91. { 0x03, 0x73 },
  92. { 0x04, 0x00 },
  93. { 0x05, 0x00 },
  94. { 0x06, 0x0a },
  95. { 0x07, 0x00 },
  96. { 0x08, 0x00 },
  97. { 0x09, 0x01 },
  98. { 0x0a, 0x00 },
  99. { 0x0b, 0x00 },
  100. { 0x0c, 0x01 },
  101. { 0x0d, 0x00 },
  102. { 0x0e, 0x00 },
  103. { 0x0f, 0x1d },
  104. { 0x10, 0x1d },
  105. { 0x11, 0x00 },
  106. { 0x12, 0x00 },
  107. { 0x13, 0x00 },
  108. { 0x14, 0x00 },
  109. { 0x15, 0x00 },
  110. { 0x16, 0x00 },
  111. { 0x17, 0x00 },
  112. { 0x18, 0x00 },
  113. { 0x19, 0x00 },
  114. { 0x1a, 0x00 },
  115. { 0x1b, 0x00 },
  116. { 0x1c, 0x00 },
  117. { 0x1d, 0x00 },
  118. { 0x1e, 0x40 },
  119. { 0x1f, 0x80 },
  120. { 0x20, 0x06 },
  121. { 0x21, 0x02 },
  122. { 0x22, 0x00 },
  123. { 0x23, 0x00 },
  124. { 0x24, 0x00 },
  125. { 0x25, 0x00 },
  126. { 0x26, 0x00 },
  127. { 0x27, 0x00 },
  128. { 0x28, 0x33 },
  129. { 0x29, 0x03 },
  130. { 0x2a, 0x00 },
  131. { 0x2b, 0x00 },
  132. { 0x2c, 0x00 },
  133. { 0x2d, 0x00 },
  134. { 0x2e, 0x00 },
  135. { 0x2f, 0x00 },
  136. { 0x30, 0x00 },
  137. { 0x31, 0x00 },
  138. { 0x32, 0x00 },
  139. { 0x33, 0x00 },
  140. { 0x34, 0x04 },
  141. { 0x35, 0x00 },
  142. { 0x36, 0x00 },
  143. { 0x37, 0x00 },
  144. { 0x38, 0x3C },
  145. { 0x39, 0x35 },
  146. { 0x3A, 0x01 },
  147. { 0x3B, 0x40 },
  148. { 0x3C, 0x00 },
  149. { 0x3D, 0x01 },
  150. { 0x3E, 0x00 },
  151. { 0x3F, 0x00 },
  152. { 0x40, 0x00 },
  153. { 0x41, 0x88 },
  154. { 0x42, 0x00 },
  155. { 0x43, 0x00 },
  156. { 0x44, 0x1F },
  157. { 0x50, 0x01 },
  158. { 0x51, 0x23 },
  159. { 0x52, 0x45 },
  160. { 0x53, 0x67 },
  161. { 0x54, 0x89 },
  162. { 0x55, 0xab },
  163. { 0x56, 0x01 },
  164. { 0x57, 0x23 },
  165. { 0x58, 0x45 },
  166. { 0x59, 0x67 },
  167. { 0x5a, 0x89 },
  168. { 0x5b, 0xab },
  169. { 0x5c, 0xcd },
  170. { 0x5d, 0xef },
  171. { 0x5e, 0x11 },
  172. { 0x5f, 0x01 },
  173. { 0x60, 0x00 },
  174. { 0x61, 0x15 },
  175. { 0x62, 0x14 },
  176. { 0x63, 0x0E },
  177. { 0x64, 0x0F },
  178. { 0x65, 0x0C },
  179. { 0x66, 0x0D },
  180. { 0x67, 0x06 },
  181. { 0x68, 0x02 },
  182. { 0x69, 0x07 },
  183. { 0x6a, 0x02 },
  184. { 0x6b, 0x02 },
  185. { 0x6c, 0x02 },
  186. { 0x6d, 0x02 },
  187. { 0x6e, 0x02 },
  188. { 0x6f, 0x02 },
  189. { 0x70, 0x02 },
  190. { 0x71, 0x02 },
  191. { 0x72, 0x02 },
  192. { 0x73, 0x02 },
  193. { 0x74, 0x02 },
  194. { 0x75, 0x01 },
  195. { 0x76, 0x00 },
  196. { 0x77, 0x14 },
  197. { 0x78, 0x15 },
  198. { 0x79, 0x0E },
  199. { 0x7a, 0x0F },
  200. { 0x7b, 0x0C },
  201. { 0x7c, 0x0D },
  202. { 0x7d, 0x06 },
  203. { 0x7e, 0x02 },
  204. { 0x7f, 0x07 },
  205. { 0x80, 0x02 },
  206. { 0x81, 0x02 },
  207. { 0x82, 0x02 },
  208. { 0x83, 0x02 },
  209. { 0x84, 0x02 },
  210. { 0x85, 0x02 },
  211. { 0x86, 0x02 },
  212. { 0x87, 0x02 },
  213. { 0x88, 0x02 },
  214. { 0x89, 0x02 },
  215. { 0x8A, 0x02 },
  216. };
  217. static const struct ltk050h3146w_cmd page4_cmds[] = {
  218. { 0x70, 0x00 },
  219. { 0x71, 0x00 },
  220. { 0x82, 0x0F }, /* VGH_MOD clamp level=15v */
  221. { 0x84, 0x0F }, /* VGH clamp level 15V */
  222. { 0x85, 0x0D }, /* VGL clamp level (-10V) */
  223. { 0x32, 0xAC },
  224. { 0x8C, 0x80 },
  225. { 0x3C, 0xF5 },
  226. { 0xB5, 0x07 }, /* GAMMA OP */
  227. { 0x31, 0x45 }, /* SOURCE OP */
  228. { 0x3A, 0x24 }, /* PS_EN OFF */
  229. { 0x88, 0x33 }, /* LVD */
  230. };
  231. static inline
  232. struct ltk050h3146w *panel_to_ltk050h3146w(struct drm_panel *panel)
  233. {
  234. return container_of(panel, struct ltk050h3146w, panel);
  235. }
  236. #define dsi_dcs_write_seq(dsi, cmd, seq...) do { \
  237. static const u8 b[] = { cmd, seq }; \
  238. int ret; \
  239. ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
  240. if (ret < 0) \
  241. return ret; \
  242. } while (0)
  243. static int ltk050h3146w_init_sequence(struct ltk050h3146w *ctx)
  244. {
  245. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  246. int ret;
  247. /*
  248. * Init sequence was supplied by the panel vendor without much
  249. * documentation.
  250. */
  251. dsi_dcs_write_seq(dsi, 0xdf, 0x93, 0x65, 0xf8);
  252. dsi_dcs_write_seq(dsi, 0xb0, 0x01, 0x03, 0x02, 0x00, 0x64, 0x06,
  253. 0x01);
  254. dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0xb5);
  255. dsi_dcs_write_seq(dsi, 0xb3, 0x00, 0xb5);
  256. dsi_dcs_write_seq(dsi, 0xb7, 0x00, 0xbf, 0x00, 0x00, 0xbf, 0x00);
  257. dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xc4, 0x23, 0x07);
  258. dsi_dcs_write_seq(dsi, 0xbb, 0x02, 0x01, 0x24, 0x00, 0x28, 0x0f,
  259. 0x28, 0x04, 0xcc, 0xcc, 0xcc);
  260. dsi_dcs_write_seq(dsi, 0xbc, 0x0f, 0x04);
  261. dsi_dcs_write_seq(dsi, 0xbe, 0x1e, 0xf2);
  262. dsi_dcs_write_seq(dsi, 0xc0, 0x26, 0x03);
  263. dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x12);
  264. dsi_dcs_write_seq(dsi, 0xc3, 0x04, 0x02, 0x02, 0x76, 0x01, 0x80,
  265. 0x80);
  266. dsi_dcs_write_seq(dsi, 0xc4, 0x24, 0x80, 0xb4, 0x81, 0x12, 0x0f,
  267. 0x16, 0x00, 0x00);
  268. dsi_dcs_write_seq(dsi, 0xc8, 0x7f, 0x72, 0x67, 0x5d, 0x5d, 0x50,
  269. 0x56, 0x41, 0x59, 0x57, 0x55, 0x70, 0x5b, 0x5f,
  270. 0x4f, 0x47, 0x38, 0x23, 0x08, 0x7f, 0x72, 0x67,
  271. 0x5d, 0x5d, 0x50, 0x56, 0x41, 0x59, 0x57, 0x55,
  272. 0x70, 0x5b, 0x5f, 0x4f, 0x47, 0x38, 0x23, 0x08);
  273. dsi_dcs_write_seq(dsi, 0xd0, 0x1e, 0x1f, 0x57, 0x58, 0x48, 0x4a,
  274. 0x44, 0x46, 0x40, 0x1f, 0x42, 0x1f, 0x1f, 0x1f,
  275. 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
  276. dsi_dcs_write_seq(dsi, 0xd1, 0x1e, 0x1f, 0x57, 0x58, 0x49, 0x4b,
  277. 0x45, 0x47, 0x41, 0x1f, 0x43, 0x1f, 0x1f, 0x1f,
  278. 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
  279. dsi_dcs_write_seq(dsi, 0xd2, 0x1f, 0x1e, 0x17, 0x18, 0x07, 0x05,
  280. 0x0b, 0x09, 0x03, 0x1f, 0x01, 0x1f, 0x1f, 0x1f,
  281. 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
  282. dsi_dcs_write_seq(dsi, 0xd3, 0x1f, 0x1e, 0x17, 0x18, 0x06, 0x04,
  283. 0x0a, 0x08, 0x02, 0x1f, 0x00, 0x1f, 0x1f, 0x1f,
  284. 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
  285. dsi_dcs_write_seq(dsi, 0xd4, 0x00, 0x00, 0x00, 0x0c, 0x06, 0x20,
  286. 0x01, 0x02, 0x00, 0x60, 0x15, 0xb0, 0x30, 0x03,
  287. 0x04, 0x00, 0x60, 0x72, 0x0a, 0x00, 0x60, 0x08);
  288. dsi_dcs_write_seq(dsi, 0xd5, 0x00, 0x06, 0x06, 0x00, 0x30, 0x00,
  289. 0x00, 0x00, 0x00, 0x00, 0xbc, 0x50, 0x00, 0x05,
  290. 0x21, 0x00, 0x60);
  291. dsi_dcs_write_seq(dsi, 0xdd, 0x2c, 0xa3, 0x00);
  292. dsi_dcs_write_seq(dsi, 0xde, 0x02);
  293. dsi_dcs_write_seq(dsi, 0xb2, 0x32, 0x1c);
  294. dsi_dcs_write_seq(dsi, 0xb7, 0x3b, 0x70, 0x00, 0x04);
  295. dsi_dcs_write_seq(dsi, 0xc1, 0x11);
  296. dsi_dcs_write_seq(dsi, 0xbb, 0x21, 0x22, 0x23, 0x24, 0x36, 0x37);
  297. dsi_dcs_write_seq(dsi, 0xc2, 0x20, 0x38, 0x1e, 0x84);
  298. dsi_dcs_write_seq(dsi, 0xde, 0x00);
  299. ret = mipi_dsi_dcs_set_tear_on(dsi, 1);
  300. if (ret < 0) {
  301. dev_err(ctx->dev, "failed to set tear on: %d\n", ret);
  302. return ret;
  303. }
  304. msleep(60);
  305. return 0;
  306. }
  307. static const struct drm_display_mode ltk050h3146w_mode = {
  308. .hdisplay = 720,
  309. .hsync_start = 720 + 42,
  310. .hsync_end = 720 + 42 + 8,
  311. .htotal = 720 + 42 + 8 + 42,
  312. .vdisplay = 1280,
  313. .vsync_start = 1280 + 12,
  314. .vsync_end = 1280 + 12 + 4,
  315. .vtotal = 1280 + 12 + 4 + 18,
  316. .clock = 64018,
  317. .width_mm = 62,
  318. .height_mm = 110,
  319. };
  320. static const struct ltk050h3146w_desc ltk050h3146w_data = {
  321. .mode = &ltk050h3146w_mode,
  322. .init = ltk050h3146w_init_sequence,
  323. };
  324. static int ltk050h3146w_a2_select_page(struct ltk050h3146w *ctx, int page)
  325. {
  326. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  327. u8 d[3] = { 0x98, 0x81, page };
  328. return mipi_dsi_dcs_write(dsi, 0xff, d, ARRAY_SIZE(d));
  329. }
  330. static int ltk050h3146w_a2_write_page(struct ltk050h3146w *ctx, int page,
  331. const struct ltk050h3146w_cmd *cmds,
  332. int num)
  333. {
  334. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  335. int i, ret;
  336. ret = ltk050h3146w_a2_select_page(ctx, page);
  337. if (ret < 0) {
  338. dev_err(ctx->dev, "failed to select page %d: %d\n", page, ret);
  339. return ret;
  340. }
  341. for (i = 0; i < num; i++) {
  342. ret = mipi_dsi_generic_write(dsi, &cmds[i],
  343. sizeof(struct ltk050h3146w_cmd));
  344. if (ret < 0) {
  345. dev_err(ctx->dev, "failed to write page %d init cmds: %d\n", page, ret);
  346. return ret;
  347. }
  348. }
  349. return 0;
  350. }
  351. static int ltk050h3146w_a2_init_sequence(struct ltk050h3146w *ctx)
  352. {
  353. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  354. int ret;
  355. /*
  356. * Init sequence was supplied by the panel vendor without much
  357. * documentation.
  358. */
  359. ret = ltk050h3146w_a2_write_page(ctx, 3, page3_cmds,
  360. ARRAY_SIZE(page3_cmds));
  361. if (ret < 0)
  362. return ret;
  363. ret = ltk050h3146w_a2_write_page(ctx, 4, page4_cmds,
  364. ARRAY_SIZE(page4_cmds));
  365. if (ret < 0)
  366. return ret;
  367. ret = ltk050h3146w_a2_write_page(ctx, 1, page1_cmds,
  368. ARRAY_SIZE(page1_cmds));
  369. if (ret < 0)
  370. return ret;
  371. ret = ltk050h3146w_a2_select_page(ctx, 0);
  372. if (ret < 0) {
  373. dev_err(ctx->dev, "failed to select page 0: %d\n", ret);
  374. return ret;
  375. }
  376. /* vendor code called this without param, where there should be one */
  377. ret = mipi_dsi_dcs_set_tear_on(dsi, 0);
  378. if (ret < 0) {
  379. dev_err(ctx->dev, "failed to set tear on: %d\n", ret);
  380. return ret;
  381. }
  382. msleep(60);
  383. return 0;
  384. }
  385. static const struct drm_display_mode ltk050h3146w_a2_mode = {
  386. .hdisplay = 720,
  387. .hsync_start = 720 + 42,
  388. .hsync_end = 720 + 42 + 10,
  389. .htotal = 720 + 42 + 10 + 60,
  390. .vdisplay = 1280,
  391. .vsync_start = 1280 + 18,
  392. .vsync_end = 1280 + 18 + 4,
  393. .vtotal = 1280 + 18 + 4 + 12,
  394. .clock = 65595,
  395. .width_mm = 62,
  396. .height_mm = 110,
  397. };
  398. static const struct ltk050h3146w_desc ltk050h3146w_a2_data = {
  399. .mode = &ltk050h3146w_a2_mode,
  400. .init = ltk050h3146w_a2_init_sequence,
  401. };
  402. static int ltk050h3146w_unprepare(struct drm_panel *panel)
  403. {
  404. struct ltk050h3146w *ctx = panel_to_ltk050h3146w(panel);
  405. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  406. int ret;
  407. if (!ctx->prepared)
  408. return 0;
  409. ret = mipi_dsi_dcs_set_display_off(dsi);
  410. if (ret < 0) {
  411. dev_err(ctx->dev, "failed to set display off: %d\n", ret);
  412. return ret;
  413. }
  414. mipi_dsi_dcs_enter_sleep_mode(dsi);
  415. if (ret < 0) {
  416. dev_err(ctx->dev, "failed to enter sleep mode: %d\n", ret);
  417. return ret;
  418. }
  419. regulator_disable(ctx->iovcc);
  420. regulator_disable(ctx->vci);
  421. ctx->prepared = false;
  422. return 0;
  423. }
  424. static int ltk050h3146w_prepare(struct drm_panel *panel)
  425. {
  426. struct ltk050h3146w *ctx = panel_to_ltk050h3146w(panel);
  427. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  428. int ret;
  429. if (ctx->prepared)
  430. return 0;
  431. dev_dbg(ctx->dev, "Resetting the panel\n");
  432. ret = regulator_enable(ctx->vci);
  433. if (ret < 0) {
  434. dev_err(ctx->dev, "Failed to enable vci supply: %d\n", ret);
  435. return ret;
  436. }
  437. ret = regulator_enable(ctx->iovcc);
  438. if (ret < 0) {
  439. dev_err(ctx->dev, "Failed to enable iovcc supply: %d\n", ret);
  440. goto disable_vci;
  441. }
  442. gpiod_set_value_cansleep(ctx->reset_gpio, 1);
  443. usleep_range(5000, 6000);
  444. gpiod_set_value_cansleep(ctx->reset_gpio, 0);
  445. msleep(20);
  446. ret = ctx->panel_desc->init(ctx);
  447. if (ret < 0) {
  448. dev_err(ctx->dev, "Panel init sequence failed: %d\n", ret);
  449. goto disable_iovcc;
  450. }
  451. ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
  452. if (ret < 0) {
  453. dev_err(ctx->dev, "Failed to exit sleep mode: %d\n", ret);
  454. goto disable_iovcc;
  455. }
  456. /* T9: 120ms */
  457. msleep(120);
  458. ret = mipi_dsi_dcs_set_display_on(dsi);
  459. if (ret < 0) {
  460. dev_err(ctx->dev, "Failed to set display on: %d\n", ret);
  461. goto disable_iovcc;
  462. }
  463. msleep(50);
  464. ctx->prepared = true;
  465. return 0;
  466. disable_iovcc:
  467. regulator_disable(ctx->iovcc);
  468. disable_vci:
  469. regulator_disable(ctx->vci);
  470. return ret;
  471. }
  472. static int ltk050h3146w_get_modes(struct drm_panel *panel,
  473. struct drm_connector *connector)
  474. {
  475. struct ltk050h3146w *ctx = panel_to_ltk050h3146w(panel);
  476. struct drm_display_mode *mode;
  477. mode = drm_mode_duplicate(connector->dev, ctx->panel_desc->mode);
  478. if (!mode)
  479. return -ENOMEM;
  480. drm_mode_set_name(mode);
  481. mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
  482. connector->display_info.width_mm = mode->width_mm;
  483. connector->display_info.height_mm = mode->height_mm;
  484. drm_mode_probed_add(connector, mode);
  485. return 1;
  486. }
  487. static const struct drm_panel_funcs ltk050h3146w_funcs = {
  488. .unprepare = ltk050h3146w_unprepare,
  489. .prepare = ltk050h3146w_prepare,
  490. .get_modes = ltk050h3146w_get_modes,
  491. };
  492. static int ltk050h3146w_probe(struct mipi_dsi_device *dsi)
  493. {
  494. struct device *dev = &dsi->dev;
  495. struct ltk050h3146w *ctx;
  496. int ret;
  497. ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
  498. if (!ctx)
  499. return -ENOMEM;
  500. ctx->panel_desc = of_device_get_match_data(dev);
  501. if (!ctx->panel_desc)
  502. return -EINVAL;
  503. ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
  504. if (IS_ERR(ctx->reset_gpio)) {
  505. dev_err(dev, "cannot get reset gpio\n");
  506. return PTR_ERR(ctx->reset_gpio);
  507. }
  508. ctx->vci = devm_regulator_get(dev, "vci");
  509. if (IS_ERR(ctx->vci)) {
  510. ret = PTR_ERR(ctx->vci);
  511. if (ret != -EPROBE_DEFER)
  512. dev_err(dev, "Failed to request vci regulator: %d\n", ret);
  513. return ret;
  514. }
  515. ctx->iovcc = devm_regulator_get(dev, "iovcc");
  516. if (IS_ERR(ctx->iovcc)) {
  517. ret = PTR_ERR(ctx->iovcc);
  518. if (ret != -EPROBE_DEFER)
  519. dev_err(dev, "Failed to request iovcc regulator: %d\n", ret);
  520. return ret;
  521. }
  522. mipi_dsi_set_drvdata(dsi, ctx);
  523. ctx->dev = dev;
  524. dsi->lanes = 4;
  525. dsi->format = MIPI_DSI_FMT_RGB888;
  526. dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
  527. MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET;
  528. drm_panel_init(&ctx->panel, &dsi->dev, &ltk050h3146w_funcs,
  529. DRM_MODE_CONNECTOR_DSI);
  530. ret = drm_panel_of_backlight(&ctx->panel);
  531. if (ret)
  532. return ret;
  533. drm_panel_add(&ctx->panel);
  534. ret = mipi_dsi_attach(dsi);
  535. if (ret < 0) {
  536. dev_err(dev, "mipi_dsi_attach failed: %d\n", ret);
  537. drm_panel_remove(&ctx->panel);
  538. return ret;
  539. }
  540. return 0;
  541. }
  542. static void ltk050h3146w_shutdown(struct mipi_dsi_device *dsi)
  543. {
  544. struct ltk050h3146w *ctx = mipi_dsi_get_drvdata(dsi);
  545. int ret;
  546. ret = drm_panel_unprepare(&ctx->panel);
  547. if (ret < 0)
  548. dev_err(&dsi->dev, "Failed to unprepare panel: %d\n", ret);
  549. ret = drm_panel_disable(&ctx->panel);
  550. if (ret < 0)
  551. dev_err(&dsi->dev, "Failed to disable panel: %d\n", ret);
  552. }
  553. static int ltk050h3146w_remove(struct mipi_dsi_device *dsi)
  554. {
  555. struct ltk050h3146w *ctx = mipi_dsi_get_drvdata(dsi);
  556. int ret;
  557. ltk050h3146w_shutdown(dsi);
  558. ret = mipi_dsi_detach(dsi);
  559. if (ret < 0)
  560. dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
  561. drm_panel_remove(&ctx->panel);
  562. return 0;
  563. }
  564. static const struct of_device_id ltk050h3146w_of_match[] = {
  565. {
  566. .compatible = "leadtek,ltk050h3146w",
  567. .data = &ltk050h3146w_data,
  568. },
  569. {
  570. .compatible = "leadtek,ltk050h3146w-a2",
  571. .data = &ltk050h3146w_a2_data,
  572. },
  573. { /* sentinel */ }
  574. };
  575. MODULE_DEVICE_TABLE(of, ltk050h3146w_of_match);
  576. static struct mipi_dsi_driver ltk050h3146w_driver = {
  577. .driver = {
  578. .name = "panel-leadtek-ltk050h3146w",
  579. .of_match_table = ltk050h3146w_of_match,
  580. },
  581. .probe = ltk050h3146w_probe,
  582. .remove = ltk050h3146w_remove,
  583. .shutdown = ltk050h3146w_shutdown,
  584. };
  585. module_mipi_dsi_driver(ltk050h3146w_driver);
  586. MODULE_AUTHOR("Heiko Stuebner <heiko.stuebner@theobroma-systems.com>");
  587. MODULE_DESCRIPTION("DRM driver for Leadtek LTK050H3146W MIPI DSI panel");
  588. MODULE_LICENSE("GPL v2");