nouveau_bios.c 59 KB

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  1. /*
  2. * Copyright 2005-2006 Erik Waling
  3. * Copyright 2006 Stephane Marchesin
  4. * Copyright 2007-2009 Stuart Bennett
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  20. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  21. * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22. * SOFTWARE.
  23. */
  24. #include "nouveau_drv.h"
  25. #include "nouveau_reg.h"
  26. #include "dispnv04/hw.h"
  27. #include "nouveau_encoder.h"
  28. #include <linux/io-mapping.h>
  29. #include <linux/firmware.h>
  30. /* these defines are made up */
  31. #define NV_CIO_CRE_44_HEADA 0x0
  32. #define NV_CIO_CRE_44_HEADB 0x3
  33. #define FEATURE_MOBILE 0x10 /* also FEATURE_QUADRO for BMP */
  34. #define EDID1_LEN 128
  35. #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)
  36. #define LOG_OLD_VALUE(x)
  37. struct init_exec {
  38. bool execute;
  39. bool repeat;
  40. };
  41. static bool nv_cksum(const uint8_t *data, unsigned int length)
  42. {
  43. /*
  44. * There's a few checksums in the BIOS, so here's a generic checking
  45. * function.
  46. */
  47. int i;
  48. uint8_t sum = 0;
  49. for (i = 0; i < length; i++)
  50. sum += data[i];
  51. if (sum)
  52. return true;
  53. return false;
  54. }
  55. static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk)
  56. {
  57. int compare_record_len, i = 0;
  58. uint16_t compareclk, scriptptr = 0;
  59. if (bios->major_version < 5) /* pre BIT */
  60. compare_record_len = 3;
  61. else
  62. compare_record_len = 4;
  63. do {
  64. compareclk = ROM16(bios->data[clktable + compare_record_len * i]);
  65. if (pxclk >= compareclk * 10) {
  66. if (bios->major_version < 5) {
  67. uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i];
  68. scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]);
  69. } else
  70. scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]);
  71. break;
  72. }
  73. i++;
  74. } while (compareclk);
  75. return scriptptr;
  76. }
  77. static void
  78. run_digital_op_script(struct drm_device *dev, uint16_t scriptptr,
  79. struct dcb_output *dcbent, int head, bool dl)
  80. {
  81. struct nouveau_drm *drm = nouveau_drm(dev);
  82. NV_INFO(drm, "0x%04X: Parsing digital output script table\n",
  83. scriptptr);
  84. NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB :
  85. NV_CIO_CRE_44_HEADA);
  86. nouveau_bios_run_init_table(dev, scriptptr, dcbent, head);
  87. nv04_dfp_bind_head(dev, dcbent, head, dl);
  88. }
  89. static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script)
  90. {
  91. struct nouveau_drm *drm = nouveau_drm(dev);
  92. struct nvbios *bios = &drm->vbios;
  93. uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0);
  94. uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]);
  95. if (!bios->fp.xlated_entry || !sub || !scriptofs)
  96. return -EINVAL;
  97. run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link);
  98. if (script == LVDS_PANEL_OFF) {
  99. /* off-on delay in ms */
  100. mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7]));
  101. }
  102. #ifdef __powerpc__
  103. /* Powerbook specific quirks */
  104. if (script == LVDS_RESET &&
  105. (dev->pdev->device == 0x0179 || dev->pdev->device == 0x0189 ||
  106. dev->pdev->device == 0x0329))
  107. nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72);
  108. #endif
  109. return 0;
  110. }
  111. static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
  112. {
  113. /*
  114. * The BIT LVDS table's header has the information to setup the
  115. * necessary registers. Following the standard 4 byte header are:
  116. * A bitmask byte and a dual-link transition pxclk value for use in
  117. * selecting the init script when not using straps; 4 script pointers
  118. * for panel power, selected by output and on/off; and 8 table pointers
  119. * for panel init, the needed one determined by output, and bits in the
  120. * conf byte. These tables are similar to the TMDS tables, consisting
  121. * of a list of pxclks and script pointers.
  122. */
  123. struct nouveau_drm *drm = nouveau_drm(dev);
  124. struct nvbios *bios = &drm->vbios;
  125. unsigned int outputset = (dcbent->or == 4) ? 1 : 0;
  126. uint16_t scriptptr = 0, clktable;
  127. /*
  128. * For now we assume version 3.0 table - g80 support will need some
  129. * changes
  130. */
  131. switch (script) {
  132. case LVDS_INIT:
  133. return -ENOSYS;
  134. case LVDS_BACKLIGHT_ON:
  135. case LVDS_PANEL_ON:
  136. scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]);
  137. break;
  138. case LVDS_BACKLIGHT_OFF:
  139. case LVDS_PANEL_OFF:
  140. scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]);
  141. break;
  142. case LVDS_RESET:
  143. clktable = bios->fp.lvdsmanufacturerpointer + 15;
  144. if (dcbent->or == 4)
  145. clktable += 8;
  146. if (dcbent->lvdsconf.use_straps_for_mode) {
  147. if (bios->fp.dual_link)
  148. clktable += 4;
  149. if (bios->fp.if_is_24bit)
  150. clktable += 2;
  151. } else {
  152. /* using EDID */
  153. int cmpval_24bit = (dcbent->or == 4) ? 4 : 1;
  154. if (bios->fp.dual_link) {
  155. clktable += 4;
  156. cmpval_24bit <<= 1;
  157. }
  158. if (bios->fp.strapless_is_24bit & cmpval_24bit)
  159. clktable += 2;
  160. }
  161. clktable = ROM16(bios->data[clktable]);
  162. if (!clktable) {
  163. NV_ERROR(drm, "Pixel clock comparison table not found\n");
  164. return -ENOENT;
  165. }
  166. scriptptr = clkcmptable(bios, clktable, pxclk);
  167. }
  168. if (!scriptptr) {
  169. NV_ERROR(drm, "LVDS output init script not found\n");
  170. return -ENOENT;
  171. }
  172. run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link);
  173. return 0;
  174. }
  175. int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
  176. {
  177. /*
  178. * LVDS operations are multiplexed in an effort to present a single API
  179. * which works with two vastly differing underlying structures.
  180. * This acts as the demux
  181. */
  182. struct nouveau_drm *drm = nouveau_drm(dev);
  183. struct nvif_object *device = &drm->client.device.object;
  184. struct nvbios *bios = &drm->vbios;
  185. uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
  186. uint32_t sel_clk_binding, sel_clk;
  187. int ret;
  188. if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver ||
  189. (lvds_ver >= 0x30 && script == LVDS_INIT))
  190. return 0;
  191. if (!bios->fp.lvds_init_run) {
  192. bios->fp.lvds_init_run = true;
  193. call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk);
  194. }
  195. if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change)
  196. call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk);
  197. if (script == LVDS_RESET && bios->fp.power_off_for_reset)
  198. call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk);
  199. NV_INFO(drm, "Calling LVDS script %d:\n", script);
  200. /* don't let script change pll->head binding */
  201. sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
  202. if (lvds_ver < 0x30)
  203. ret = call_lvds_manufacturer_script(dev, dcbent, head, script);
  204. else
  205. ret = run_lvds_table(dev, dcbent, head, script, pxclk);
  206. bios->fp.last_script_invoc = (script << 1 | head);
  207. sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
  208. NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
  209. /* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */
  210. nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0);
  211. return ret;
  212. }
  213. struct lvdstableheader {
  214. uint8_t lvds_ver, headerlen, recordlen;
  215. };
  216. static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth)
  217. {
  218. /*
  219. * BMP version (0xa) LVDS table has a simple header of version and
  220. * record length. The BIT LVDS table has the typical BIT table header:
  221. * version byte, header length byte, record length byte, and a byte for
  222. * the maximum number of records that can be held in the table.
  223. */
  224. struct nouveau_drm *drm = nouveau_drm(dev);
  225. uint8_t lvds_ver, headerlen, recordlen;
  226. memset(lth, 0, sizeof(struct lvdstableheader));
  227. if (bios->fp.lvdsmanufacturerpointer == 0x0) {
  228. NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n");
  229. return -EINVAL;
  230. }
  231. lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
  232. switch (lvds_ver) {
  233. case 0x0a: /* pre NV40 */
  234. headerlen = 2;
  235. recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
  236. break;
  237. case 0x30: /* NV4x */
  238. headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
  239. if (headerlen < 0x1f) {
  240. NV_ERROR(drm, "LVDS table header not understood\n");
  241. return -EINVAL;
  242. }
  243. recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
  244. break;
  245. case 0x40: /* G80/G90 */
  246. headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
  247. if (headerlen < 0x7) {
  248. NV_ERROR(drm, "LVDS table header not understood\n");
  249. return -EINVAL;
  250. }
  251. recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
  252. break;
  253. default:
  254. NV_ERROR(drm,
  255. "LVDS table revision %d.%d not currently supported\n",
  256. lvds_ver >> 4, lvds_ver & 0xf);
  257. return -ENOSYS;
  258. }
  259. lth->lvds_ver = lvds_ver;
  260. lth->headerlen = headerlen;
  261. lth->recordlen = recordlen;
  262. return 0;
  263. }
  264. static int
  265. get_fp_strap(struct drm_device *dev, struct nvbios *bios)
  266. {
  267. struct nouveau_drm *drm = nouveau_drm(dev);
  268. struct nvif_object *device = &drm->client.device.object;
  269. /*
  270. * The fp strap is normally dictated by the "User Strap" in
  271. * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the
  272. * Internal_Flags struct at 0x48 is set, the user strap gets overriden
  273. * by the PCI subsystem ID during POST, but not before the previous user
  274. * strap has been committed to CR58 for CR57=0xf on head A, which may be
  275. * read and used instead
  276. */
  277. if (bios->major_version < 5 && bios->data[0x48] & 0x4)
  278. return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf;
  279. if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_MAXWELL)
  280. return nvif_rd32(device, 0x001800) & 0x0000000f;
  281. else
  282. if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA)
  283. return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf;
  284. else
  285. return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf;
  286. }
  287. static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios)
  288. {
  289. struct nouveau_drm *drm = nouveau_drm(dev);
  290. uint8_t *fptable;
  291. uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex;
  292. int ret, ofs, fpstrapping;
  293. struct lvdstableheader lth;
  294. if (bios->fp.fptablepointer == 0x0) {
  295. /* Most laptop cards lack an fp table. They use DDC. */
  296. NV_DEBUG(drm, "Pointer to flat panel table invalid\n");
  297. bios->digital_min_front_porch = 0x4b;
  298. return 0;
  299. }
  300. fptable = &bios->data[bios->fp.fptablepointer];
  301. fptable_ver = fptable[0];
  302. switch (fptable_ver) {
  303. /*
  304. * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no
  305. * version field, and miss one of the spread spectrum/PWM bytes.
  306. * This could affect early GF2Go parts (not seen any appropriate ROMs
  307. * though). Here we assume that a version of 0x05 matches this case
  308. * (combining with a BMP version check would be better), as the
  309. * common case for the panel type field is 0x0005, and that is in
  310. * fact what we are reading the first byte of.
  311. */
  312. case 0x05: /* some NV10, 11, 15, 16 */
  313. recordlen = 42;
  314. ofs = -1;
  315. break;
  316. case 0x10: /* some NV15/16, and NV11+ */
  317. recordlen = 44;
  318. ofs = 0;
  319. break;
  320. case 0x20: /* NV40+ */
  321. headerlen = fptable[1];
  322. recordlen = fptable[2];
  323. fpentries = fptable[3];
  324. /*
  325. * fptable[4] is the minimum
  326. * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap
  327. */
  328. bios->digital_min_front_porch = fptable[4];
  329. ofs = -7;
  330. break;
  331. default:
  332. NV_ERROR(drm,
  333. "FP table revision %d.%d not currently supported\n",
  334. fptable_ver >> 4, fptable_ver & 0xf);
  335. return -ENOSYS;
  336. }
  337. if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */
  338. return 0;
  339. ret = parse_lvds_manufacturer_table_header(dev, bios, &lth);
  340. if (ret)
  341. return ret;
  342. if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) {
  343. bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer +
  344. lth.headerlen + 1;
  345. bios->fp.xlatwidth = lth.recordlen;
  346. }
  347. if (bios->fp.fpxlatetableptr == 0x0) {
  348. NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n");
  349. return -EINVAL;
  350. }
  351. fpstrapping = get_fp_strap(dev, bios);
  352. fpindex = bios->data[bios->fp.fpxlatetableptr +
  353. fpstrapping * bios->fp.xlatwidth];
  354. if (fpindex > fpentries) {
  355. NV_ERROR(drm, "Bad flat panel table index\n");
  356. return -ENOENT;
  357. }
  358. /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */
  359. if (lth.lvds_ver > 0x10)
  360. bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf;
  361. /*
  362. * If either the strap or xlated fpindex value are 0xf there is no
  363. * panel using a strap-derived bios mode present. this condition
  364. * includes, but is different from, the DDC panel indicator above
  365. */
  366. if (fpstrapping == 0xf || fpindex == 0xf)
  367. return 0;
  368. bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen +
  369. recordlen * fpindex + ofs;
  370. NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n",
  371. ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1,
  372. ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1,
  373. ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10);
  374. return 0;
  375. }
  376. bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode)
  377. {
  378. struct nouveau_drm *drm = nouveau_drm(dev);
  379. struct nvbios *bios = &drm->vbios;
  380. uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr];
  381. if (!mode) /* just checking whether we can produce a mode */
  382. return bios->fp.mode_ptr;
  383. memset(mode, 0, sizeof(struct drm_display_mode));
  384. /*
  385. * For version 1.0 (version in byte 0):
  386. * bytes 1-2 are "panel type", including bits on whether Colour/mono,
  387. * single/dual link, and type (TFT etc.)
  388. * bytes 3-6 are bits per colour in RGBX
  389. */
  390. mode->clock = ROM16(mode_entry[7]) * 10;
  391. /* bytes 9-10 is HActive */
  392. mode->hdisplay = ROM16(mode_entry[11]) + 1;
  393. /*
  394. * bytes 13-14 is HValid Start
  395. * bytes 15-16 is HValid End
  396. */
  397. mode->hsync_start = ROM16(mode_entry[17]) + 1;
  398. mode->hsync_end = ROM16(mode_entry[19]) + 1;
  399. mode->htotal = ROM16(mode_entry[21]) + 1;
  400. /* bytes 23-24, 27-30 similarly, but vertical */
  401. mode->vdisplay = ROM16(mode_entry[25]) + 1;
  402. mode->vsync_start = ROM16(mode_entry[31]) + 1;
  403. mode->vsync_end = ROM16(mode_entry[33]) + 1;
  404. mode->vtotal = ROM16(mode_entry[35]) + 1;
  405. mode->flags |= (mode_entry[37] & 0x10) ?
  406. DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
  407. mode->flags |= (mode_entry[37] & 0x1) ?
  408. DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
  409. /*
  410. * bytes 38-39 relate to spread spectrum settings
  411. * bytes 40-43 are something to do with PWM
  412. */
  413. mode->status = MODE_OK;
  414. mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
  415. drm_mode_set_name(mode);
  416. return bios->fp.mode_ptr;
  417. }
  418. int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit)
  419. {
  420. /*
  421. * The LVDS table header is (mostly) described in
  422. * parse_lvds_manufacturer_table_header(): the BIT header additionally
  423. * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if
  424. * straps are not being used for the panel, this specifies the frequency
  425. * at which modes should be set up in the dual link style.
  426. *
  427. * Following the header, the BMP (ver 0xa) table has several records,
  428. * indexed by a separate xlat table, indexed in turn by the fp strap in
  429. * EXTDEV_BOOT. Each record had a config byte, followed by 6 script
  430. * numbers for use by INIT_SUB which controlled panel init and power,
  431. * and finally a dword of ms to sleep between power off and on
  432. * operations.
  433. *
  434. * In the BIT versions, the table following the header serves as an
  435. * integrated config and xlat table: the records in the table are
  436. * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has
  437. * two bytes - the first as a config byte, the second for indexing the
  438. * fp mode table pointed to by the BIT 'D' table
  439. *
  440. * DDC is not used until after card init, so selecting the correct table
  441. * entry and setting the dual link flag for EDID equipped panels,
  442. * requiring tests against the native-mode pixel clock, cannot be done
  443. * until later, when this function should be called with non-zero pxclk
  444. */
  445. struct nouveau_drm *drm = nouveau_drm(dev);
  446. struct nvbios *bios = &drm->vbios;
  447. int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0;
  448. struct lvdstableheader lth;
  449. uint16_t lvdsofs;
  450. int ret, chip_version = bios->chip_version;
  451. ret = parse_lvds_manufacturer_table_header(dev, bios, &lth);
  452. if (ret)
  453. return ret;
  454. switch (lth.lvds_ver) {
  455. case 0x0a: /* pre NV40 */
  456. lvdsmanufacturerindex = bios->data[
  457. bios->fp.fpxlatemanufacturertableptr +
  458. fpstrapping];
  459. /* we're done if this isn't the EDID panel case */
  460. if (!pxclk)
  461. break;
  462. if (chip_version < 0x25) {
  463. /* nv17 behaviour
  464. *
  465. * It seems the old style lvds script pointer is reused
  466. * to select 18/24 bit colour depth for EDID panels.
  467. */
  468. lvdsmanufacturerindex =
  469. (bios->legacy.lvds_single_a_script_ptr & 1) ?
  470. 2 : 0;
  471. if (pxclk >= bios->fp.duallink_transition_clk)
  472. lvdsmanufacturerindex++;
  473. } else if (chip_version < 0x30) {
  474. /* nv28 behaviour (off-chip encoder)
  475. *
  476. * nv28 does a complex dance of first using byte 121 of
  477. * the EDID to choose the lvdsmanufacturerindex, then
  478. * later attempting to match the EDID manufacturer and
  479. * product IDs in a table (signature 'pidt' (panel id
  480. * table?)), setting an lvdsmanufacturerindex of 0 and
  481. * an fp strap of the match index (or 0xf if none)
  482. */
  483. lvdsmanufacturerindex = 0;
  484. } else {
  485. /* nv31, nv34 behaviour */
  486. lvdsmanufacturerindex = 0;
  487. if (pxclk >= bios->fp.duallink_transition_clk)
  488. lvdsmanufacturerindex = 2;
  489. if (pxclk >= 140000)
  490. lvdsmanufacturerindex = 3;
  491. }
  492. /*
  493. * nvidia set the high nibble of (cr57=f, cr58) to
  494. * lvdsmanufacturerindex in this case; we don't
  495. */
  496. break;
  497. case 0x30: /* NV4x */
  498. case 0x40: /* G80/G90 */
  499. lvdsmanufacturerindex = fpstrapping;
  500. break;
  501. default:
  502. NV_ERROR(drm, "LVDS table revision not currently supported\n");
  503. return -ENOSYS;
  504. }
  505. lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex;
  506. switch (lth.lvds_ver) {
  507. case 0x0a:
  508. bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1;
  509. bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2;
  510. bios->fp.dual_link = bios->data[lvdsofs] & 4;
  511. bios->fp.link_c_increment = bios->data[lvdsofs] & 8;
  512. *if_is_24bit = bios->data[lvdsofs] & 16;
  513. break;
  514. case 0x30:
  515. case 0x40:
  516. /*
  517. * No sign of the "power off for reset" or "reset for panel
  518. * on" bits, but it's safer to assume we should
  519. */
  520. bios->fp.power_off_for_reset = true;
  521. bios->fp.reset_after_pclk_change = true;
  522. /*
  523. * It's ok lvdsofs is wrong for nv4x edid case; dual_link is
  524. * over-written, and if_is_24bit isn't used
  525. */
  526. bios->fp.dual_link = bios->data[lvdsofs] & 1;
  527. bios->fp.if_is_24bit = bios->data[lvdsofs] & 2;
  528. bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4];
  529. bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10;
  530. break;
  531. }
  532. /* set dual_link flag for EDID case */
  533. if (pxclk && (chip_version < 0x25 || chip_version > 0x28))
  534. bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk);
  535. *dl = bios->fp.dual_link;
  536. return 0;
  537. }
  538. int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk)
  539. {
  540. /*
  541. * the pxclk parameter is in kHz
  542. *
  543. * This runs the TMDS regs setting code found on BIT bios cards
  544. *
  545. * For ffs(or) == 1 use the first table, for ffs(or) == 2 and
  546. * ffs(or) == 3, use the second.
  547. */
  548. struct nouveau_drm *drm = nouveau_drm(dev);
  549. struct nvif_object *device = &drm->client.device.object;
  550. struct nvbios *bios = &drm->vbios;
  551. int cv = bios->chip_version;
  552. uint16_t clktable = 0, scriptptr;
  553. uint32_t sel_clk_binding, sel_clk;
  554. /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */
  555. if (cv >= 0x17 && cv != 0x1a && cv != 0x20 &&
  556. dcbent->location != DCB_LOC_ON_CHIP)
  557. return 0;
  558. switch (ffs(dcbent->or)) {
  559. case 1:
  560. clktable = bios->tmds.output0_script_ptr;
  561. break;
  562. case 2:
  563. case 3:
  564. clktable = bios->tmds.output1_script_ptr;
  565. break;
  566. }
  567. if (!clktable) {
  568. NV_ERROR(drm, "Pixel clock comparison table not found\n");
  569. return -EINVAL;
  570. }
  571. scriptptr = clkcmptable(bios, clktable, pxclk);
  572. if (!scriptptr) {
  573. NV_ERROR(drm, "TMDS output init script not found\n");
  574. return -ENOENT;
  575. }
  576. /* don't let script change pll->head binding */
  577. sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
  578. run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000);
  579. sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
  580. NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
  581. return 0;
  582. }
  583. static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset)
  584. {
  585. /*
  586. * Parses the init table segment for pointers used in script execution.
  587. *
  588. * offset + 0 (16 bits): init script tables pointer
  589. * offset + 2 (16 bits): macro index table pointer
  590. * offset + 4 (16 bits): macro table pointer
  591. * offset + 6 (16 bits): condition table pointer
  592. * offset + 8 (16 bits): io condition table pointer
  593. * offset + 10 (16 bits): io flag condition table pointer
  594. * offset + 12 (16 bits): init function table pointer
  595. */
  596. bios->init_script_tbls_ptr = ROM16(bios->data[offset]);
  597. }
  598. static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
  599. {
  600. /*
  601. * Parses the load detect values for g80 cards.
  602. *
  603. * offset + 0 (16 bits): loadval table pointer
  604. */
  605. struct nouveau_drm *drm = nouveau_drm(dev);
  606. uint16_t load_table_ptr;
  607. uint8_t version, headerlen, entrylen, num_entries;
  608. if (bitentry->length != 3) {
  609. NV_ERROR(drm, "Do not understand BIT A table\n");
  610. return -EINVAL;
  611. }
  612. load_table_ptr = ROM16(bios->data[bitentry->offset]);
  613. if (load_table_ptr == 0x0) {
  614. NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n");
  615. return -EINVAL;
  616. }
  617. version = bios->data[load_table_ptr];
  618. if (version != 0x10) {
  619. NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n",
  620. version >> 4, version & 0xF);
  621. return -ENOSYS;
  622. }
  623. headerlen = bios->data[load_table_ptr + 1];
  624. entrylen = bios->data[load_table_ptr + 2];
  625. num_entries = bios->data[load_table_ptr + 3];
  626. if (headerlen != 4 || entrylen != 4 || num_entries != 2) {
  627. NV_ERROR(drm, "Do not understand BIT loadval table\n");
  628. return -EINVAL;
  629. }
  630. /* First entry is normal dac, 2nd tv-out perhaps? */
  631. bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff;
  632. return 0;
  633. }
  634. static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
  635. {
  636. /*
  637. * Parses the flat panel table segment that the bit entry points to.
  638. * Starting at bitentry->offset:
  639. *
  640. * offset + 0 (16 bits): ??? table pointer - seems to have 18 byte
  641. * records beginning with a freq.
  642. * offset + 2 (16 bits): mode table pointer
  643. */
  644. struct nouveau_drm *drm = nouveau_drm(dev);
  645. if (bitentry->length != 4) {
  646. NV_ERROR(drm, "Do not understand BIT display table\n");
  647. return -EINVAL;
  648. }
  649. bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]);
  650. return 0;
  651. }
  652. static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
  653. {
  654. /*
  655. * Parses the init table segment that the bit entry points to.
  656. *
  657. * See parse_script_table_pointers for layout
  658. */
  659. struct nouveau_drm *drm = nouveau_drm(dev);
  660. if (bitentry->length < 14) {
  661. NV_ERROR(drm, "Do not understand init table\n");
  662. return -EINVAL;
  663. }
  664. parse_script_table_pointers(bios, bitentry->offset);
  665. return 0;
  666. }
  667. static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
  668. {
  669. /*
  670. * BIT 'i' (info?) table
  671. *
  672. * offset + 0 (32 bits): BIOS version dword (as in B table)
  673. * offset + 5 (8 bits): BIOS feature byte (same as for BMP?)
  674. * offset + 13 (16 bits): pointer to table containing DAC load
  675. * detection comparison values
  676. *
  677. * There's other things in the table, purpose unknown
  678. */
  679. struct nouveau_drm *drm = nouveau_drm(dev);
  680. uint16_t daccmpoffset;
  681. uint8_t dacver, dacheaderlen;
  682. if (bitentry->length < 6) {
  683. NV_ERROR(drm, "BIT i table too short for needed information\n");
  684. return -EINVAL;
  685. }
  686. /*
  687. * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's
  688. * Quadro identity crisis), other bits possibly as for BMP feature byte
  689. */
  690. bios->feature_byte = bios->data[bitentry->offset + 5];
  691. bios->is_mobile = bios->feature_byte & FEATURE_MOBILE;
  692. if (bitentry->length < 15) {
  693. NV_WARN(drm, "BIT i table not long enough for DAC load "
  694. "detection comparison table\n");
  695. return -EINVAL;
  696. }
  697. daccmpoffset = ROM16(bios->data[bitentry->offset + 13]);
  698. /* doesn't exist on g80 */
  699. if (!daccmpoffset)
  700. return 0;
  701. /*
  702. * The first value in the table, following the header, is the
  703. * comparison value, the second entry is a comparison value for
  704. * TV load detection.
  705. */
  706. dacver = bios->data[daccmpoffset];
  707. dacheaderlen = bios->data[daccmpoffset + 1];
  708. if (dacver != 0x00 && dacver != 0x10) {
  709. NV_WARN(drm, "DAC load detection comparison table version "
  710. "%d.%d not known\n", dacver >> 4, dacver & 0xf);
  711. return -ENOSYS;
  712. }
  713. bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]);
  714. bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]);
  715. return 0;
  716. }
  717. static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
  718. {
  719. /*
  720. * Parses the LVDS table segment that the bit entry points to.
  721. * Starting at bitentry->offset:
  722. *
  723. * offset + 0 (16 bits): LVDS strap xlate table pointer
  724. */
  725. struct nouveau_drm *drm = nouveau_drm(dev);
  726. if (bitentry->length != 2) {
  727. NV_ERROR(drm, "Do not understand BIT LVDS table\n");
  728. return -EINVAL;
  729. }
  730. /*
  731. * No idea if it's still called the LVDS manufacturer table, but
  732. * the concept's close enough.
  733. */
  734. bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]);
  735. return 0;
  736. }
  737. static int
  738. parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios,
  739. struct bit_entry *bitentry)
  740. {
  741. /*
  742. * offset + 2 (8 bits): number of options in an
  743. * INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set
  744. * offset + 3 (16 bits): pointer to strap xlate table for RAM
  745. * restrict option selection
  746. *
  747. * There's a bunch of bits in this table other than the RAM restrict
  748. * stuff that we don't use - their use currently unknown
  749. */
  750. /*
  751. * Older bios versions don't have a sufficiently long table for
  752. * what we want
  753. */
  754. if (bitentry->length < 0x5)
  755. return 0;
  756. if (bitentry->version < 2) {
  757. bios->ram_restrict_group_count = bios->data[bitentry->offset + 2];
  758. bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]);
  759. } else {
  760. bios->ram_restrict_group_count = bios->data[bitentry->offset + 0];
  761. bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]);
  762. }
  763. return 0;
  764. }
  765. static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
  766. {
  767. /*
  768. * Parses the pointer to the TMDS table
  769. *
  770. * Starting at bitentry->offset:
  771. *
  772. * offset + 0 (16 bits): TMDS table pointer
  773. *
  774. * The TMDS table is typically found just before the DCB table, with a
  775. * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being
  776. * length?)
  777. *
  778. * At offset +7 is a pointer to a script, which I don't know how to
  779. * run yet.
  780. * At offset +9 is a pointer to another script, likewise
  781. * Offset +11 has a pointer to a table where the first word is a pxclk
  782. * frequency and the second word a pointer to a script, which should be
  783. * run if the comparison pxclk frequency is less than the pxclk desired.
  784. * This repeats for decreasing comparison frequencies
  785. * Offset +13 has a pointer to a similar table
  786. * The selection of table (and possibly +7/+9 script) is dictated by
  787. * "or" from the DCB.
  788. */
  789. struct nouveau_drm *drm = nouveau_drm(dev);
  790. uint16_t tmdstableptr, script1, script2;
  791. if (bitentry->length != 2) {
  792. NV_ERROR(drm, "Do not understand BIT TMDS table\n");
  793. return -EINVAL;
  794. }
  795. tmdstableptr = ROM16(bios->data[bitentry->offset]);
  796. if (!tmdstableptr) {
  797. NV_INFO(drm, "Pointer to TMDS table not found\n");
  798. return -EINVAL;
  799. }
  800. NV_INFO(drm, "TMDS table version %d.%d\n",
  801. bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf);
  802. /* nv50+ has v2.0, but we don't parse it atm */
  803. if (bios->data[tmdstableptr] != 0x11)
  804. return -ENOSYS;
  805. /*
  806. * These two scripts are odd: they don't seem to get run even when
  807. * they are not stubbed.
  808. */
  809. script1 = ROM16(bios->data[tmdstableptr + 7]);
  810. script2 = ROM16(bios->data[tmdstableptr + 9]);
  811. if (bios->data[script1] != 'q' || bios->data[script2] != 'q')
  812. NV_WARN(drm, "TMDS table script pointers not stubbed\n");
  813. bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]);
  814. bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]);
  815. return 0;
  816. }
  817. struct bit_table {
  818. const char id;
  819. int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *);
  820. };
  821. #define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry })
  822. int
  823. bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit)
  824. {
  825. struct nouveau_drm *drm = nouveau_drm(dev);
  826. struct nvbios *bios = &drm->vbios;
  827. u8 entries, *entry;
  828. if (bios->type != NVBIOS_BIT)
  829. return -ENODEV;
  830. entries = bios->data[bios->offset + 10];
  831. entry = &bios->data[bios->offset + 12];
  832. while (entries--) {
  833. if (entry[0] == id) {
  834. bit->id = entry[0];
  835. bit->version = entry[1];
  836. bit->length = ROM16(entry[2]);
  837. bit->offset = ROM16(entry[4]);
  838. bit->data = ROMPTR(dev, entry[4]);
  839. return 0;
  840. }
  841. entry += bios->data[bios->offset + 9];
  842. }
  843. return -ENOENT;
  844. }
  845. static int
  846. parse_bit_table(struct nvbios *bios, const uint16_t bitoffset,
  847. struct bit_table *table)
  848. {
  849. struct drm_device *dev = bios->dev;
  850. struct nouveau_drm *drm = nouveau_drm(dev);
  851. struct bit_entry bitentry;
  852. if (bit_table(dev, table->id, &bitentry) == 0)
  853. return table->parse_fn(dev, bios, &bitentry);
  854. NV_INFO(drm, "BIT table '%c' not found\n", table->id);
  855. return -ENOSYS;
  856. }
  857. static int
  858. parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset)
  859. {
  860. int ret;
  861. /*
  862. * The only restriction on parsing order currently is having 'i' first
  863. * for use of bios->*_version or bios->feature_byte while parsing;
  864. * functions shouldn't be actually *doing* anything apart from pulling
  865. * data from the image into the bios struct, thus no interdependencies
  866. */
  867. ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i));
  868. if (ret) /* info? */
  869. return ret;
  870. if (bios->major_version >= 0x60) /* g80+ */
  871. parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A));
  872. parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display));
  873. ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init));
  874. if (ret)
  875. return ret;
  876. parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */
  877. parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds));
  878. parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds));
  879. return 0;
  880. }
  881. static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset)
  882. {
  883. /*
  884. * Parses the BMP structure for useful things, but does not act on them
  885. *
  886. * offset + 5: BMP major version
  887. * offset + 6: BMP minor version
  888. * offset + 9: BMP feature byte
  889. * offset + 10: BCD encoded BIOS version
  890. *
  891. * offset + 18: init script table pointer (for bios versions < 5.10h)
  892. * offset + 20: extra init script table pointer (for bios
  893. * versions < 5.10h)
  894. *
  895. * offset + 24: memory init table pointer (used on early bios versions)
  896. * offset + 26: SDR memory sequencing setup data table
  897. * offset + 28: DDR memory sequencing setup data table
  898. *
  899. * offset + 54: index of I2C CRTC pair to use for CRT output
  900. * offset + 55: index of I2C CRTC pair to use for TV output
  901. * offset + 56: index of I2C CRTC pair to use for flat panel output
  902. * offset + 58: write CRTC index for I2C pair 0
  903. * offset + 59: read CRTC index for I2C pair 0
  904. * offset + 60: write CRTC index for I2C pair 1
  905. * offset + 61: read CRTC index for I2C pair 1
  906. *
  907. * offset + 67: maximum internal PLL frequency (single stage PLL)
  908. * offset + 71: minimum internal PLL frequency (single stage PLL)
  909. *
  910. * offset + 75: script table pointers, as described in
  911. * parse_script_table_pointers
  912. *
  913. * offset + 89: TMDS single link output A table pointer
  914. * offset + 91: TMDS single link output B table pointer
  915. * offset + 95: LVDS single link output A table pointer
  916. * offset + 105: flat panel timings table pointer
  917. * offset + 107: flat panel strapping translation table pointer
  918. * offset + 117: LVDS manufacturer panel config table pointer
  919. * offset + 119: LVDS manufacturer strapping translation table pointer
  920. *
  921. * offset + 142: PLL limits table pointer
  922. *
  923. * offset + 156: minimum pixel clock for LVDS dual link
  924. */
  925. struct nouveau_drm *drm = nouveau_drm(dev);
  926. uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor;
  927. uint16_t bmplength;
  928. uint16_t legacy_scripts_offset, legacy_i2c_offset;
  929. /* load needed defaults in case we can't parse this info */
  930. bios->digital_min_front_porch = 0x4b;
  931. bios->fmaxvco = 256000;
  932. bios->fminvco = 128000;
  933. bios->fp.duallink_transition_clk = 90000;
  934. bmp_version_major = bmp[5];
  935. bmp_version_minor = bmp[6];
  936. NV_INFO(drm, "BMP version %d.%d\n",
  937. bmp_version_major, bmp_version_minor);
  938. /*
  939. * Make sure that 0x36 is blank and can't be mistaken for a DCB
  940. * pointer on early versions
  941. */
  942. if (bmp_version_major < 5)
  943. *(uint16_t *)&bios->data[0x36] = 0;
  944. /*
  945. * Seems that the minor version was 1 for all major versions prior
  946. * to 5. Version 6 could theoretically exist, but I suspect BIT
  947. * happened instead.
  948. */
  949. if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) {
  950. NV_ERROR(drm, "You have an unsupported BMP version. "
  951. "Please send in your bios\n");
  952. return -ENOSYS;
  953. }
  954. if (bmp_version_major == 0)
  955. /* nothing that's currently useful in this version */
  956. return 0;
  957. else if (bmp_version_major == 1)
  958. bmplength = 44; /* exact for 1.01 */
  959. else if (bmp_version_major == 2)
  960. bmplength = 48; /* exact for 2.01 */
  961. else if (bmp_version_major == 3)
  962. bmplength = 54;
  963. /* guessed - mem init tables added in this version */
  964. else if (bmp_version_major == 4 || bmp_version_minor < 0x1)
  965. /* don't know if 5.0 exists... */
  966. bmplength = 62;
  967. /* guessed - BMP I2C indices added in version 4*/
  968. else if (bmp_version_minor < 0x6)
  969. bmplength = 67; /* exact for 5.01 */
  970. else if (bmp_version_minor < 0x10)
  971. bmplength = 75; /* exact for 5.06 */
  972. else if (bmp_version_minor == 0x10)
  973. bmplength = 89; /* exact for 5.10h */
  974. else if (bmp_version_minor < 0x14)
  975. bmplength = 118; /* exact for 5.11h */
  976. else if (bmp_version_minor < 0x24)
  977. /*
  978. * Not sure of version where pll limits came in;
  979. * certainly exist by 0x24 though.
  980. */
  981. /* length not exact: this is long enough to get lvds members */
  982. bmplength = 123;
  983. else if (bmp_version_minor < 0x27)
  984. /*
  985. * Length not exact: this is long enough to get pll limit
  986. * member
  987. */
  988. bmplength = 144;
  989. else
  990. /*
  991. * Length not exact: this is long enough to get dual link
  992. * transition clock.
  993. */
  994. bmplength = 158;
  995. /* checksum */
  996. if (nv_cksum(bmp, 8)) {
  997. NV_ERROR(drm, "Bad BMP checksum\n");
  998. return -EINVAL;
  999. }
  1000. /*
  1001. * Bit 4 seems to indicate either a mobile bios or a quadro card --
  1002. * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl
  1003. * (not nv10gl), bit 5 that the flat panel tables are present, and
  1004. * bit 6 a tv bios.
  1005. */
  1006. bios->feature_byte = bmp[9];
  1007. if (bmp_version_major < 5 || bmp_version_minor < 0x10)
  1008. bios->old_style_init = true;
  1009. legacy_scripts_offset = 18;
  1010. if (bmp_version_major < 2)
  1011. legacy_scripts_offset -= 4;
  1012. bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]);
  1013. bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]);
  1014. if (bmp_version_major > 2) { /* appears in BMP 3 */
  1015. bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]);
  1016. bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]);
  1017. bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]);
  1018. }
  1019. legacy_i2c_offset = 0x48; /* BMP version 2 & 3 */
  1020. if (bmplength > 61)
  1021. legacy_i2c_offset = offset + 54;
  1022. bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset];
  1023. bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1];
  1024. bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2];
  1025. if (bmplength > 74) {
  1026. bios->fmaxvco = ROM32(bmp[67]);
  1027. bios->fminvco = ROM32(bmp[71]);
  1028. }
  1029. if (bmplength > 88)
  1030. parse_script_table_pointers(bios, offset + 75);
  1031. if (bmplength > 94) {
  1032. bios->tmds.output0_script_ptr = ROM16(bmp[89]);
  1033. bios->tmds.output1_script_ptr = ROM16(bmp[91]);
  1034. /*
  1035. * Never observed in use with lvds scripts, but is reused for
  1036. * 18/24 bit panel interface default for EDID equipped panels
  1037. * (if_is_24bit not set directly to avoid any oscillation).
  1038. */
  1039. bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]);
  1040. }
  1041. if (bmplength > 108) {
  1042. bios->fp.fptablepointer = ROM16(bmp[105]);
  1043. bios->fp.fpxlatetableptr = ROM16(bmp[107]);
  1044. bios->fp.xlatwidth = 1;
  1045. }
  1046. if (bmplength > 120) {
  1047. bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]);
  1048. bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]);
  1049. }
  1050. #if 0
  1051. if (bmplength > 143)
  1052. bios->pll_limit_tbl_ptr = ROM16(bmp[142]);
  1053. #endif
  1054. if (bmplength > 157)
  1055. bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10;
  1056. return 0;
  1057. }
  1058. static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len)
  1059. {
  1060. int i, j;
  1061. for (i = 0; i <= (n - len); i++) {
  1062. for (j = 0; j < len; j++)
  1063. if (data[i + j] != str[j])
  1064. break;
  1065. if (j == len)
  1066. return i;
  1067. }
  1068. return 0;
  1069. }
  1070. void *
  1071. olddcb_table(struct drm_device *dev)
  1072. {
  1073. struct nouveau_drm *drm = nouveau_drm(dev);
  1074. u8 *dcb = NULL;
  1075. if (drm->client.device.info.family > NV_DEVICE_INFO_V0_TNT)
  1076. dcb = ROMPTR(dev, drm->vbios.data[0x36]);
  1077. if (!dcb) {
  1078. NV_WARN(drm, "No DCB data found in VBIOS\n");
  1079. return NULL;
  1080. }
  1081. if (dcb[0] >= 0x42) {
  1082. NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]);
  1083. return NULL;
  1084. } else
  1085. if (dcb[0] >= 0x30) {
  1086. if (ROM32(dcb[6]) == 0x4edcbdcb)
  1087. return dcb;
  1088. } else
  1089. if (dcb[0] >= 0x20) {
  1090. if (ROM32(dcb[4]) == 0x4edcbdcb)
  1091. return dcb;
  1092. } else
  1093. if (dcb[0] >= 0x15) {
  1094. if (!memcmp(&dcb[-7], "DEV_REC", 7))
  1095. return dcb;
  1096. } else {
  1097. /*
  1098. * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but
  1099. * always has the same single (crt) entry, even when tv-out
  1100. * present, so the conclusion is this version cannot really
  1101. * be used.
  1102. *
  1103. * v1.2 tables (some NV6/10, and NV15+) normally have the
  1104. * same 5 entries, which are not specific to the card and so
  1105. * no use.
  1106. *
  1107. * v1.2 does have an I2C table that read_dcb_i2c_table can
  1108. * handle, but cards exist (nv11 in #14821) with a bad i2c
  1109. * table pointer, so use the indices parsed in
  1110. * parse_bmp_structure.
  1111. *
  1112. * v1.1 (NV5+, maybe some NV4) is entirely unhelpful
  1113. */
  1114. NV_WARN(drm, "No useful DCB data in VBIOS\n");
  1115. return NULL;
  1116. }
  1117. NV_WARN(drm, "DCB header validation failed\n");
  1118. return NULL;
  1119. }
  1120. void *
  1121. olddcb_outp(struct drm_device *dev, u8 idx)
  1122. {
  1123. u8 *dcb = olddcb_table(dev);
  1124. if (dcb && dcb[0] >= 0x30) {
  1125. if (idx < dcb[2])
  1126. return dcb + dcb[1] + (idx * dcb[3]);
  1127. } else
  1128. if (dcb && dcb[0] >= 0x20) {
  1129. u8 *i2c = ROMPTR(dev, dcb[2]);
  1130. u8 *ent = dcb + 8 + (idx * 8);
  1131. if (i2c && ent < i2c)
  1132. return ent;
  1133. } else
  1134. if (dcb && dcb[0] >= 0x15) {
  1135. u8 *i2c = ROMPTR(dev, dcb[2]);
  1136. u8 *ent = dcb + 4 + (idx * 10);
  1137. if (i2c && ent < i2c)
  1138. return ent;
  1139. }
  1140. return NULL;
  1141. }
  1142. int
  1143. olddcb_outp_foreach(struct drm_device *dev, void *data,
  1144. int (*exec)(struct drm_device *, void *, int idx, u8 *outp))
  1145. {
  1146. int ret, idx = -1;
  1147. u8 *outp = NULL;
  1148. while ((outp = olddcb_outp(dev, ++idx))) {
  1149. if (ROM32(outp[0]) == 0x00000000)
  1150. break; /* seen on an NV11 with DCB v1.5 */
  1151. if (ROM32(outp[0]) == 0xffffffff)
  1152. break; /* seen on an NV17 with DCB v2.0 */
  1153. if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED)
  1154. continue;
  1155. if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL)
  1156. break;
  1157. ret = exec(dev, data, idx, outp);
  1158. if (ret)
  1159. return ret;
  1160. }
  1161. return 0;
  1162. }
  1163. u8 *
  1164. olddcb_conntab(struct drm_device *dev)
  1165. {
  1166. u8 *dcb = olddcb_table(dev);
  1167. if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) {
  1168. u8 *conntab = ROMPTR(dev, dcb[0x14]);
  1169. if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40)
  1170. return conntab;
  1171. }
  1172. return NULL;
  1173. }
  1174. u8 *
  1175. olddcb_conn(struct drm_device *dev, u8 idx)
  1176. {
  1177. u8 *conntab = olddcb_conntab(dev);
  1178. if (conntab && idx < conntab[2])
  1179. return conntab + conntab[1] + (idx * conntab[3]);
  1180. return NULL;
  1181. }
  1182. static struct dcb_output *new_dcb_entry(struct dcb_table *dcb)
  1183. {
  1184. struct dcb_output *entry = &dcb->entry[dcb->entries];
  1185. memset(entry, 0, sizeof(struct dcb_output));
  1186. entry->index = dcb->entries++;
  1187. return entry;
  1188. }
  1189. static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c,
  1190. int heads, int or)
  1191. {
  1192. struct dcb_output *entry = new_dcb_entry(dcb);
  1193. entry->type = type;
  1194. entry->i2c_index = i2c;
  1195. entry->heads = heads;
  1196. if (type != DCB_OUTPUT_ANALOG)
  1197. entry->location = !DCB_LOC_ON_CHIP; /* ie OFF CHIP */
  1198. entry->or = or;
  1199. }
  1200. static bool
  1201. parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb,
  1202. uint32_t conn, uint32_t conf, struct dcb_output *entry)
  1203. {
  1204. struct nouveau_drm *drm = nouveau_drm(dev);
  1205. int link = 0;
  1206. entry->type = conn & 0xf;
  1207. entry->i2c_index = (conn >> 4) & 0xf;
  1208. entry->heads = (conn >> 8) & 0xf;
  1209. entry->connector = (conn >> 12) & 0xf;
  1210. entry->bus = (conn >> 16) & 0xf;
  1211. entry->location = (conn >> 20) & 0x3;
  1212. entry->or = (conn >> 24) & 0xf;
  1213. switch (entry->type) {
  1214. case DCB_OUTPUT_ANALOG:
  1215. /*
  1216. * Although the rest of a CRT conf dword is usually
  1217. * zeros, mac biosen have stuff there so we must mask
  1218. */
  1219. entry->crtconf.maxfreq = (dcb->version < 0x30) ?
  1220. (conf & 0xffff) * 10 :
  1221. (conf & 0xff) * 10000;
  1222. break;
  1223. case DCB_OUTPUT_LVDS:
  1224. {
  1225. uint32_t mask;
  1226. if (conf & 0x1)
  1227. entry->lvdsconf.use_straps_for_mode = true;
  1228. if (dcb->version < 0x22) {
  1229. mask = ~0xd;
  1230. /*
  1231. * The laptop in bug 14567 lies and claims to not use
  1232. * straps when it does, so assume all DCB 2.0 laptops
  1233. * use straps, until a broken EDID using one is produced
  1234. */
  1235. entry->lvdsconf.use_straps_for_mode = true;
  1236. /*
  1237. * Both 0x4 and 0x8 show up in v2.0 tables; assume they
  1238. * mean the same thing (probably wrong, but might work)
  1239. */
  1240. if (conf & 0x4 || conf & 0x8)
  1241. entry->lvdsconf.use_power_scripts = true;
  1242. } else {
  1243. mask = ~0x7;
  1244. if (conf & 0x2)
  1245. entry->lvdsconf.use_acpi_for_edid = true;
  1246. if (conf & 0x4)
  1247. entry->lvdsconf.use_power_scripts = true;
  1248. entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4;
  1249. link = entry->lvdsconf.sor.link;
  1250. }
  1251. if (conf & mask) {
  1252. /*
  1253. * Until we even try to use these on G8x, it's
  1254. * useless reporting unknown bits. They all are.
  1255. */
  1256. if (dcb->version >= 0x40)
  1257. break;
  1258. NV_ERROR(drm, "Unknown LVDS configuration bits, "
  1259. "please report\n");
  1260. }
  1261. break;
  1262. }
  1263. case DCB_OUTPUT_TV:
  1264. {
  1265. if (dcb->version >= 0x30)
  1266. entry->tvconf.has_component_output = conf & (0x8 << 4);
  1267. else
  1268. entry->tvconf.has_component_output = false;
  1269. break;
  1270. }
  1271. case DCB_OUTPUT_DP:
  1272. entry->dpconf.sor.link = (conf & 0x00000030) >> 4;
  1273. entry->extdev = (conf & 0x0000ff00) >> 8;
  1274. switch ((conf & 0x00e00000) >> 21) {
  1275. case 0:
  1276. entry->dpconf.link_bw = 162000;
  1277. break;
  1278. case 1:
  1279. entry->dpconf.link_bw = 270000;
  1280. break;
  1281. case 2:
  1282. entry->dpconf.link_bw = 540000;
  1283. break;
  1284. case 3:
  1285. default:
  1286. entry->dpconf.link_bw = 810000;
  1287. break;
  1288. }
  1289. switch ((conf & 0x0f000000) >> 24) {
  1290. case 0xf:
  1291. case 0x4:
  1292. entry->dpconf.link_nr = 4;
  1293. break;
  1294. case 0x3:
  1295. case 0x2:
  1296. entry->dpconf.link_nr = 2;
  1297. break;
  1298. default:
  1299. entry->dpconf.link_nr = 1;
  1300. break;
  1301. }
  1302. link = entry->dpconf.sor.link;
  1303. break;
  1304. case DCB_OUTPUT_TMDS:
  1305. if (dcb->version >= 0x40) {
  1306. entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4;
  1307. entry->extdev = (conf & 0x0000ff00) >> 8;
  1308. link = entry->tmdsconf.sor.link;
  1309. }
  1310. else if (dcb->version >= 0x30)
  1311. entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8;
  1312. else if (dcb->version >= 0x22)
  1313. entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4;
  1314. break;
  1315. case DCB_OUTPUT_EOL:
  1316. /* weird g80 mobile type that "nv" treats as a terminator */
  1317. dcb->entries--;
  1318. return false;
  1319. default:
  1320. break;
  1321. }
  1322. if (dcb->version < 0x40) {
  1323. /* Normal entries consist of a single bit, but dual link has
  1324. * the next most significant bit set too
  1325. */
  1326. entry->duallink_possible =
  1327. ((1 << (ffs(entry->or) - 1)) * 3 == entry->or);
  1328. } else {
  1329. entry->duallink_possible = (entry->sorconf.link == 3);
  1330. }
  1331. /* unsure what DCB version introduces this, 3.0? */
  1332. if (conf & 0x100000)
  1333. entry->i2c_upper_default = true;
  1334. entry->hasht = (entry->extdev << 8) | (entry->location << 4) |
  1335. entry->type;
  1336. entry->hashm = (entry->heads << 8) | (link << 6) | entry->or;
  1337. return true;
  1338. }
  1339. static bool
  1340. parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb,
  1341. uint32_t conn, uint32_t conf, struct dcb_output *entry)
  1342. {
  1343. struct nouveau_drm *drm = nouveau_drm(dev);
  1344. switch (conn & 0x0000000f) {
  1345. case 0:
  1346. entry->type = DCB_OUTPUT_ANALOG;
  1347. break;
  1348. case 1:
  1349. entry->type = DCB_OUTPUT_TV;
  1350. break;
  1351. case 2:
  1352. case 4:
  1353. if (conn & 0x10)
  1354. entry->type = DCB_OUTPUT_LVDS;
  1355. else
  1356. entry->type = DCB_OUTPUT_TMDS;
  1357. break;
  1358. case 3:
  1359. entry->type = DCB_OUTPUT_LVDS;
  1360. break;
  1361. default:
  1362. NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f);
  1363. return false;
  1364. }
  1365. entry->i2c_index = (conn & 0x0003c000) >> 14;
  1366. entry->heads = ((conn & 0x001c0000) >> 18) + 1;
  1367. entry->or = entry->heads; /* same as heads, hopefully safe enough */
  1368. entry->location = (conn & 0x01e00000) >> 21;
  1369. entry->bus = (conn & 0x0e000000) >> 25;
  1370. entry->duallink_possible = false;
  1371. switch (entry->type) {
  1372. case DCB_OUTPUT_ANALOG:
  1373. entry->crtconf.maxfreq = (conf & 0xffff) * 10;
  1374. break;
  1375. case DCB_OUTPUT_TV:
  1376. entry->tvconf.has_component_output = false;
  1377. break;
  1378. case DCB_OUTPUT_LVDS:
  1379. if ((conn & 0x00003f00) >> 8 != 0x10)
  1380. entry->lvdsconf.use_straps_for_mode = true;
  1381. entry->lvdsconf.use_power_scripts = true;
  1382. break;
  1383. default:
  1384. break;
  1385. }
  1386. return true;
  1387. }
  1388. static
  1389. void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb)
  1390. {
  1391. /*
  1392. * DCB v2.0 lists each output combination separately.
  1393. * Here we merge compatible entries to have fewer outputs, with
  1394. * more options
  1395. */
  1396. struct nouveau_drm *drm = nouveau_drm(dev);
  1397. int i, newentries = 0;
  1398. for (i = 0; i < dcb->entries; i++) {
  1399. struct dcb_output *ient = &dcb->entry[i];
  1400. int j;
  1401. for (j = i + 1; j < dcb->entries; j++) {
  1402. struct dcb_output *jent = &dcb->entry[j];
  1403. if (jent->type == 100) /* already merged entry */
  1404. continue;
  1405. /* merge heads field when all other fields the same */
  1406. if (jent->i2c_index == ient->i2c_index &&
  1407. jent->type == ient->type &&
  1408. jent->location == ient->location &&
  1409. jent->or == ient->or) {
  1410. NV_INFO(drm, "Merging DCB entries %d and %d\n",
  1411. i, j);
  1412. ient->heads |= jent->heads;
  1413. jent->type = 100; /* dummy value */
  1414. }
  1415. }
  1416. }
  1417. /* Compact entries merged into others out of dcb */
  1418. for (i = 0; i < dcb->entries; i++) {
  1419. if (dcb->entry[i].type == 100)
  1420. continue;
  1421. if (newentries != i) {
  1422. dcb->entry[newentries] = dcb->entry[i];
  1423. dcb->entry[newentries].index = newentries;
  1424. }
  1425. newentries++;
  1426. }
  1427. dcb->entries = newentries;
  1428. }
  1429. static bool
  1430. apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf)
  1431. {
  1432. struct nouveau_drm *drm = nouveau_drm(dev);
  1433. struct dcb_table *dcb = &drm->vbios.dcb;
  1434. /* Dell Precision M6300
  1435. * DCB entry 2: 02025312 00000010
  1436. * DCB entry 3: 02026312 00000020
  1437. *
  1438. * Identical, except apparently a different connector on a
  1439. * different SOR link. Not a clue how we're supposed to know
  1440. * which one is in use if it even shares an i2c line...
  1441. *
  1442. * Ignore the connector on the second SOR link to prevent
  1443. * nasty problems until this is sorted (assuming it's not a
  1444. * VBIOS bug).
  1445. */
  1446. if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) {
  1447. if (*conn == 0x02026312 && *conf == 0x00000020)
  1448. return false;
  1449. }
  1450. /* GeForce3 Ti 200
  1451. *
  1452. * DCB reports an LVDS output that should be TMDS:
  1453. * DCB entry 1: f2005014 ffffffff
  1454. */
  1455. if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) {
  1456. if (*conn == 0xf2005014 && *conf == 0xffffffff) {
  1457. fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, 1);
  1458. return false;
  1459. }
  1460. }
  1461. /* XFX GT-240X-YA
  1462. *
  1463. * So many things wrong here, replace the entire encoder table..
  1464. */
  1465. if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) {
  1466. if (idx == 0) {
  1467. *conn = 0x02001300; /* VGA, connector 1 */
  1468. *conf = 0x00000028;
  1469. } else
  1470. if (idx == 1) {
  1471. *conn = 0x01010312; /* DVI, connector 0 */
  1472. *conf = 0x00020030;
  1473. } else
  1474. if (idx == 2) {
  1475. *conn = 0x01010310; /* VGA, connector 0 */
  1476. *conf = 0x00000028;
  1477. } else
  1478. if (idx == 3) {
  1479. *conn = 0x02022362; /* HDMI, connector 2 */
  1480. *conf = 0x00020010;
  1481. } else {
  1482. *conn = 0x0000000e; /* EOL */
  1483. *conf = 0x00000000;
  1484. }
  1485. }
  1486. /* Some other twisted XFX board (rhbz#694914)
  1487. *
  1488. * The DVI/VGA encoder combo that's supposed to represent the
  1489. * DVI-I connector actually point at two different ones, and
  1490. * the HDMI connector ends up paired with the VGA instead.
  1491. *
  1492. * Connector table is missing anything for VGA at all, pointing it
  1493. * an invalid conntab entry 2 so we figure it out ourself.
  1494. */
  1495. if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) {
  1496. if (idx == 0) {
  1497. *conn = 0x02002300; /* VGA, connector 2 */
  1498. *conf = 0x00000028;
  1499. } else
  1500. if (idx == 1) {
  1501. *conn = 0x01010312; /* DVI, connector 0 */
  1502. *conf = 0x00020030;
  1503. } else
  1504. if (idx == 2) {
  1505. *conn = 0x04020310; /* VGA, connector 0 */
  1506. *conf = 0x00000028;
  1507. } else
  1508. if (idx == 3) {
  1509. *conn = 0x02021322; /* HDMI, connector 1 */
  1510. *conf = 0x00020010;
  1511. } else {
  1512. *conn = 0x0000000e; /* EOL */
  1513. *conf = 0x00000000;
  1514. }
  1515. }
  1516. /* fdo#50830: connector indices for VGA and DVI-I are backwards */
  1517. if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) {
  1518. if (idx == 0 && *conn == 0x02000300)
  1519. *conn = 0x02011300;
  1520. else
  1521. if (idx == 1 && *conn == 0x04011310)
  1522. *conn = 0x04000310;
  1523. else
  1524. if (idx == 2 && *conn == 0x02011312)
  1525. *conn = 0x02000312;
  1526. }
  1527. return true;
  1528. }
  1529. static void
  1530. fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios)
  1531. {
  1532. struct dcb_table *dcb = &bios->dcb;
  1533. int all_heads = (nv_two_heads(dev) ? 3 : 1);
  1534. #ifdef __powerpc__
  1535. /* Apple iMac G4 NV17 */
  1536. if (of_machine_is_compatible("PowerMac4,5")) {
  1537. fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, 1);
  1538. fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, 2);
  1539. return;
  1540. }
  1541. #endif
  1542. /* Make up some sane defaults */
  1543. fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG,
  1544. bios->legacy.i2c_indices.crt, 1, 1);
  1545. if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0)
  1546. fabricate_dcb_output(dcb, DCB_OUTPUT_TV,
  1547. bios->legacy.i2c_indices.tv,
  1548. all_heads, 0);
  1549. else if (bios->tmds.output0_script_ptr ||
  1550. bios->tmds.output1_script_ptr)
  1551. fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS,
  1552. bios->legacy.i2c_indices.panel,
  1553. all_heads, 1);
  1554. }
  1555. static int
  1556. parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp)
  1557. {
  1558. struct nouveau_drm *drm = nouveau_drm(dev);
  1559. struct dcb_table *dcb = &drm->vbios.dcb;
  1560. u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]);
  1561. u32 conn = ROM32(outp[0]);
  1562. bool ret;
  1563. if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) {
  1564. struct dcb_output *entry = new_dcb_entry(dcb);
  1565. NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf);
  1566. if (dcb->version >= 0x20)
  1567. ret = parse_dcb20_entry(dev, dcb, conn, conf, entry);
  1568. else
  1569. ret = parse_dcb15_entry(dev, dcb, conn, conf, entry);
  1570. if (!ret)
  1571. return 1; /* stop parsing */
  1572. /* Ignore the I2C index for on-chip TV-out, as there
  1573. * are cards with bogus values (nv31m in bug 23212),
  1574. * and it's otherwise useless.
  1575. */
  1576. if (entry->type == DCB_OUTPUT_TV &&
  1577. entry->location == DCB_LOC_ON_CHIP)
  1578. entry->i2c_index = 0x0f;
  1579. }
  1580. return 0;
  1581. }
  1582. static void
  1583. dcb_fake_connectors(struct nvbios *bios)
  1584. {
  1585. struct dcb_table *dcbt = &bios->dcb;
  1586. u8 map[16] = { };
  1587. int i, idx = 0;
  1588. /* heuristic: if we ever get a non-zero connector field, assume
  1589. * that all the indices are valid and we don't need fake them.
  1590. *
  1591. * and, as usual, a blacklist of boards with bad bios data..
  1592. */
  1593. if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) {
  1594. for (i = 0; i < dcbt->entries; i++) {
  1595. if (dcbt->entry[i].connector)
  1596. return;
  1597. }
  1598. }
  1599. /* no useful connector info available, we need to make it up
  1600. * ourselves. the rule here is: anything on the same i2c bus
  1601. * is considered to be on the same connector. any output
  1602. * without an associated i2c bus is assigned its own unique
  1603. * connector index.
  1604. */
  1605. for (i = 0; i < dcbt->entries; i++) {
  1606. u8 i2c = dcbt->entry[i].i2c_index;
  1607. if (i2c == 0x0f) {
  1608. dcbt->entry[i].connector = idx++;
  1609. } else {
  1610. if (!map[i2c])
  1611. map[i2c] = ++idx;
  1612. dcbt->entry[i].connector = map[i2c] - 1;
  1613. }
  1614. }
  1615. /* if we created more than one connector, destroy the connector
  1616. * table - just in case it has random, rather than stub, entries.
  1617. */
  1618. if (i > 1) {
  1619. u8 *conntab = olddcb_conntab(bios->dev);
  1620. if (conntab)
  1621. conntab[0] = 0x00;
  1622. }
  1623. }
  1624. static int
  1625. parse_dcb_table(struct drm_device *dev, struct nvbios *bios)
  1626. {
  1627. struct nouveau_drm *drm = nouveau_drm(dev);
  1628. struct dcb_table *dcb = &bios->dcb;
  1629. u8 *dcbt, *conn;
  1630. int idx;
  1631. dcbt = olddcb_table(dev);
  1632. if (!dcbt) {
  1633. /* handle pre-DCB boards */
  1634. if (bios->type == NVBIOS_BMP) {
  1635. fabricate_dcb_encoder_table(dev, bios);
  1636. return 0;
  1637. }
  1638. return -EINVAL;
  1639. }
  1640. NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf);
  1641. dcb->version = dcbt[0];
  1642. olddcb_outp_foreach(dev, NULL, parse_dcb_entry);
  1643. /*
  1644. * apart for v2.1+ not being known for requiring merging, this
  1645. * guarantees dcbent->index is the index of the entry in the rom image
  1646. */
  1647. if (dcb->version < 0x21)
  1648. merge_like_dcb_entries(dev, dcb);
  1649. /* dump connector table entries to log, if any exist */
  1650. idx = -1;
  1651. while ((conn = olddcb_conn(dev, ++idx))) {
  1652. if (conn[0] != 0xff) {
  1653. if (olddcb_conntab(dev)[3] < 4)
  1654. NV_INFO(drm, "DCB conn %02d: %04x\n",
  1655. idx, ROM16(conn[0]));
  1656. else
  1657. NV_INFO(drm, "DCB conn %02d: %08x\n",
  1658. idx, ROM32(conn[0]));
  1659. }
  1660. }
  1661. dcb_fake_connectors(bios);
  1662. return 0;
  1663. }
  1664. static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry)
  1665. {
  1666. /*
  1667. * The header following the "HWSQ" signature has the number of entries,
  1668. * and the entry size
  1669. *
  1670. * An entry consists of a dword to write to the sequencer control reg
  1671. * (0x00001304), followed by the ucode bytes, written sequentially,
  1672. * starting at reg 0x00001400
  1673. */
  1674. struct nouveau_drm *drm = nouveau_drm(dev);
  1675. struct nvif_object *device = &drm->client.device.object;
  1676. uint8_t bytes_to_write;
  1677. uint16_t hwsq_entry_offset;
  1678. int i;
  1679. if (bios->data[hwsq_offset] <= entry) {
  1680. NV_ERROR(drm, "Too few entries in HW sequencer table for "
  1681. "requested entry\n");
  1682. return -ENOENT;
  1683. }
  1684. bytes_to_write = bios->data[hwsq_offset + 1];
  1685. if (bytes_to_write != 36) {
  1686. NV_ERROR(drm, "Unknown HW sequencer entry size\n");
  1687. return -EINVAL;
  1688. }
  1689. NV_INFO(drm, "Loading NV17 power sequencing microcode\n");
  1690. hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write;
  1691. /* set sequencer control */
  1692. nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset]));
  1693. bytes_to_write -= 4;
  1694. /* write ucode */
  1695. for (i = 0; i < bytes_to_write; i += 4)
  1696. nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4]));
  1697. /* twiddle NV_PBUS_DEBUG_4 */
  1698. nvif_wr32(device, NV_PBUS_DEBUG_4, nvif_rd32(device, NV_PBUS_DEBUG_4) | 0x18);
  1699. return 0;
  1700. }
  1701. static int load_nv17_hw_sequencer_ucode(struct drm_device *dev,
  1702. struct nvbios *bios)
  1703. {
  1704. /*
  1705. * BMP based cards, from NV17, need a microcode loading to correctly
  1706. * control the GPIO etc for LVDS panels
  1707. *
  1708. * BIT based cards seem to do this directly in the init scripts
  1709. *
  1710. * The microcode entries are found by the "HWSQ" signature.
  1711. */
  1712. static const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' };
  1713. const int sz = sizeof(hwsq_signature);
  1714. int hwsq_offset;
  1715. hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz);
  1716. if (!hwsq_offset)
  1717. return 0;
  1718. /* always use entry 0? */
  1719. return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0);
  1720. }
  1721. uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev)
  1722. {
  1723. struct nouveau_drm *drm = nouveau_drm(dev);
  1724. struct nvbios *bios = &drm->vbios;
  1725. static const uint8_t edid_sig[] = {
  1726. 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
  1727. uint16_t offset = 0;
  1728. uint16_t newoffset;
  1729. int searchlen = NV_PROM_SIZE;
  1730. if (bios->fp.edid)
  1731. return bios->fp.edid;
  1732. while (searchlen) {
  1733. newoffset = findstr(&bios->data[offset], searchlen,
  1734. edid_sig, 8);
  1735. if (!newoffset)
  1736. return NULL;
  1737. offset += newoffset;
  1738. if (!nv_cksum(&bios->data[offset], EDID1_LEN))
  1739. break;
  1740. searchlen -= offset;
  1741. offset++;
  1742. }
  1743. NV_INFO(drm, "Found EDID in BIOS\n");
  1744. return bios->fp.edid = &bios->data[offset];
  1745. }
  1746. static bool NVInitVBIOS(struct drm_device *dev)
  1747. {
  1748. struct nouveau_drm *drm = nouveau_drm(dev);
  1749. struct nvkm_bios *bios = nvxx_bios(&drm->client.device);
  1750. struct nvbios *legacy = &drm->vbios;
  1751. memset(legacy, 0, sizeof(struct nvbios));
  1752. spin_lock_init(&legacy->lock);
  1753. legacy->dev = dev;
  1754. legacy->data = bios->data;
  1755. legacy->length = bios->size;
  1756. legacy->major_version = bios->version.major;
  1757. legacy->chip_version = bios->version.chip;
  1758. if (bios->bit_offset) {
  1759. legacy->type = NVBIOS_BIT;
  1760. legacy->offset = bios->bit_offset;
  1761. return !parse_bit_structure(legacy, legacy->offset + 6);
  1762. } else
  1763. if (bios->bmp_offset) {
  1764. legacy->type = NVBIOS_BMP;
  1765. legacy->offset = bios->bmp_offset;
  1766. return !parse_bmp_structure(dev, legacy, legacy->offset);
  1767. }
  1768. return false;
  1769. }
  1770. int
  1771. nouveau_run_vbios_init(struct drm_device *dev)
  1772. {
  1773. struct nouveau_drm *drm = nouveau_drm(dev);
  1774. struct nvbios *bios = &drm->vbios;
  1775. int ret = 0;
  1776. /* Reset the BIOS head to 0. */
  1777. bios->state.crtchead = 0;
  1778. if (bios->major_version < 5) /* BMP only */
  1779. load_nv17_hw_sequencer_ucode(dev, bios);
  1780. if (bios->execute) {
  1781. bios->fp.last_script_invoc = 0;
  1782. bios->fp.lvds_init_run = false;
  1783. }
  1784. return ret;
  1785. }
  1786. static bool
  1787. nouveau_bios_posted(struct drm_device *dev)
  1788. {
  1789. struct nouveau_drm *drm = nouveau_drm(dev);
  1790. unsigned htotal;
  1791. if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA)
  1792. return true;
  1793. htotal = NVReadVgaCrtc(dev, 0, 0x06);
  1794. htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8;
  1795. htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4;
  1796. htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10;
  1797. htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11;
  1798. return (htotal != 0);
  1799. }
  1800. int
  1801. nouveau_bios_init(struct drm_device *dev)
  1802. {
  1803. struct nouveau_drm *drm = nouveau_drm(dev);
  1804. struct nvbios *bios = &drm->vbios;
  1805. int ret;
  1806. /* only relevant for PCI devices */
  1807. if (!dev->pdev)
  1808. return 0;
  1809. if (!NVInitVBIOS(dev))
  1810. return -ENODEV;
  1811. ret = parse_dcb_table(dev, bios);
  1812. if (ret)
  1813. return ret;
  1814. if (!bios->major_version) /* we don't run version 0 bios */
  1815. return 0;
  1816. /* init script execution disabled */
  1817. bios->execute = false;
  1818. /* ... unless card isn't POSTed already */
  1819. if (!nouveau_bios_posted(dev)) {
  1820. NV_INFO(drm, "Adaptor not initialised, "
  1821. "running VBIOS init tables.\n");
  1822. bios->execute = true;
  1823. }
  1824. ret = nouveau_run_vbios_init(dev);
  1825. if (ret)
  1826. return ret;
  1827. /* feature_byte on BMP is poor, but init always sets CR4B */
  1828. if (bios->major_version < 5)
  1829. bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40;
  1830. /* all BIT systems need p_f_m_t for digital_min_front_porch */
  1831. if (bios->is_mobile || bios->major_version >= 5)
  1832. ret = parse_fp_mode_table(dev, bios);
  1833. /* allow subsequent scripts to execute */
  1834. bios->execute = true;
  1835. return 0;
  1836. }
  1837. void
  1838. nouveau_bios_takedown(struct drm_device *dev)
  1839. {
  1840. }