nouveau_abi16.h 3.5 KB

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  1. /* SPDX-License-Identifier: MIT */
  2. #ifndef __NOUVEAU_ABI16_H__
  3. #define __NOUVEAU_ABI16_H__
  4. #define ABI16_IOCTL_ARGS \
  5. struct drm_device *dev, void *data, struct drm_file *file_priv
  6. int nouveau_abi16_ioctl_getparam(ABI16_IOCTL_ARGS);
  7. int nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS);
  8. int nouveau_abi16_ioctl_channel_free(ABI16_IOCTL_ARGS);
  9. int nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS);
  10. int nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS);
  11. int nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS);
  12. struct nouveau_abi16_ntfy {
  13. struct nvif_object object;
  14. struct list_head head;
  15. struct nvkm_mm_node *node;
  16. };
  17. struct nouveau_abi16_chan {
  18. struct list_head head;
  19. struct nouveau_channel *chan;
  20. struct list_head notifiers;
  21. struct nouveau_bo *ntfy;
  22. struct nouveau_vma *ntfy_vma;
  23. struct nvkm_mm heap;
  24. };
  25. struct nouveau_abi16 {
  26. struct nvif_device device;
  27. struct list_head channels;
  28. u64 handles;
  29. };
  30. struct nouveau_abi16 *nouveau_abi16_get(struct drm_file *);
  31. int nouveau_abi16_put(struct nouveau_abi16 *, int);
  32. void nouveau_abi16_fini(struct nouveau_abi16 *);
  33. s32 nouveau_abi16_swclass(struct nouveau_drm *);
  34. int nouveau_abi16_usif(struct drm_file *, void *data, u32 size);
  35. #define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1)
  36. #define NOUVEAU_GEM_DOMAIN_GART (1 << 2)
  37. struct drm_nouveau_channel_alloc {
  38. uint32_t fb_ctxdma_handle;
  39. uint32_t tt_ctxdma_handle;
  40. int channel;
  41. uint32_t pushbuf_domains;
  42. /* Notifier memory */
  43. uint32_t notifier_handle;
  44. /* DRM-enforced subchannel assignments */
  45. struct {
  46. uint32_t handle;
  47. uint32_t grclass;
  48. } subchan[8];
  49. uint32_t nr_subchan;
  50. };
  51. struct drm_nouveau_channel_free {
  52. int channel;
  53. };
  54. struct drm_nouveau_grobj_alloc {
  55. int channel;
  56. uint32_t handle;
  57. int class;
  58. };
  59. struct drm_nouveau_notifierobj_alloc {
  60. uint32_t channel;
  61. uint32_t handle;
  62. uint32_t size;
  63. uint32_t offset;
  64. };
  65. struct drm_nouveau_gpuobj_free {
  66. int channel;
  67. uint32_t handle;
  68. };
  69. #define NOUVEAU_GETPARAM_PCI_VENDOR 3
  70. #define NOUVEAU_GETPARAM_PCI_DEVICE 4
  71. #define NOUVEAU_GETPARAM_BUS_TYPE 5
  72. #define NOUVEAU_GETPARAM_FB_SIZE 8
  73. #define NOUVEAU_GETPARAM_AGP_SIZE 9
  74. #define NOUVEAU_GETPARAM_CHIPSET_ID 11
  75. #define NOUVEAU_GETPARAM_VM_VRAM_BASE 12
  76. #define NOUVEAU_GETPARAM_GRAPH_UNITS 13
  77. #define NOUVEAU_GETPARAM_PTIMER_TIME 14
  78. #define NOUVEAU_GETPARAM_HAS_BO_USAGE 15
  79. #define NOUVEAU_GETPARAM_HAS_PAGEFLIP 16
  80. struct drm_nouveau_getparam {
  81. uint64_t param;
  82. uint64_t value;
  83. };
  84. struct drm_nouveau_setparam {
  85. uint64_t param;
  86. uint64_t value;
  87. };
  88. #define DRM_IOCTL_NOUVEAU_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GETPARAM, struct drm_nouveau_getparam)
  89. #define DRM_IOCTL_NOUVEAU_SETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_SETPARAM, struct drm_nouveau_setparam)
  90. #define DRM_IOCTL_NOUVEAU_CHANNEL_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_CHANNEL_ALLOC, struct drm_nouveau_channel_alloc)
  91. #define DRM_IOCTL_NOUVEAU_CHANNEL_FREE DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_CHANNEL_FREE, struct drm_nouveau_channel_free)
  92. #define DRM_IOCTL_NOUVEAU_GROBJ_ALLOC DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GROBJ_ALLOC, struct drm_nouveau_grobj_alloc)
  93. #define DRM_IOCTL_NOUVEAU_NOTIFIEROBJ_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_NOTIFIEROBJ_ALLOC, struct drm_nouveau_notifierobj_alloc)
  94. #define DRM_IOCTL_NOUVEAU_GPUOBJ_FREE DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GPUOBJ_FREE, struct drm_nouveau_gpuobj_free)
  95. #endif