psb_intel_lvds.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright © 2006-2007 Intel Corporation
  4. *
  5. * Authors:
  6. * Eric Anholt <eric@anholt.net>
  7. * Dave Airlie <airlied@linux.ie>
  8. * Jesse Barnes <jesse.barnes@intel.com>
  9. */
  10. #include <linux/i2c.h>
  11. #include <linux/pm_runtime.h>
  12. #include <drm/drm_simple_kms_helper.h>
  13. #include "intel_bios.h"
  14. #include "power.h"
  15. #include "psb_drv.h"
  16. #include "psb_intel_drv.h"
  17. #include "psb_intel_reg.h"
  18. /*
  19. * LVDS I2C backlight control macros
  20. */
  21. #define BRIGHTNESS_MAX_LEVEL 100
  22. #define BRIGHTNESS_MASK 0xFF
  23. #define BLC_I2C_TYPE 0x01
  24. #define BLC_PWM_TYPT 0x02
  25. #define BLC_POLARITY_NORMAL 0
  26. #define BLC_POLARITY_INVERSE 1
  27. #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
  28. #define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
  29. #define PSB_BLC_PWM_PRECISION_FACTOR (10)
  30. #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
  31. #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
  32. struct psb_intel_lvds_priv {
  33. /*
  34. * Saved LVDO output states
  35. */
  36. uint32_t savePP_ON;
  37. uint32_t savePP_OFF;
  38. uint32_t saveLVDS;
  39. uint32_t savePP_CONTROL;
  40. uint32_t savePP_CYCLE;
  41. uint32_t savePFIT_CONTROL;
  42. uint32_t savePFIT_PGM_RATIOS;
  43. uint32_t saveBLC_PWM_CTL;
  44. struct psb_intel_i2c_chan *i2c_bus;
  45. struct psb_intel_i2c_chan *ddc_bus;
  46. };
  47. /*
  48. * Returns the maximum level of the backlight duty cycle field.
  49. */
  50. static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
  51. {
  52. struct drm_psb_private *dev_priv = dev->dev_private;
  53. u32 ret;
  54. if (gma_power_begin(dev, false)) {
  55. ret = REG_READ(BLC_PWM_CTL);
  56. gma_power_end(dev);
  57. } else /* Powered off, use the saved value */
  58. ret = dev_priv->regs.saveBLC_PWM_CTL;
  59. /* Top 15bits hold the frequency mask */
  60. ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >>
  61. BACKLIGHT_MODULATION_FREQ_SHIFT;
  62. ret *= 2; /* Return a 16bit range as needed for setting */
  63. if (ret == 0)
  64. dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
  65. REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
  66. return ret;
  67. }
  68. /*
  69. * Set LVDS backlight level by I2C command
  70. *
  71. * FIXME: at some point we need to both track this for PM and also
  72. * disable runtime pm on MRST if the brightness is nil (ie blanked)
  73. */
  74. static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
  75. unsigned int level)
  76. {
  77. struct drm_psb_private *dev_priv =
  78. (struct drm_psb_private *)dev->dev_private;
  79. struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
  80. u8 out_buf[2];
  81. unsigned int blc_i2c_brightness;
  82. struct i2c_msg msgs[] = {
  83. {
  84. .addr = lvds_i2c_bus->slave_addr,
  85. .flags = 0,
  86. .len = 2,
  87. .buf = out_buf,
  88. }
  89. };
  90. blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
  91. BRIGHTNESS_MASK /
  92. BRIGHTNESS_MAX_LEVEL);
  93. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  94. blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
  95. out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
  96. out_buf[1] = (u8)blc_i2c_brightness;
  97. if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
  98. dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
  99. dev_priv->lvds_bl->brightnesscmd,
  100. blc_i2c_brightness);
  101. return 0;
  102. }
  103. dev_err(dev->dev, "I2C transfer error\n");
  104. return -1;
  105. }
  106. static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
  107. {
  108. struct drm_psb_private *dev_priv =
  109. (struct drm_psb_private *)dev->dev_private;
  110. u32 max_pwm_blc;
  111. u32 blc_pwm_duty_cycle;
  112. max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
  113. /*BLC_PWM_CTL Should be initiated while backlight device init*/
  114. BUG_ON(max_pwm_blc == 0);
  115. blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
  116. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  117. blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
  118. blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
  119. REG_WRITE(BLC_PWM_CTL,
  120. (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
  121. (blc_pwm_duty_cycle));
  122. dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
  123. (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
  124. (blc_pwm_duty_cycle));
  125. return 0;
  126. }
  127. /*
  128. * Set LVDS backlight level either by I2C or PWM
  129. */
  130. void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
  131. {
  132. struct drm_psb_private *dev_priv = dev->dev_private;
  133. dev_dbg(dev->dev, "backlight level is %d\n", level);
  134. if (!dev_priv->lvds_bl) {
  135. dev_err(dev->dev, "NO LVDS backlight info\n");
  136. return;
  137. }
  138. if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
  139. psb_lvds_i2c_set_brightness(dev, level);
  140. else
  141. psb_lvds_pwm_set_brightness(dev, level);
  142. }
  143. /*
  144. * Sets the backlight level.
  145. *
  146. * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
  147. */
  148. static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
  149. {
  150. struct drm_psb_private *dev_priv = dev->dev_private;
  151. u32 blc_pwm_ctl;
  152. if (gma_power_begin(dev, false)) {
  153. blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
  154. blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
  155. REG_WRITE(BLC_PWM_CTL,
  156. (blc_pwm_ctl |
  157. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  158. dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
  159. (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
  160. gma_power_end(dev);
  161. } else {
  162. blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
  163. ~BACKLIGHT_DUTY_CYCLE_MASK;
  164. dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
  165. (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
  166. }
  167. }
  168. /*
  169. * Sets the power state for the panel.
  170. */
  171. static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
  172. {
  173. struct drm_psb_private *dev_priv = dev->dev_private;
  174. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  175. u32 pp_status;
  176. if (!gma_power_begin(dev, true)) {
  177. dev_err(dev->dev, "set power, chip off!\n");
  178. return;
  179. }
  180. if (on) {
  181. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  182. POWER_TARGET_ON);
  183. do {
  184. pp_status = REG_READ(PP_STATUS);
  185. } while ((pp_status & PP_ON) == 0);
  186. psb_intel_lvds_set_backlight(dev,
  187. mode_dev->backlight_duty_cycle);
  188. } else {
  189. psb_intel_lvds_set_backlight(dev, 0);
  190. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  191. ~POWER_TARGET_ON);
  192. do {
  193. pp_status = REG_READ(PP_STATUS);
  194. } while (pp_status & PP_ON);
  195. }
  196. gma_power_end(dev);
  197. }
  198. static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
  199. {
  200. struct drm_device *dev = encoder->dev;
  201. if (mode == DRM_MODE_DPMS_ON)
  202. psb_intel_lvds_set_power(dev, true);
  203. else
  204. psb_intel_lvds_set_power(dev, false);
  205. /* XXX: We never power down the LVDS pairs. */
  206. }
  207. static void psb_intel_lvds_save(struct drm_connector *connector)
  208. {
  209. struct drm_device *dev = connector->dev;
  210. struct drm_psb_private *dev_priv =
  211. (struct drm_psb_private *)dev->dev_private;
  212. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  213. struct psb_intel_lvds_priv *lvds_priv =
  214. (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
  215. lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
  216. lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
  217. lvds_priv->saveLVDS = REG_READ(LVDS);
  218. lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
  219. lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
  220. /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
  221. lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  222. lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
  223. lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
  224. /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
  225. dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
  226. BACKLIGHT_DUTY_CYCLE_MASK);
  227. /*
  228. * If the light is off at server startup,
  229. * just make it full brightness
  230. */
  231. if (dev_priv->backlight_duty_cycle == 0)
  232. dev_priv->backlight_duty_cycle =
  233. psb_intel_lvds_get_max_backlight(dev);
  234. dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
  235. lvds_priv->savePP_ON,
  236. lvds_priv->savePP_OFF,
  237. lvds_priv->saveLVDS,
  238. lvds_priv->savePP_CONTROL,
  239. lvds_priv->savePP_CYCLE,
  240. lvds_priv->saveBLC_PWM_CTL);
  241. }
  242. static void psb_intel_lvds_restore(struct drm_connector *connector)
  243. {
  244. struct drm_device *dev = connector->dev;
  245. u32 pp_status;
  246. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  247. struct psb_intel_lvds_priv *lvds_priv =
  248. (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
  249. dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
  250. lvds_priv->savePP_ON,
  251. lvds_priv->savePP_OFF,
  252. lvds_priv->saveLVDS,
  253. lvds_priv->savePP_CONTROL,
  254. lvds_priv->savePP_CYCLE,
  255. lvds_priv->saveBLC_PWM_CTL);
  256. REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
  257. REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
  258. REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
  259. REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
  260. REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
  261. /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
  262. REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
  263. REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
  264. REG_WRITE(LVDS, lvds_priv->saveLVDS);
  265. if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
  266. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  267. POWER_TARGET_ON);
  268. do {
  269. pp_status = REG_READ(PP_STATUS);
  270. } while ((pp_status & PP_ON) == 0);
  271. } else {
  272. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  273. ~POWER_TARGET_ON);
  274. do {
  275. pp_status = REG_READ(PP_STATUS);
  276. } while (pp_status & PP_ON);
  277. }
  278. }
  279. enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector,
  280. struct drm_display_mode *mode)
  281. {
  282. struct drm_psb_private *dev_priv = connector->dev->dev_private;
  283. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  284. struct drm_display_mode *fixed_mode =
  285. dev_priv->mode_dev.panel_fixed_mode;
  286. if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
  287. fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
  288. /* just in case */
  289. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  290. return MODE_NO_DBLESCAN;
  291. /* just in case */
  292. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  293. return MODE_NO_INTERLACE;
  294. if (fixed_mode) {
  295. if (mode->hdisplay > fixed_mode->hdisplay)
  296. return MODE_PANEL;
  297. if (mode->vdisplay > fixed_mode->vdisplay)
  298. return MODE_PANEL;
  299. }
  300. return MODE_OK;
  301. }
  302. bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
  303. const struct drm_display_mode *mode,
  304. struct drm_display_mode *adjusted_mode)
  305. {
  306. struct drm_device *dev = encoder->dev;
  307. struct drm_psb_private *dev_priv = dev->dev_private;
  308. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  309. struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
  310. struct drm_encoder *tmp_encoder;
  311. struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
  312. struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
  313. if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
  314. panel_fixed_mode = mode_dev->panel_fixed_mode2;
  315. /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
  316. if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
  317. pr_err("Can't support LVDS on pipe A\n");
  318. return false;
  319. }
  320. if (IS_MRST(dev) && gma_crtc->pipe != 0) {
  321. pr_err("Must use PIPE A\n");
  322. return false;
  323. }
  324. /* Should never happen!! */
  325. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
  326. head) {
  327. if (tmp_encoder != encoder
  328. && tmp_encoder->crtc == encoder->crtc) {
  329. pr_err("Can't enable LVDS and another encoder on the same pipe\n");
  330. return false;
  331. }
  332. }
  333. /*
  334. * If we have timings from the BIOS for the panel, put them in
  335. * to the adjusted mode. The CRTC will be set up for this mode,
  336. * with the panel scaling set up to source from the H/VDisplay
  337. * of the original mode.
  338. */
  339. if (panel_fixed_mode != NULL) {
  340. adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
  341. adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
  342. adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
  343. adjusted_mode->htotal = panel_fixed_mode->htotal;
  344. adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
  345. adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
  346. adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
  347. adjusted_mode->vtotal = panel_fixed_mode->vtotal;
  348. adjusted_mode->clock = panel_fixed_mode->clock;
  349. drm_mode_set_crtcinfo(adjusted_mode,
  350. CRTC_INTERLACE_HALVE_V);
  351. }
  352. /*
  353. * XXX: It would be nice to support lower refresh rates on the
  354. * panels to reduce power consumption, and perhaps match the
  355. * user's requested refresh rate.
  356. */
  357. return true;
  358. }
  359. static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
  360. {
  361. struct drm_device *dev = encoder->dev;
  362. struct drm_psb_private *dev_priv = dev->dev_private;
  363. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  364. if (!gma_power_begin(dev, true))
  365. return;
  366. mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  367. mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
  368. BACKLIGHT_DUTY_CYCLE_MASK);
  369. psb_intel_lvds_set_power(dev, false);
  370. gma_power_end(dev);
  371. }
  372. static void psb_intel_lvds_commit(struct drm_encoder *encoder)
  373. {
  374. struct drm_device *dev = encoder->dev;
  375. struct drm_psb_private *dev_priv = dev->dev_private;
  376. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  377. if (mode_dev->backlight_duty_cycle == 0)
  378. mode_dev->backlight_duty_cycle =
  379. psb_intel_lvds_get_max_backlight(dev);
  380. psb_intel_lvds_set_power(dev, true);
  381. }
  382. static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
  383. struct drm_display_mode *mode,
  384. struct drm_display_mode *adjusted_mode)
  385. {
  386. struct drm_device *dev = encoder->dev;
  387. struct drm_psb_private *dev_priv = dev->dev_private;
  388. u32 pfit_control;
  389. /*
  390. * The LVDS pin pair will already have been turned on in the
  391. * psb_intel_crtc_mode_set since it has a large impact on the DPLL
  392. * settings.
  393. */
  394. /*
  395. * Enable automatic panel scaling so that non-native modes fill the
  396. * screen. Should be enabled before the pipe is enabled, according to
  397. * register description and PRM.
  398. */
  399. if (mode->hdisplay != adjusted_mode->hdisplay ||
  400. mode->vdisplay != adjusted_mode->vdisplay)
  401. pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
  402. HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
  403. HORIZ_INTERP_BILINEAR);
  404. else
  405. pfit_control = 0;
  406. if (dev_priv->lvds_dither)
  407. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  408. REG_WRITE(PFIT_CONTROL, pfit_control);
  409. }
  410. /*
  411. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  412. */
  413. static int psb_intel_lvds_get_modes(struct drm_connector *connector)
  414. {
  415. struct drm_device *dev = connector->dev;
  416. struct drm_psb_private *dev_priv = dev->dev_private;
  417. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  418. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  419. struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
  420. int ret = 0;
  421. if (!IS_MRST(dev))
  422. ret = psb_intel_ddc_get_modes(connector, &lvds_priv->i2c_bus->adapter);
  423. if (ret)
  424. return ret;
  425. if (mode_dev->panel_fixed_mode != NULL) {
  426. struct drm_display_mode *mode =
  427. drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
  428. drm_mode_probed_add(connector, mode);
  429. return 1;
  430. }
  431. return 0;
  432. }
  433. /**
  434. * psb_intel_lvds_destroy - unregister and free LVDS structures
  435. * @connector: connector to free
  436. *
  437. * Unregister the DDC bus for this connector then free the driver private
  438. * structure.
  439. */
  440. void psb_intel_lvds_destroy(struct drm_connector *connector)
  441. {
  442. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  443. struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
  444. psb_intel_i2c_destroy(lvds_priv->ddc_bus);
  445. drm_connector_unregister(connector);
  446. drm_connector_cleanup(connector);
  447. kfree(connector);
  448. }
  449. int psb_intel_lvds_set_property(struct drm_connector *connector,
  450. struct drm_property *property,
  451. uint64_t value)
  452. {
  453. struct drm_encoder *encoder = connector->encoder;
  454. if (!encoder)
  455. return -1;
  456. if (!strcmp(property->name, "scaling mode")) {
  457. struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
  458. uint64_t curval;
  459. if (!crtc)
  460. goto set_prop_error;
  461. switch (value) {
  462. case DRM_MODE_SCALE_FULLSCREEN:
  463. break;
  464. case DRM_MODE_SCALE_NO_SCALE:
  465. break;
  466. case DRM_MODE_SCALE_ASPECT:
  467. break;
  468. default:
  469. goto set_prop_error;
  470. }
  471. if (drm_object_property_get_value(&connector->base,
  472. property,
  473. &curval))
  474. goto set_prop_error;
  475. if (curval == value)
  476. goto set_prop_done;
  477. if (drm_object_property_set_value(&connector->base,
  478. property,
  479. value))
  480. goto set_prop_error;
  481. if (crtc->saved_mode.hdisplay != 0 &&
  482. crtc->saved_mode.vdisplay != 0) {
  483. if (!drm_crtc_helper_set_mode(encoder->crtc,
  484. &crtc->saved_mode,
  485. encoder->crtc->x,
  486. encoder->crtc->y,
  487. encoder->crtc->primary->fb))
  488. goto set_prop_error;
  489. }
  490. } else if (!strcmp(property->name, "backlight")) {
  491. if (drm_object_property_set_value(&connector->base,
  492. property,
  493. value))
  494. goto set_prop_error;
  495. else
  496. gma_backlight_set(encoder->dev, value);
  497. } else if (!strcmp(property->name, "DPMS")) {
  498. const struct drm_encoder_helper_funcs *hfuncs
  499. = encoder->helper_private;
  500. hfuncs->dpms(encoder, value);
  501. }
  502. set_prop_done:
  503. return 0;
  504. set_prop_error:
  505. return -1;
  506. }
  507. static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
  508. .dpms = psb_intel_lvds_encoder_dpms,
  509. .mode_fixup = psb_intel_lvds_mode_fixup,
  510. .prepare = psb_intel_lvds_prepare,
  511. .mode_set = psb_intel_lvds_mode_set,
  512. .commit = psb_intel_lvds_commit,
  513. };
  514. const struct drm_connector_helper_funcs
  515. psb_intel_lvds_connector_helper_funcs = {
  516. .get_modes = psb_intel_lvds_get_modes,
  517. .mode_valid = psb_intel_lvds_mode_valid,
  518. .best_encoder = gma_best_encoder,
  519. };
  520. const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
  521. .dpms = drm_helper_connector_dpms,
  522. .fill_modes = drm_helper_probe_single_connector_modes,
  523. .set_property = psb_intel_lvds_set_property,
  524. .destroy = psb_intel_lvds_destroy,
  525. };
  526. /**
  527. * psb_intel_lvds_init - setup LVDS connectors on this device
  528. * @dev: drm device
  529. *
  530. * Create the connector, register the LVDS DDC bus, and try to figure out what
  531. * modes we can display on the LVDS panel (if present).
  532. */
  533. void psb_intel_lvds_init(struct drm_device *dev,
  534. struct psb_intel_mode_device *mode_dev)
  535. {
  536. struct gma_encoder *gma_encoder;
  537. struct gma_connector *gma_connector;
  538. struct psb_intel_lvds_priv *lvds_priv;
  539. struct drm_connector *connector;
  540. struct drm_encoder *encoder;
  541. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  542. struct drm_crtc *crtc;
  543. struct drm_psb_private *dev_priv = dev->dev_private;
  544. u32 lvds;
  545. int pipe;
  546. gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
  547. if (!gma_encoder) {
  548. dev_err(dev->dev, "gma_encoder allocation error\n");
  549. return;
  550. }
  551. gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
  552. if (!gma_connector) {
  553. dev_err(dev->dev, "gma_connector allocation error\n");
  554. goto failed_encoder;
  555. }
  556. lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
  557. if (!lvds_priv) {
  558. dev_err(dev->dev, "LVDS private allocation error\n");
  559. goto failed_connector;
  560. }
  561. gma_encoder->dev_priv = lvds_priv;
  562. connector = &gma_connector->base;
  563. gma_connector->save = psb_intel_lvds_save;
  564. gma_connector->restore = psb_intel_lvds_restore;
  565. encoder = &gma_encoder->base;
  566. drm_connector_init(dev, connector,
  567. &psb_intel_lvds_connector_funcs,
  568. DRM_MODE_CONNECTOR_LVDS);
  569. drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_LVDS);
  570. gma_connector_attach_encoder(gma_connector, gma_encoder);
  571. gma_encoder->type = INTEL_OUTPUT_LVDS;
  572. drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
  573. drm_connector_helper_add(connector,
  574. &psb_intel_lvds_connector_helper_funcs);
  575. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  576. connector->interlace_allowed = false;
  577. connector->doublescan_allowed = false;
  578. /*Attach connector properties*/
  579. drm_object_attach_property(&connector->base,
  580. dev->mode_config.scaling_mode_property,
  581. DRM_MODE_SCALE_FULLSCREEN);
  582. drm_object_attach_property(&connector->base,
  583. dev_priv->backlight_property,
  584. BRIGHTNESS_MAX_LEVEL);
  585. /*
  586. * Set up I2C bus
  587. * FIXME: distroy i2c_bus when exit
  588. */
  589. lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B");
  590. if (!lvds_priv->i2c_bus) {
  591. dev_printk(KERN_ERR,
  592. &dev->pdev->dev, "I2C bus registration failed.\n");
  593. goto failed_blc_i2c;
  594. }
  595. lvds_priv->i2c_bus->slave_addr = 0x2C;
  596. dev_priv->lvds_i2c_bus = lvds_priv->i2c_bus;
  597. /*
  598. * LVDS discovery:
  599. * 1) check for EDID on DDC
  600. * 2) check for VBT data
  601. * 3) check to see if LVDS is already on
  602. * if none of the above, no panel
  603. * 4) make sure lid is open
  604. * if closed, act like it's not there for now
  605. */
  606. /* Set up the DDC bus. */
  607. lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
  608. if (!lvds_priv->ddc_bus) {
  609. dev_printk(KERN_ERR, &dev->pdev->dev,
  610. "DDC bus registration " "failed.\n");
  611. goto failed_ddc;
  612. }
  613. /*
  614. * Attempt to get the fixed panel mode from DDC. Assume that the
  615. * preferred mode is the right one.
  616. */
  617. mutex_lock(&dev->mode_config.mutex);
  618. psb_intel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter);
  619. list_for_each_entry(scan, &connector->probed_modes, head) {
  620. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  621. mode_dev->panel_fixed_mode =
  622. drm_mode_duplicate(dev, scan);
  623. DRM_DEBUG_KMS("Using mode from DDC\n");
  624. goto out; /* FIXME: check for quirks */
  625. }
  626. }
  627. /* Failed to get EDID, what about VBT? do we need this? */
  628. if (dev_priv->lfp_lvds_vbt_mode) {
  629. mode_dev->panel_fixed_mode =
  630. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  631. if (mode_dev->panel_fixed_mode) {
  632. mode_dev->panel_fixed_mode->type |=
  633. DRM_MODE_TYPE_PREFERRED;
  634. DRM_DEBUG_KMS("Using mode from VBT\n");
  635. goto out;
  636. }
  637. }
  638. /*
  639. * If we didn't get EDID, try checking if the panel is already turned
  640. * on. If so, assume that whatever is currently programmed is the
  641. * correct mode.
  642. */
  643. lvds = REG_READ(LVDS);
  644. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  645. crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
  646. if (crtc && (lvds & LVDS_PORT_EN)) {
  647. mode_dev->panel_fixed_mode =
  648. psb_intel_crtc_mode_get(dev, crtc);
  649. if (mode_dev->panel_fixed_mode) {
  650. mode_dev->panel_fixed_mode->type |=
  651. DRM_MODE_TYPE_PREFERRED;
  652. DRM_DEBUG_KMS("Using pre-programmed mode\n");
  653. goto out; /* FIXME: check for quirks */
  654. }
  655. }
  656. /* If we still don't have a mode after all that, give up. */
  657. if (!mode_dev->panel_fixed_mode) {
  658. dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
  659. goto failed_find;
  660. }
  661. /*
  662. * Blacklist machines with BIOSes that list an LVDS panel without
  663. * actually having one.
  664. */
  665. out:
  666. mutex_unlock(&dev->mode_config.mutex);
  667. drm_connector_register(connector);
  668. return;
  669. failed_find:
  670. mutex_unlock(&dev->mode_config.mutex);
  671. psb_intel_i2c_destroy(lvds_priv->ddc_bus);
  672. failed_ddc:
  673. psb_intel_i2c_destroy(lvds_priv->i2c_bus);
  674. failed_blc_i2c:
  675. drm_encoder_cleanup(encoder);
  676. drm_connector_cleanup(connector);
  677. failed_connector:
  678. kfree(gma_connector);
  679. failed_encoder:
  680. kfree(gma_encoder);
  681. }