oaktrail_lvds.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright © 2006-2009 Intel Corporation
  4. *
  5. * Authors:
  6. * Eric Anholt <eric@anholt.net>
  7. * Dave Airlie <airlied@linux.ie>
  8. * Jesse Barnes <jesse.barnes@intel.com>
  9. */
  10. #include <linux/i2c.h>
  11. #include <linux/pm_runtime.h>
  12. #include <asm/intel-mid.h>
  13. #include <drm/drm_simple_kms_helper.h>
  14. #include "intel_bios.h"
  15. #include "power.h"
  16. #include "psb_drv.h"
  17. #include "psb_intel_drv.h"
  18. #include "psb_intel_reg.h"
  19. /* The max/min PWM frequency in BPCR[31:17] - */
  20. /* The smallest number is 1 (not 0) that can fit in the
  21. * 15-bit field of the and then*/
  22. /* shifts to the left by one bit to get the actual 16-bit
  23. * value that the 15-bits correspond to.*/
  24. #define MRST_BLC_MAX_PWM_REG_FREQ 0xFFFF
  25. #define BRIGHTNESS_MAX_LEVEL 100
  26. /**
  27. * Sets the power state for the panel.
  28. */
  29. static void oaktrail_lvds_set_power(struct drm_device *dev,
  30. struct gma_encoder *gma_encoder,
  31. bool on)
  32. {
  33. u32 pp_status;
  34. struct drm_psb_private *dev_priv = dev->dev_private;
  35. if (!gma_power_begin(dev, true))
  36. return;
  37. if (on) {
  38. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  39. POWER_TARGET_ON);
  40. do {
  41. pp_status = REG_READ(PP_STATUS);
  42. } while ((pp_status & (PP_ON | PP_READY)) == PP_READY);
  43. dev_priv->is_lvds_on = true;
  44. if (dev_priv->ops->lvds_bl_power)
  45. dev_priv->ops->lvds_bl_power(dev, true);
  46. } else {
  47. if (dev_priv->ops->lvds_bl_power)
  48. dev_priv->ops->lvds_bl_power(dev, false);
  49. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  50. ~POWER_TARGET_ON);
  51. do {
  52. pp_status = REG_READ(PP_STATUS);
  53. } while (pp_status & PP_ON);
  54. dev_priv->is_lvds_on = false;
  55. pm_request_idle(&dev->pdev->dev);
  56. }
  57. gma_power_end(dev);
  58. }
  59. static void oaktrail_lvds_dpms(struct drm_encoder *encoder, int mode)
  60. {
  61. struct drm_device *dev = encoder->dev;
  62. struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
  63. if (mode == DRM_MODE_DPMS_ON)
  64. oaktrail_lvds_set_power(dev, gma_encoder, true);
  65. else
  66. oaktrail_lvds_set_power(dev, gma_encoder, false);
  67. /* XXX: We never power down the LVDS pairs. */
  68. }
  69. static void oaktrail_lvds_mode_set(struct drm_encoder *encoder,
  70. struct drm_display_mode *mode,
  71. struct drm_display_mode *adjusted_mode)
  72. {
  73. struct drm_device *dev = encoder->dev;
  74. struct drm_psb_private *dev_priv = dev->dev_private;
  75. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  76. struct drm_mode_config *mode_config = &dev->mode_config;
  77. struct drm_connector *connector = NULL;
  78. struct drm_crtc *crtc = encoder->crtc;
  79. u32 lvds_port;
  80. uint64_t v = DRM_MODE_SCALE_FULLSCREEN;
  81. if (!gma_power_begin(dev, true))
  82. return;
  83. /*
  84. * The LVDS pin pair will already have been turned on in the
  85. * psb_intel_crtc_mode_set since it has a large impact on the DPLL
  86. * settings.
  87. */
  88. lvds_port = (REG_READ(LVDS) &
  89. (~LVDS_PIPEB_SELECT)) |
  90. LVDS_PORT_EN |
  91. LVDS_BORDER_EN;
  92. /* If the firmware says dither on Moorestown, or the BIOS does
  93. on Oaktrail then enable dithering */
  94. if (mode_dev->panel_wants_dither || dev_priv->lvds_dither)
  95. lvds_port |= MRST_PANEL_8TO6_DITHER_ENABLE;
  96. REG_WRITE(LVDS, lvds_port);
  97. /* Find the connector we're trying to set up */
  98. list_for_each_entry(connector, &mode_config->connector_list, head) {
  99. if (!connector->encoder || connector->encoder->crtc != crtc)
  100. continue;
  101. }
  102. if (list_entry_is_head(connector, &mode_config->connector_list, head)) {
  103. DRM_ERROR("Couldn't find connector when setting mode");
  104. gma_power_end(dev);
  105. return;
  106. }
  107. drm_object_property_get_value(
  108. &connector->base,
  109. dev->mode_config.scaling_mode_property,
  110. &v);
  111. if (v == DRM_MODE_SCALE_NO_SCALE)
  112. REG_WRITE(PFIT_CONTROL, 0);
  113. else if (v == DRM_MODE_SCALE_ASPECT) {
  114. if ((mode->vdisplay != adjusted_mode->crtc_vdisplay) ||
  115. (mode->hdisplay != adjusted_mode->crtc_hdisplay)) {
  116. if ((adjusted_mode->crtc_hdisplay * mode->vdisplay) ==
  117. (mode->hdisplay * adjusted_mode->crtc_vdisplay))
  118. REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
  119. else if ((adjusted_mode->crtc_hdisplay *
  120. mode->vdisplay) > (mode->hdisplay *
  121. adjusted_mode->crtc_vdisplay))
  122. REG_WRITE(PFIT_CONTROL, PFIT_ENABLE |
  123. PFIT_SCALING_MODE_PILLARBOX);
  124. else
  125. REG_WRITE(PFIT_CONTROL, PFIT_ENABLE |
  126. PFIT_SCALING_MODE_LETTERBOX);
  127. } else
  128. REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
  129. } else /*(v == DRM_MODE_SCALE_FULLSCREEN)*/
  130. REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
  131. gma_power_end(dev);
  132. }
  133. static void oaktrail_lvds_prepare(struct drm_encoder *encoder)
  134. {
  135. struct drm_device *dev = encoder->dev;
  136. struct drm_psb_private *dev_priv = dev->dev_private;
  137. struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
  138. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  139. if (!gma_power_begin(dev, true))
  140. return;
  141. mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  142. mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
  143. BACKLIGHT_DUTY_CYCLE_MASK);
  144. oaktrail_lvds_set_power(dev, gma_encoder, false);
  145. gma_power_end(dev);
  146. }
  147. static u32 oaktrail_lvds_get_max_backlight(struct drm_device *dev)
  148. {
  149. struct drm_psb_private *dev_priv = dev->dev_private;
  150. u32 ret;
  151. if (gma_power_begin(dev, false)) {
  152. ret = ((REG_READ(BLC_PWM_CTL) &
  153. BACKLIGHT_MODULATION_FREQ_MASK) >>
  154. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  155. gma_power_end(dev);
  156. } else
  157. ret = ((dev_priv->regs.saveBLC_PWM_CTL &
  158. BACKLIGHT_MODULATION_FREQ_MASK) >>
  159. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  160. return ret;
  161. }
  162. static void oaktrail_lvds_commit(struct drm_encoder *encoder)
  163. {
  164. struct drm_device *dev = encoder->dev;
  165. struct drm_psb_private *dev_priv = dev->dev_private;
  166. struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
  167. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  168. if (mode_dev->backlight_duty_cycle == 0)
  169. mode_dev->backlight_duty_cycle =
  170. oaktrail_lvds_get_max_backlight(dev);
  171. oaktrail_lvds_set_power(dev, gma_encoder, true);
  172. }
  173. static const struct drm_encoder_helper_funcs oaktrail_lvds_helper_funcs = {
  174. .dpms = oaktrail_lvds_dpms,
  175. .mode_fixup = psb_intel_lvds_mode_fixup,
  176. .prepare = oaktrail_lvds_prepare,
  177. .mode_set = oaktrail_lvds_mode_set,
  178. .commit = oaktrail_lvds_commit,
  179. };
  180. /* Returns the panel fixed mode from configuration. */
  181. static void oaktrail_lvds_get_configuration_mode(struct drm_device *dev,
  182. struct psb_intel_mode_device *mode_dev)
  183. {
  184. struct drm_display_mode *mode = NULL;
  185. struct drm_psb_private *dev_priv = dev->dev_private;
  186. struct oaktrail_timing_info *ti = &dev_priv->gct_data.DTD;
  187. mode_dev->panel_fixed_mode = NULL;
  188. /* Use the firmware provided data on Moorestown */
  189. if (dev_priv->has_gct) {
  190. mode = kzalloc(sizeof(*mode), GFP_KERNEL);
  191. if (!mode)
  192. return;
  193. mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo;
  194. mode->vdisplay = (ti->vactive_hi << 8) | ti->vactive_lo;
  195. mode->hsync_start = mode->hdisplay + \
  196. ((ti->hsync_offset_hi << 8) | \
  197. ti->hsync_offset_lo);
  198. mode->hsync_end = mode->hsync_start + \
  199. ((ti->hsync_pulse_width_hi << 8) | \
  200. ti->hsync_pulse_width_lo);
  201. mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \
  202. ti->hblank_lo);
  203. mode->vsync_start = \
  204. mode->vdisplay + ((ti->vsync_offset_hi << 4) | \
  205. ti->vsync_offset_lo);
  206. mode->vsync_end = \
  207. mode->vsync_start + ((ti->vsync_pulse_width_hi << 4) | \
  208. ti->vsync_pulse_width_lo);
  209. mode->vtotal = mode->vdisplay + \
  210. ((ti->vblank_hi << 8) | ti->vblank_lo);
  211. mode->clock = ti->pixel_clock * 10;
  212. #if 0
  213. pr_info("hdisplay is %d\n", mode->hdisplay);
  214. pr_info("vdisplay is %d\n", mode->vdisplay);
  215. pr_info("HSS is %d\n", mode->hsync_start);
  216. pr_info("HSE is %d\n", mode->hsync_end);
  217. pr_info("htotal is %d\n", mode->htotal);
  218. pr_info("VSS is %d\n", mode->vsync_start);
  219. pr_info("VSE is %d\n", mode->vsync_end);
  220. pr_info("vtotal is %d\n", mode->vtotal);
  221. pr_info("clock is %d\n", mode->clock);
  222. #endif
  223. mode_dev->panel_fixed_mode = mode;
  224. }
  225. /* Use the BIOS VBT mode if available */
  226. if (mode_dev->panel_fixed_mode == NULL && mode_dev->vbt_mode)
  227. mode_dev->panel_fixed_mode = drm_mode_duplicate(dev,
  228. mode_dev->vbt_mode);
  229. /* Then try the LVDS VBT mode */
  230. if (mode_dev->panel_fixed_mode == NULL)
  231. if (dev_priv->lfp_lvds_vbt_mode)
  232. mode_dev->panel_fixed_mode =
  233. drm_mode_duplicate(dev,
  234. dev_priv->lfp_lvds_vbt_mode);
  235. /* If we still got no mode then bail */
  236. if (mode_dev->panel_fixed_mode == NULL)
  237. return;
  238. drm_mode_set_name(mode_dev->panel_fixed_mode);
  239. drm_mode_set_crtcinfo(mode_dev->panel_fixed_mode, 0);
  240. }
  241. /**
  242. * oaktrail_lvds_init - setup LVDS connectors on this device
  243. * @dev: drm device
  244. *
  245. * Create the connector, register the LVDS DDC bus, and try to figure out what
  246. * modes we can display on the LVDS panel (if present).
  247. */
  248. void oaktrail_lvds_init(struct drm_device *dev,
  249. struct psb_intel_mode_device *mode_dev)
  250. {
  251. struct gma_encoder *gma_encoder;
  252. struct gma_connector *gma_connector;
  253. struct drm_connector *connector;
  254. struct drm_encoder *encoder;
  255. struct drm_psb_private *dev_priv = dev->dev_private;
  256. struct edid *edid;
  257. struct i2c_adapter *i2c_adap;
  258. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  259. gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
  260. if (!gma_encoder)
  261. return;
  262. gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
  263. if (!gma_connector)
  264. goto failed_connector;
  265. connector = &gma_connector->base;
  266. encoder = &gma_encoder->base;
  267. dev_priv->is_lvds_on = true;
  268. drm_connector_init(dev, connector,
  269. &psb_intel_lvds_connector_funcs,
  270. DRM_MODE_CONNECTOR_LVDS);
  271. drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_LVDS);
  272. gma_connector_attach_encoder(gma_connector, gma_encoder);
  273. gma_encoder->type = INTEL_OUTPUT_LVDS;
  274. drm_encoder_helper_add(encoder, &oaktrail_lvds_helper_funcs);
  275. drm_connector_helper_add(connector,
  276. &psb_intel_lvds_connector_helper_funcs);
  277. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  278. connector->interlace_allowed = false;
  279. connector->doublescan_allowed = false;
  280. drm_object_attach_property(&connector->base,
  281. dev->mode_config.scaling_mode_property,
  282. DRM_MODE_SCALE_FULLSCREEN);
  283. drm_object_attach_property(&connector->base,
  284. dev_priv->backlight_property,
  285. BRIGHTNESS_MAX_LEVEL);
  286. mode_dev->panel_wants_dither = false;
  287. if (dev_priv->has_gct)
  288. mode_dev->panel_wants_dither = (dev_priv->gct_data.
  289. Panel_Port_Control & MRST_PANEL_8TO6_DITHER_ENABLE);
  290. if (dev_priv->lvds_dither)
  291. mode_dev->panel_wants_dither = 1;
  292. /*
  293. * LVDS discovery:
  294. * 1) check for EDID on DDC
  295. * 2) check for VBT data
  296. * 3) check to see if LVDS is already on
  297. * if none of the above, no panel
  298. * 4) make sure lid is open
  299. * if closed, act like it's not there for now
  300. */
  301. edid = NULL;
  302. mutex_lock(&dev->mode_config.mutex);
  303. i2c_adap = i2c_get_adapter(dev_priv->ops->i2c_bus);
  304. if (i2c_adap)
  305. edid = drm_get_edid(connector, i2c_adap);
  306. if (edid == NULL && dev_priv->lpc_gpio_base) {
  307. oaktrail_lvds_i2c_init(encoder);
  308. if (gma_encoder->ddc_bus != NULL) {
  309. i2c_adap = &gma_encoder->ddc_bus->adapter;
  310. edid = drm_get_edid(connector, i2c_adap);
  311. }
  312. }
  313. /*
  314. * Attempt to get the fixed panel mode from DDC. Assume that the
  315. * preferred mode is the right one.
  316. */
  317. if (edid) {
  318. drm_connector_update_edid_property(connector, edid);
  319. drm_add_edid_modes(connector, edid);
  320. kfree(edid);
  321. list_for_each_entry(scan, &connector->probed_modes, head) {
  322. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  323. mode_dev->panel_fixed_mode =
  324. drm_mode_duplicate(dev, scan);
  325. goto out; /* FIXME: check for quirks */
  326. }
  327. }
  328. } else
  329. dev_err(dev->dev, "No ddc adapter available!\n");
  330. /*
  331. * If we didn't get EDID, try geting panel timing
  332. * from configuration data
  333. */
  334. oaktrail_lvds_get_configuration_mode(dev, mode_dev);
  335. if (mode_dev->panel_fixed_mode) {
  336. mode_dev->panel_fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  337. goto out; /* FIXME: check for quirks */
  338. }
  339. /* If we still don't have a mode after all that, give up. */
  340. if (!mode_dev->panel_fixed_mode) {
  341. dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
  342. goto failed_find;
  343. }
  344. out:
  345. mutex_unlock(&dev->mode_config.mutex);
  346. drm_connector_register(connector);
  347. return;
  348. failed_find:
  349. mutex_unlock(&dev->mode_config.mutex);
  350. dev_dbg(dev->dev, "No LVDS modes found, disabling.\n");
  351. if (gma_encoder->ddc_bus) {
  352. psb_intel_i2c_destroy(gma_encoder->ddc_bus);
  353. gma_encoder->ddc_bus = NULL;
  354. }
  355. /* failed_ddc: */
  356. drm_encoder_cleanup(encoder);
  357. drm_connector_cleanup(connector);
  358. kfree(gma_connector);
  359. failed_connector:
  360. kfree(gma_encoder);
  361. }