cdv_intel_crt.c 8.1 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. */
  26. #include <linux/delay.h>
  27. #include <linux/i2c.h>
  28. #include <linux/pm_runtime.h>
  29. #include <drm/drm_simple_kms_helper.h>
  30. #include "cdv_device.h"
  31. #include "intel_bios.h"
  32. #include "power.h"
  33. #include "psb_drv.h"
  34. #include "psb_intel_drv.h"
  35. #include "psb_intel_reg.h"
  36. static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode)
  37. {
  38. struct drm_device *dev = encoder->dev;
  39. u32 temp, reg;
  40. reg = ADPA;
  41. temp = REG_READ(reg);
  42. temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  43. temp &= ~ADPA_DAC_ENABLE;
  44. switch (mode) {
  45. case DRM_MODE_DPMS_ON:
  46. temp |= ADPA_DAC_ENABLE;
  47. break;
  48. case DRM_MODE_DPMS_STANDBY:
  49. temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  50. break;
  51. case DRM_MODE_DPMS_SUSPEND:
  52. temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  53. break;
  54. case DRM_MODE_DPMS_OFF:
  55. temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  56. break;
  57. }
  58. REG_WRITE(reg, temp);
  59. }
  60. static enum drm_mode_status cdv_intel_crt_mode_valid(struct drm_connector *connector,
  61. struct drm_display_mode *mode)
  62. {
  63. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  64. return MODE_NO_DBLESCAN;
  65. /* The lowest clock for CDV is 20000KHz */
  66. if (mode->clock < 20000)
  67. return MODE_CLOCK_LOW;
  68. /* The max clock for CDV is 355 instead of 400 */
  69. if (mode->clock > 355000)
  70. return MODE_CLOCK_HIGH;
  71. return MODE_OK;
  72. }
  73. static void cdv_intel_crt_mode_set(struct drm_encoder *encoder,
  74. struct drm_display_mode *mode,
  75. struct drm_display_mode *adjusted_mode)
  76. {
  77. struct drm_device *dev = encoder->dev;
  78. struct drm_crtc *crtc = encoder->crtc;
  79. struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
  80. int dpll_md_reg;
  81. u32 adpa, dpll_md;
  82. u32 adpa_reg;
  83. if (gma_crtc->pipe == 0)
  84. dpll_md_reg = DPLL_A_MD;
  85. else
  86. dpll_md_reg = DPLL_B_MD;
  87. adpa_reg = ADPA;
  88. /*
  89. * Disable separate mode multiplier used when cloning SDVO to CRT
  90. * XXX this needs to be adjusted when we really are cloning
  91. */
  92. {
  93. dpll_md = REG_READ(dpll_md_reg);
  94. REG_WRITE(dpll_md_reg,
  95. dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
  96. }
  97. adpa = 0;
  98. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  99. adpa |= ADPA_HSYNC_ACTIVE_HIGH;
  100. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  101. adpa |= ADPA_VSYNC_ACTIVE_HIGH;
  102. if (gma_crtc->pipe == 0)
  103. adpa |= ADPA_PIPE_A_SELECT;
  104. else
  105. adpa |= ADPA_PIPE_B_SELECT;
  106. REG_WRITE(adpa_reg, adpa);
  107. }
  108. /**
  109. * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
  110. *
  111. * \return true if CRT is connected.
  112. * \return false if CRT is disconnected.
  113. */
  114. static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,
  115. bool force)
  116. {
  117. struct drm_device *dev = connector->dev;
  118. u32 hotplug_en;
  119. int i, tries = 0, ret = false;
  120. u32 orig;
  121. /*
  122. * On a CDV thep, CRT detect sequence need to be done twice
  123. * to get a reliable result.
  124. */
  125. tries = 2;
  126. orig = hotplug_en = REG_READ(PORT_HOTPLUG_EN);
  127. hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK);
  128. hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
  129. hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
  130. hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
  131. for (i = 0; i < tries ; i++) {
  132. unsigned long timeout;
  133. /* turn on the FORCE_DETECT */
  134. REG_WRITE(PORT_HOTPLUG_EN, hotplug_en);
  135. timeout = jiffies + msecs_to_jiffies(1000);
  136. /* wait for FORCE_DETECT to go off */
  137. do {
  138. if (!(REG_READ(PORT_HOTPLUG_EN) &
  139. CRT_HOTPLUG_FORCE_DETECT))
  140. break;
  141. msleep(1);
  142. } while (time_after(timeout, jiffies));
  143. }
  144. if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
  145. CRT_HOTPLUG_MONITOR_NONE)
  146. ret = true;
  147. /* clear the interrupt we just generated, if any */
  148. REG_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
  149. /* and put the bits back */
  150. REG_WRITE(PORT_HOTPLUG_EN, orig);
  151. return ret;
  152. }
  153. static enum drm_connector_status cdv_intel_crt_detect(
  154. struct drm_connector *connector, bool force)
  155. {
  156. if (cdv_intel_crt_detect_hotplug(connector, force))
  157. return connector_status_connected;
  158. else
  159. return connector_status_disconnected;
  160. }
  161. static void cdv_intel_crt_destroy(struct drm_connector *connector)
  162. {
  163. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  164. psb_intel_i2c_destroy(gma_encoder->ddc_bus);
  165. drm_connector_unregister(connector);
  166. drm_connector_cleanup(connector);
  167. kfree(connector);
  168. }
  169. static int cdv_intel_crt_get_modes(struct drm_connector *connector)
  170. {
  171. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  172. return psb_intel_ddc_get_modes(connector,
  173. &gma_encoder->ddc_bus->adapter);
  174. }
  175. static int cdv_intel_crt_set_property(struct drm_connector *connector,
  176. struct drm_property *property,
  177. uint64_t value)
  178. {
  179. return 0;
  180. }
  181. /*
  182. * Routines for controlling stuff on the analog port
  183. */
  184. static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = {
  185. .dpms = cdv_intel_crt_dpms,
  186. .prepare = gma_encoder_prepare,
  187. .commit = gma_encoder_commit,
  188. .mode_set = cdv_intel_crt_mode_set,
  189. };
  190. static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = {
  191. .dpms = drm_helper_connector_dpms,
  192. .detect = cdv_intel_crt_detect,
  193. .fill_modes = drm_helper_probe_single_connector_modes,
  194. .destroy = cdv_intel_crt_destroy,
  195. .set_property = cdv_intel_crt_set_property,
  196. };
  197. static const struct drm_connector_helper_funcs
  198. cdv_intel_crt_connector_helper_funcs = {
  199. .mode_valid = cdv_intel_crt_mode_valid,
  200. .get_modes = cdv_intel_crt_get_modes,
  201. .best_encoder = gma_best_encoder,
  202. };
  203. void cdv_intel_crt_init(struct drm_device *dev,
  204. struct psb_intel_mode_device *mode_dev)
  205. {
  206. struct gma_connector *gma_connector;
  207. struct gma_encoder *gma_encoder;
  208. struct drm_connector *connector;
  209. struct drm_encoder *encoder;
  210. u32 i2c_reg;
  211. gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
  212. if (!gma_encoder)
  213. return;
  214. gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
  215. if (!gma_connector)
  216. goto failed_connector;
  217. connector = &gma_connector->base;
  218. connector->polled = DRM_CONNECTOR_POLL_HPD;
  219. drm_connector_init(dev, connector,
  220. &cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
  221. encoder = &gma_encoder->base;
  222. drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC);
  223. gma_connector_attach_encoder(gma_connector, gma_encoder);
  224. /* Set up the DDC bus. */
  225. i2c_reg = GPIOA;
  226. /* Remove the following code for CDV */
  227. /*
  228. if (dev_priv->crt_ddc_bus != 0)
  229. i2c_reg = dev_priv->crt_ddc_bus;
  230. }*/
  231. gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
  232. i2c_reg, "CRTDDC_A");
  233. if (!gma_encoder->ddc_bus) {
  234. dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
  235. "failed.\n");
  236. goto failed_ddc;
  237. }
  238. gma_encoder->type = INTEL_OUTPUT_ANALOG;
  239. /*
  240. psb_intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT);
  241. psb_intel_output->crtc_mask = (1 << 0) | (1 << 1);
  242. */
  243. connector->interlace_allowed = 0;
  244. connector->doublescan_allowed = 0;
  245. drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs);
  246. drm_connector_helper_add(connector,
  247. &cdv_intel_crt_connector_helper_funcs);
  248. drm_connector_register(connector);
  249. return;
  250. failed_ddc:
  251. drm_encoder_cleanup(&gma_encoder->base);
  252. drm_connector_cleanup(&gma_connector->base);
  253. kfree(gma_connector);
  254. failed_connector:
  255. kfree(gma_encoder);
  256. return;
  257. }