fsl_dcu_drm_plane.c 5.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2015 Freescale Semiconductor, Inc.
  4. *
  5. * Freescale DCU drm device driver
  6. */
  7. #include <linux/regmap.h>
  8. #include <drm/drm_atomic_helper.h>
  9. #include <drm/drm_crtc.h>
  10. #include <drm/drm_fb_cma_helper.h>
  11. #include <drm/drm_fourcc.h>
  12. #include <drm/drm_gem_cma_helper.h>
  13. #include <drm/drm_plane_helper.h>
  14. #include <drm/drm_probe_helper.h>
  15. #include "fsl_dcu_drm_drv.h"
  16. #include "fsl_dcu_drm_plane.h"
  17. static int fsl_dcu_drm_plane_index(struct drm_plane *plane)
  18. {
  19. struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private;
  20. unsigned int total_layer = fsl_dev->soc->total_layer;
  21. unsigned int index;
  22. index = drm_plane_index(plane);
  23. if (index < total_layer)
  24. return total_layer - index - 1;
  25. dev_err(fsl_dev->dev, "No more layer left\n");
  26. return -EINVAL;
  27. }
  28. static int fsl_dcu_drm_plane_atomic_check(struct drm_plane *plane,
  29. struct drm_plane_state *state)
  30. {
  31. struct drm_framebuffer *fb = state->fb;
  32. if (!state->fb || !state->crtc)
  33. return 0;
  34. switch (fb->format->format) {
  35. case DRM_FORMAT_RGB565:
  36. case DRM_FORMAT_RGB888:
  37. case DRM_FORMAT_XRGB8888:
  38. case DRM_FORMAT_ARGB8888:
  39. case DRM_FORMAT_XRGB4444:
  40. case DRM_FORMAT_ARGB4444:
  41. case DRM_FORMAT_XRGB1555:
  42. case DRM_FORMAT_ARGB1555:
  43. case DRM_FORMAT_YUV422:
  44. return 0;
  45. default:
  46. return -EINVAL;
  47. }
  48. }
  49. static void fsl_dcu_drm_plane_atomic_disable(struct drm_plane *plane,
  50. struct drm_plane_state *old_state)
  51. {
  52. struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private;
  53. unsigned int value;
  54. int index;
  55. index = fsl_dcu_drm_plane_index(plane);
  56. if (index < 0)
  57. return;
  58. regmap_read(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4), &value);
  59. value &= ~DCU_LAYER_EN;
  60. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4), value);
  61. }
  62. static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane,
  63. struct drm_plane_state *old_state)
  64. {
  65. struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private;
  66. struct drm_plane_state *state = plane->state;
  67. struct drm_framebuffer *fb = plane->state->fb;
  68. struct drm_gem_cma_object *gem;
  69. unsigned int alpha = DCU_LAYER_AB_NONE, bpp;
  70. int index;
  71. if (!fb)
  72. return;
  73. index = fsl_dcu_drm_plane_index(plane);
  74. if (index < 0)
  75. return;
  76. gem = drm_fb_cma_get_gem_obj(fb, 0);
  77. switch (fb->format->format) {
  78. case DRM_FORMAT_RGB565:
  79. bpp = FSL_DCU_RGB565;
  80. break;
  81. case DRM_FORMAT_RGB888:
  82. bpp = FSL_DCU_RGB888;
  83. break;
  84. case DRM_FORMAT_ARGB8888:
  85. alpha = DCU_LAYER_AB_WHOLE_FRAME;
  86. fallthrough;
  87. case DRM_FORMAT_XRGB8888:
  88. bpp = FSL_DCU_ARGB8888;
  89. break;
  90. case DRM_FORMAT_ARGB4444:
  91. alpha = DCU_LAYER_AB_WHOLE_FRAME;
  92. fallthrough;
  93. case DRM_FORMAT_XRGB4444:
  94. bpp = FSL_DCU_ARGB4444;
  95. break;
  96. case DRM_FORMAT_ARGB1555:
  97. alpha = DCU_LAYER_AB_WHOLE_FRAME;
  98. fallthrough;
  99. case DRM_FORMAT_XRGB1555:
  100. bpp = FSL_DCU_ARGB1555;
  101. break;
  102. case DRM_FORMAT_YUV422:
  103. bpp = FSL_DCU_YUV422;
  104. break;
  105. default:
  106. return;
  107. }
  108. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 1),
  109. DCU_LAYER_HEIGHT(state->crtc_h) |
  110. DCU_LAYER_WIDTH(state->crtc_w));
  111. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 2),
  112. DCU_LAYER_POSY(state->crtc_y) |
  113. DCU_LAYER_POSX(state->crtc_x));
  114. regmap_write(fsl_dev->regmap,
  115. DCU_CTRLDESCLN(index, 3), gem->paddr);
  116. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4),
  117. DCU_LAYER_EN |
  118. DCU_LAYER_TRANS(0xff) |
  119. DCU_LAYER_BPP(bpp) |
  120. alpha);
  121. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 5),
  122. DCU_LAYER_CKMAX_R(0xFF) |
  123. DCU_LAYER_CKMAX_G(0xFF) |
  124. DCU_LAYER_CKMAX_B(0xFF));
  125. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 6),
  126. DCU_LAYER_CKMIN_R(0) |
  127. DCU_LAYER_CKMIN_G(0) |
  128. DCU_LAYER_CKMIN_B(0));
  129. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 7), 0);
  130. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 8),
  131. DCU_LAYER_FG_FCOLOR(0));
  132. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 9),
  133. DCU_LAYER_BG_BCOLOR(0));
  134. if (!strcmp(fsl_dev->soc->name, "ls1021a")) {
  135. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 10),
  136. DCU_LAYER_POST_SKIP(0) |
  137. DCU_LAYER_PRE_SKIP(0));
  138. }
  139. return;
  140. }
  141. static const struct drm_plane_helper_funcs fsl_dcu_drm_plane_helper_funcs = {
  142. .atomic_check = fsl_dcu_drm_plane_atomic_check,
  143. .atomic_disable = fsl_dcu_drm_plane_atomic_disable,
  144. .atomic_update = fsl_dcu_drm_plane_atomic_update,
  145. };
  146. static void fsl_dcu_drm_plane_destroy(struct drm_plane *plane)
  147. {
  148. drm_plane_cleanup(plane);
  149. kfree(plane);
  150. }
  151. static const struct drm_plane_funcs fsl_dcu_drm_plane_funcs = {
  152. .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
  153. .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
  154. .destroy = fsl_dcu_drm_plane_destroy,
  155. .disable_plane = drm_atomic_helper_disable_plane,
  156. .reset = drm_atomic_helper_plane_reset,
  157. .update_plane = drm_atomic_helper_update_plane,
  158. };
  159. static const u32 fsl_dcu_drm_plane_formats[] = {
  160. DRM_FORMAT_RGB565,
  161. DRM_FORMAT_RGB888,
  162. DRM_FORMAT_XRGB8888,
  163. DRM_FORMAT_ARGB8888,
  164. DRM_FORMAT_XRGB4444,
  165. DRM_FORMAT_ARGB4444,
  166. DRM_FORMAT_XRGB1555,
  167. DRM_FORMAT_ARGB1555,
  168. DRM_FORMAT_YUV422,
  169. };
  170. void fsl_dcu_drm_init_planes(struct drm_device *dev)
  171. {
  172. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  173. int i, j;
  174. for (i = 0; i < fsl_dev->soc->total_layer; i++) {
  175. for (j = 1; j <= fsl_dev->soc->layer_regs; j++)
  176. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(i, j), 0);
  177. }
  178. }
  179. struct drm_plane *fsl_dcu_drm_primary_create_plane(struct drm_device *dev)
  180. {
  181. struct drm_plane *primary;
  182. int ret;
  183. primary = kzalloc(sizeof(*primary), GFP_KERNEL);
  184. if (!primary) {
  185. DRM_DEBUG_KMS("Failed to allocate primary plane\n");
  186. return NULL;
  187. }
  188. /* possible_crtc's will be filled in later by crtc_init */
  189. ret = drm_universal_plane_init(dev, primary, 0,
  190. &fsl_dcu_drm_plane_funcs,
  191. fsl_dcu_drm_plane_formats,
  192. ARRAY_SIZE(fsl_dcu_drm_plane_formats),
  193. NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
  194. if (ret) {
  195. kfree(primary);
  196. primary = NULL;
  197. }
  198. drm_plane_helper_add(primary, &fsl_dcu_drm_plane_helper_funcs);
  199. return primary;
  200. }