regs-mixer.h 5.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. *
  4. * Cloned from drivers/media/video/s5p-tv/regs-mixer.h
  5. *
  6. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  7. * http://www.samsung.com/
  8. *
  9. * Mixer register header file for Samsung Mixer driver
  10. */
  11. #ifndef SAMSUNG_REGS_MIXER_H
  12. #define SAMSUNG_REGS_MIXER_H
  13. /*
  14. * Register part
  15. */
  16. #define MXR_STATUS 0x0000
  17. #define MXR_CFG 0x0004
  18. #define MXR_INT_EN 0x0008
  19. #define MXR_INT_STATUS 0x000C
  20. #define MXR_LAYER_CFG 0x0010
  21. #define MXR_VIDEO_CFG 0x0014
  22. #define MXR_GRAPHIC0_CFG 0x0020
  23. #define MXR_GRAPHIC0_BASE 0x0024
  24. #define MXR_GRAPHIC0_SPAN 0x0028
  25. #define MXR_GRAPHIC0_SXY 0x002C
  26. #define MXR_GRAPHIC0_WH 0x0030
  27. #define MXR_GRAPHIC0_DXY 0x0034
  28. #define MXR_GRAPHIC0_BLANK 0x0038
  29. #define MXR_GRAPHIC1_CFG 0x0040
  30. #define MXR_GRAPHIC1_BASE 0x0044
  31. #define MXR_GRAPHIC1_SPAN 0x0048
  32. #define MXR_GRAPHIC1_SXY 0x004C
  33. #define MXR_GRAPHIC1_WH 0x0050
  34. #define MXR_GRAPHIC1_DXY 0x0054
  35. #define MXR_GRAPHIC1_BLANK 0x0058
  36. #define MXR_BG_CFG 0x0060
  37. #define MXR_BG_COLOR0 0x0064
  38. #define MXR_BG_COLOR1 0x0068
  39. #define MXR_BG_COLOR2 0x006C
  40. #define MXR_CM_COEFF_Y 0x0080
  41. #define MXR_CM_COEFF_CB 0x0084
  42. #define MXR_CM_COEFF_CR 0x0088
  43. #define MXR_MO 0x0304
  44. #define MXR_RESOLUTION 0x0310
  45. #define MXR_CFG_S 0x2004
  46. #define MXR_GRAPHIC0_BASE_S 0x2024
  47. #define MXR_GRAPHIC1_BASE_S 0x2044
  48. /* for parametrized access to layer registers */
  49. #define MXR_GRAPHIC_CFG(i) (0x0020 + (i) * 0x20)
  50. #define MXR_GRAPHIC_BASE(i) (0x0024 + (i) * 0x20)
  51. #define MXR_GRAPHIC_SPAN(i) (0x0028 + (i) * 0x20)
  52. #define MXR_GRAPHIC_SXY(i) (0x002C + (i) * 0x20)
  53. #define MXR_GRAPHIC_WH(i) (0x0030 + (i) * 0x20)
  54. #define MXR_GRAPHIC_DXY(i) (0x0034 + (i) * 0x20)
  55. #define MXR_GRAPHIC_BLANK(i) (0x0038 + (i) * 0x20)
  56. #define MXR_GRAPHIC_BASE_S(i) (0x2024 + (i) * 0x20)
  57. /*
  58. * Bit definition part
  59. */
  60. /* generates mask for range of bits */
  61. #define MXR_MASK(high_bit, low_bit) \
  62. (((2 << ((high_bit) - (low_bit))) - 1) << (low_bit))
  63. #define MXR_MASK_VAL(val, high_bit, low_bit) \
  64. (((val) << (low_bit)) & MXR_MASK(high_bit, low_bit))
  65. /* bits for MXR_STATUS */
  66. #define MXR_STATUS_SOFT_RESET (1 << 8)
  67. #define MXR_STATUS_16_BURST (1 << 7)
  68. #define MXR_STATUS_BURST_MASK (1 << 7)
  69. #define MXR_STATUS_BIG_ENDIAN (1 << 3)
  70. #define MXR_STATUS_ENDIAN_MASK (1 << 3)
  71. #define MXR_STATUS_SYNC_ENABLE (1 << 2)
  72. #define MXR_STATUS_REG_IDLE (1 << 1)
  73. #define MXR_STATUS_REG_RUN (1 << 0)
  74. /* bits for MXR_CFG */
  75. #define MXR_CFG_LAYER_UPDATE (1 << 31)
  76. #define MXR_CFG_LAYER_UPDATE_COUNT_MASK (3 << 29)
  77. #define MXR_CFG_QUANT_RANGE_FULL (0 << 9)
  78. #define MXR_CFG_QUANT_RANGE_LIMITED (1 << 9)
  79. #define MXR_CFG_RGB601 (0 << 10)
  80. #define MXR_CFG_RGB709 (1 << 10)
  81. #define MXR_CFG_RGB_FMT_MASK 0x600
  82. #define MXR_CFG_OUT_YUV444 (0 << 8)
  83. #define MXR_CFG_OUT_RGB888 (1 << 8)
  84. #define MXR_CFG_OUT_MASK (1 << 8)
  85. #define MXR_CFG_DST_SDO (0 << 7)
  86. #define MXR_CFG_DST_HDMI (1 << 7)
  87. #define MXR_CFG_DST_MASK (1 << 7)
  88. #define MXR_CFG_SCAN_HD_720 (0 << 6)
  89. #define MXR_CFG_SCAN_HD_1080 (1 << 6)
  90. #define MXR_CFG_GRP1_ENABLE (1 << 5)
  91. #define MXR_CFG_GRP0_ENABLE (1 << 4)
  92. #define MXR_CFG_VP_ENABLE (1 << 3)
  93. #define MXR_CFG_SCAN_INTERLACE (0 << 2)
  94. #define MXR_CFG_SCAN_PROGRESSIVE (1 << 2)
  95. #define MXR_CFG_SCAN_NTSC (0 << 1)
  96. #define MXR_CFG_SCAN_PAL (1 << 1)
  97. #define MXR_CFG_SCAN_SD (0 << 0)
  98. #define MXR_CFG_SCAN_HD (1 << 0)
  99. #define MXR_CFG_SCAN_MASK 0x47
  100. /* bits for MXR_VIDEO_CFG */
  101. #define MXR_VID_CFG_BLEND_EN (1 << 16)
  102. /* bits for MXR_GRAPHICn_CFG */
  103. #define MXR_GRP_CFG_COLOR_KEY_DISABLE (1 << 21)
  104. #define MXR_GRP_CFG_BLEND_PRE_MUL (1 << 20)
  105. #define MXR_GRP_CFG_WIN_BLEND_EN (1 << 17)
  106. #define MXR_GRP_CFG_PIXEL_BLEND_EN (1 << 16)
  107. #define MXR_GRP_CFG_MISC_MASK ((3 << 16) | (3 << 20) | 0xff)
  108. #define MXR_GRP_CFG_FORMAT_VAL(x) MXR_MASK_VAL(x, 11, 8)
  109. #define MXR_GRP_CFG_FORMAT_MASK MXR_GRP_CFG_FORMAT_VAL(~0)
  110. #define MXR_GRP_CFG_ALPHA_VAL(x) MXR_MASK_VAL(x, 7, 0)
  111. /* bits for MXR_GRAPHICn_WH */
  112. #define MXR_GRP_WH_H_SCALE(x) MXR_MASK_VAL(x, 28, 28)
  113. #define MXR_GRP_WH_V_SCALE(x) MXR_MASK_VAL(x, 12, 12)
  114. #define MXR_GRP_WH_WIDTH(x) MXR_MASK_VAL(x, 26, 16)
  115. #define MXR_GRP_WH_HEIGHT(x) MXR_MASK_VAL(x, 10, 0)
  116. /* bits for MXR_RESOLUTION */
  117. #define MXR_MXR_RES_HEIGHT(x) MXR_MASK_VAL(x, 26, 16)
  118. #define MXR_MXR_RES_WIDTH(x) MXR_MASK_VAL(x, 10, 0)
  119. /* bits for MXR_GRAPHICn_SXY */
  120. #define MXR_GRP_SXY_SX(x) MXR_MASK_VAL(x, 26, 16)
  121. #define MXR_GRP_SXY_SY(x) MXR_MASK_VAL(x, 10, 0)
  122. /* bits for MXR_GRAPHICn_DXY */
  123. #define MXR_GRP_DXY_DX(x) MXR_MASK_VAL(x, 26, 16)
  124. #define MXR_GRP_DXY_DY(x) MXR_MASK_VAL(x, 10, 0)
  125. /* bits for MXR_INT_EN */
  126. #define MXR_INT_EN_VSYNC (1 << 11)
  127. #define MXR_INT_EN_ALL (0x0f << 8)
  128. /* bits for MXR_INT_STATUS */
  129. #define MXR_INT_CLEAR_VSYNC (1 << 11)
  130. #define MXR_INT_STATUS_VSYNC (1 << 0)
  131. /* bits for MXR_LAYER_CFG */
  132. #define MXR_LAYER_CFG_GRP1_VAL(x) MXR_MASK_VAL(x, 11, 8)
  133. #define MXR_LAYER_CFG_GRP1_MASK MXR_LAYER_CFG_GRP1_VAL(~0)
  134. #define MXR_LAYER_CFG_GRP0_VAL(x) MXR_MASK_VAL(x, 7, 4)
  135. #define MXR_LAYER_CFG_GRP0_MASK MXR_LAYER_CFG_GRP0_VAL(~0)
  136. #define MXR_LAYER_CFG_VP_VAL(x) MXR_MASK_VAL(x, 3, 0)
  137. #define MXR_LAYER_CFG_VP_MASK MXR_LAYER_CFG_VP_VAL(~0)
  138. /* bits for MXR_CM_COEFF_Y */
  139. #define MXR_CM_COEFF_RGB_FULL (1 << 30)
  140. #endif /* SAMSUNG_REGS_MIXER_H */