exynos_drm_ipp.c 25 KB

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  1. /*
  2. * Copyright (C) 2017 Samsung Electronics Co.Ltd
  3. * Authors:
  4. * Marek Szyprowski <m.szyprowski@samsung.com>
  5. *
  6. * Exynos DRM Image Post Processing (IPP) related functions
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the "Software"),
  10. * to deal in the Software without restriction, including without limitation
  11. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12. * and/or sell copies of the Software, and to permit persons to whom the
  13. * Software is furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. */
  18. #include <linux/uaccess.h>
  19. #include <drm/drm_file.h>
  20. #include <drm/drm_fourcc.h>
  21. #include <drm/drm_mode.h>
  22. #include <drm/exynos_drm.h>
  23. #include "exynos_drm_drv.h"
  24. #include "exynos_drm_gem.h"
  25. #include "exynos_drm_ipp.h"
  26. static int num_ipp;
  27. static LIST_HEAD(ipp_list);
  28. /**
  29. * exynos_drm_ipp_register - Register a new picture processor hardware module
  30. * @dev: DRM device
  31. * @ipp: ipp module to init
  32. * @funcs: callbacks for the new ipp object
  33. * @caps: bitmask of ipp capabilities (%DRM_EXYNOS_IPP_CAP_*)
  34. * @formats: array of supported formats
  35. * @num_formats: size of the supported formats array
  36. * @name: name (for debugging purposes)
  37. *
  38. * Initializes a ipp module.
  39. *
  40. * Returns:
  41. * Zero on success, error code on failure.
  42. */
  43. int exynos_drm_ipp_register(struct device *dev, struct exynos_drm_ipp *ipp,
  44. const struct exynos_drm_ipp_funcs *funcs, unsigned int caps,
  45. const struct exynos_drm_ipp_formats *formats,
  46. unsigned int num_formats, const char *name)
  47. {
  48. WARN_ON(!ipp);
  49. WARN_ON(!funcs);
  50. WARN_ON(!formats);
  51. WARN_ON(!num_formats);
  52. spin_lock_init(&ipp->lock);
  53. INIT_LIST_HEAD(&ipp->todo_list);
  54. init_waitqueue_head(&ipp->done_wq);
  55. ipp->dev = dev;
  56. ipp->funcs = funcs;
  57. ipp->capabilities = caps;
  58. ipp->name = name;
  59. ipp->formats = formats;
  60. ipp->num_formats = num_formats;
  61. /* ipp_list modification is serialized by component framework */
  62. list_add_tail(&ipp->head, &ipp_list);
  63. ipp->id = num_ipp++;
  64. DRM_DEV_DEBUG_DRIVER(dev, "Registered ipp %d\n", ipp->id);
  65. return 0;
  66. }
  67. /**
  68. * exynos_drm_ipp_unregister - Unregister the picture processor module
  69. * @dev: DRM device
  70. * @ipp: ipp module
  71. */
  72. void exynos_drm_ipp_unregister(struct device *dev,
  73. struct exynos_drm_ipp *ipp)
  74. {
  75. WARN_ON(ipp->task);
  76. WARN_ON(!list_empty(&ipp->todo_list));
  77. list_del(&ipp->head);
  78. }
  79. /**
  80. * exynos_drm_ipp_ioctl_get_res_ioctl - enumerate all ipp modules
  81. * @dev: DRM device
  82. * @data: ioctl data
  83. * @file_priv: DRM file info
  84. *
  85. * Construct a list of ipp ids.
  86. *
  87. * Called by the user via ioctl.
  88. *
  89. * Returns:
  90. * Zero on success, negative errno on failure.
  91. */
  92. int exynos_drm_ipp_get_res_ioctl(struct drm_device *dev, void *data,
  93. struct drm_file *file_priv)
  94. {
  95. struct drm_exynos_ioctl_ipp_get_res *resp = data;
  96. struct exynos_drm_ipp *ipp;
  97. uint32_t __user *ipp_ptr = (uint32_t __user *)
  98. (unsigned long)resp->ipp_id_ptr;
  99. unsigned int count = num_ipp, copied = 0;
  100. /*
  101. * This ioctl is called twice, once to determine how much space is
  102. * needed, and the 2nd time to fill it.
  103. */
  104. if (count && resp->count_ipps >= count) {
  105. list_for_each_entry(ipp, &ipp_list, head) {
  106. if (put_user(ipp->id, ipp_ptr + copied))
  107. return -EFAULT;
  108. copied++;
  109. }
  110. }
  111. resp->count_ipps = count;
  112. return 0;
  113. }
  114. static inline struct exynos_drm_ipp *__ipp_get(uint32_t id)
  115. {
  116. struct exynos_drm_ipp *ipp;
  117. list_for_each_entry(ipp, &ipp_list, head)
  118. if (ipp->id == id)
  119. return ipp;
  120. return NULL;
  121. }
  122. /**
  123. * exynos_drm_ipp_ioctl_get_caps - get ipp module capabilities and formats
  124. * @dev: DRM device
  125. * @data: ioctl data
  126. * @file_priv: DRM file info
  127. *
  128. * Construct a structure describing ipp module capabilities.
  129. *
  130. * Called by the user via ioctl.
  131. *
  132. * Returns:
  133. * Zero on success, negative errno on failure.
  134. */
  135. int exynos_drm_ipp_get_caps_ioctl(struct drm_device *dev, void *data,
  136. struct drm_file *file_priv)
  137. {
  138. struct drm_exynos_ioctl_ipp_get_caps *resp = data;
  139. void __user *ptr = (void __user *)(unsigned long)resp->formats_ptr;
  140. struct exynos_drm_ipp *ipp;
  141. int i;
  142. ipp = __ipp_get(resp->ipp_id);
  143. if (!ipp)
  144. return -ENOENT;
  145. resp->ipp_id = ipp->id;
  146. resp->capabilities = ipp->capabilities;
  147. /*
  148. * This ioctl is called twice, once to determine how much space is
  149. * needed, and the 2nd time to fill it.
  150. */
  151. if (resp->formats_count >= ipp->num_formats) {
  152. for (i = 0; i < ipp->num_formats; i++) {
  153. struct drm_exynos_ipp_format tmp = {
  154. .fourcc = ipp->formats[i].fourcc,
  155. .type = ipp->formats[i].type,
  156. .modifier = ipp->formats[i].modifier,
  157. };
  158. if (copy_to_user(ptr, &tmp, sizeof(tmp)))
  159. return -EFAULT;
  160. ptr += sizeof(tmp);
  161. }
  162. }
  163. resp->formats_count = ipp->num_formats;
  164. return 0;
  165. }
  166. static inline const struct exynos_drm_ipp_formats *__ipp_format_get(
  167. struct exynos_drm_ipp *ipp, uint32_t fourcc,
  168. uint64_t mod, unsigned int type)
  169. {
  170. int i;
  171. for (i = 0; i < ipp->num_formats; i++) {
  172. if ((ipp->formats[i].type & type) &&
  173. ipp->formats[i].fourcc == fourcc &&
  174. ipp->formats[i].modifier == mod)
  175. return &ipp->formats[i];
  176. }
  177. return NULL;
  178. }
  179. /**
  180. * exynos_drm_ipp_get_limits_ioctl - get ipp module limits
  181. * @dev: DRM device
  182. * @data: ioctl data
  183. * @file_priv: DRM file info
  184. *
  185. * Construct a structure describing ipp module limitations for provided
  186. * picture format.
  187. *
  188. * Called by the user via ioctl.
  189. *
  190. * Returns:
  191. * Zero on success, negative errno on failure.
  192. */
  193. int exynos_drm_ipp_get_limits_ioctl(struct drm_device *dev, void *data,
  194. struct drm_file *file_priv)
  195. {
  196. struct drm_exynos_ioctl_ipp_get_limits *resp = data;
  197. void __user *ptr = (void __user *)(unsigned long)resp->limits_ptr;
  198. const struct exynos_drm_ipp_formats *format;
  199. struct exynos_drm_ipp *ipp;
  200. if (resp->type != DRM_EXYNOS_IPP_FORMAT_SOURCE &&
  201. resp->type != DRM_EXYNOS_IPP_FORMAT_DESTINATION)
  202. return -EINVAL;
  203. ipp = __ipp_get(resp->ipp_id);
  204. if (!ipp)
  205. return -ENOENT;
  206. format = __ipp_format_get(ipp, resp->fourcc, resp->modifier,
  207. resp->type);
  208. if (!format)
  209. return -EINVAL;
  210. /*
  211. * This ioctl is called twice, once to determine how much space is
  212. * needed, and the 2nd time to fill it.
  213. */
  214. if (format->num_limits && resp->limits_count >= format->num_limits)
  215. if (copy_to_user((void __user *)ptr, format->limits,
  216. sizeof(*format->limits) * format->num_limits))
  217. return -EFAULT;
  218. resp->limits_count = format->num_limits;
  219. return 0;
  220. }
  221. struct drm_pending_exynos_ipp_event {
  222. struct drm_pending_event base;
  223. struct drm_exynos_ipp_event event;
  224. };
  225. static inline struct exynos_drm_ipp_task *
  226. exynos_drm_ipp_task_alloc(struct exynos_drm_ipp *ipp)
  227. {
  228. struct exynos_drm_ipp_task *task;
  229. task = kzalloc(sizeof(*task), GFP_KERNEL);
  230. if (!task)
  231. return NULL;
  232. task->dev = ipp->dev;
  233. task->ipp = ipp;
  234. /* some defaults */
  235. task->src.rect.w = task->dst.rect.w = UINT_MAX;
  236. task->src.rect.h = task->dst.rect.h = UINT_MAX;
  237. task->transform.rotation = DRM_MODE_ROTATE_0;
  238. DRM_DEV_DEBUG_DRIVER(task->dev, "Allocated task %pK\n", task);
  239. return task;
  240. }
  241. static const struct exynos_drm_param_map {
  242. unsigned int id;
  243. unsigned int size;
  244. unsigned int offset;
  245. } exynos_drm_ipp_params_maps[] = {
  246. {
  247. DRM_EXYNOS_IPP_TASK_BUFFER | DRM_EXYNOS_IPP_TASK_TYPE_SOURCE,
  248. sizeof(struct drm_exynos_ipp_task_buffer),
  249. offsetof(struct exynos_drm_ipp_task, src.buf),
  250. }, {
  251. DRM_EXYNOS_IPP_TASK_BUFFER |
  252. DRM_EXYNOS_IPP_TASK_TYPE_DESTINATION,
  253. sizeof(struct drm_exynos_ipp_task_buffer),
  254. offsetof(struct exynos_drm_ipp_task, dst.buf),
  255. }, {
  256. DRM_EXYNOS_IPP_TASK_RECTANGLE | DRM_EXYNOS_IPP_TASK_TYPE_SOURCE,
  257. sizeof(struct drm_exynos_ipp_task_rect),
  258. offsetof(struct exynos_drm_ipp_task, src.rect),
  259. }, {
  260. DRM_EXYNOS_IPP_TASK_RECTANGLE |
  261. DRM_EXYNOS_IPP_TASK_TYPE_DESTINATION,
  262. sizeof(struct drm_exynos_ipp_task_rect),
  263. offsetof(struct exynos_drm_ipp_task, dst.rect),
  264. }, {
  265. DRM_EXYNOS_IPP_TASK_TRANSFORM,
  266. sizeof(struct drm_exynos_ipp_task_transform),
  267. offsetof(struct exynos_drm_ipp_task, transform),
  268. }, {
  269. DRM_EXYNOS_IPP_TASK_ALPHA,
  270. sizeof(struct drm_exynos_ipp_task_alpha),
  271. offsetof(struct exynos_drm_ipp_task, alpha),
  272. },
  273. };
  274. static int exynos_drm_ipp_task_set(struct exynos_drm_ipp_task *task,
  275. struct drm_exynos_ioctl_ipp_commit *arg)
  276. {
  277. const struct exynos_drm_param_map *map = exynos_drm_ipp_params_maps;
  278. void __user *params = (void __user *)(unsigned long)arg->params_ptr;
  279. unsigned int size = arg->params_size;
  280. uint32_t id;
  281. int i;
  282. while (size) {
  283. if (get_user(id, (uint32_t __user *)params))
  284. return -EFAULT;
  285. for (i = 0; i < ARRAY_SIZE(exynos_drm_ipp_params_maps); i++)
  286. if (map[i].id == id)
  287. break;
  288. if (i == ARRAY_SIZE(exynos_drm_ipp_params_maps) ||
  289. map[i].size > size)
  290. return -EINVAL;
  291. if (copy_from_user((void *)task + map[i].offset, params,
  292. map[i].size))
  293. return -EFAULT;
  294. params += map[i].size;
  295. size -= map[i].size;
  296. }
  297. DRM_DEV_DEBUG_DRIVER(task->dev,
  298. "Got task %pK configuration from userspace\n",
  299. task);
  300. return 0;
  301. }
  302. static int exynos_drm_ipp_task_setup_buffer(struct exynos_drm_ipp_buffer *buf,
  303. struct drm_file *filp)
  304. {
  305. int ret = 0;
  306. int i;
  307. /* get GEM buffers and check their size */
  308. for (i = 0; i < buf->format->num_planes; i++) {
  309. unsigned int height = (i == 0) ? buf->buf.height :
  310. DIV_ROUND_UP(buf->buf.height, buf->format->vsub);
  311. unsigned long size = height * buf->buf.pitch[i];
  312. struct exynos_drm_gem *gem = exynos_drm_gem_get(filp,
  313. buf->buf.gem_id[i]);
  314. if (!gem) {
  315. ret = -ENOENT;
  316. goto gem_free;
  317. }
  318. buf->exynos_gem[i] = gem;
  319. if (size + buf->buf.offset[i] > buf->exynos_gem[i]->size) {
  320. i++;
  321. ret = -EINVAL;
  322. goto gem_free;
  323. }
  324. buf->dma_addr[i] = buf->exynos_gem[i]->dma_addr +
  325. buf->buf.offset[i];
  326. }
  327. return 0;
  328. gem_free:
  329. while (i--) {
  330. exynos_drm_gem_put(buf->exynos_gem[i]);
  331. buf->exynos_gem[i] = NULL;
  332. }
  333. return ret;
  334. }
  335. static void exynos_drm_ipp_task_release_buf(struct exynos_drm_ipp_buffer *buf)
  336. {
  337. int i;
  338. if (!buf->exynos_gem[0])
  339. return;
  340. for (i = 0; i < buf->format->num_planes; i++)
  341. exynos_drm_gem_put(buf->exynos_gem[i]);
  342. }
  343. static void exynos_drm_ipp_task_free(struct exynos_drm_ipp *ipp,
  344. struct exynos_drm_ipp_task *task)
  345. {
  346. DRM_DEV_DEBUG_DRIVER(task->dev, "Freeing task %pK\n", task);
  347. exynos_drm_ipp_task_release_buf(&task->src);
  348. exynos_drm_ipp_task_release_buf(&task->dst);
  349. if (task->event)
  350. drm_event_cancel_free(ipp->drm_dev, &task->event->base);
  351. kfree(task);
  352. }
  353. struct drm_ipp_limit {
  354. struct drm_exynos_ipp_limit_val h;
  355. struct drm_exynos_ipp_limit_val v;
  356. };
  357. enum drm_ipp_size_id {
  358. IPP_LIMIT_BUFFER, IPP_LIMIT_AREA, IPP_LIMIT_ROTATED, IPP_LIMIT_MAX
  359. };
  360. static const enum drm_exynos_ipp_limit_type limit_id_fallback[IPP_LIMIT_MAX][4] = {
  361. [IPP_LIMIT_BUFFER] = { DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER },
  362. [IPP_LIMIT_AREA] = { DRM_EXYNOS_IPP_LIMIT_SIZE_AREA,
  363. DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER },
  364. [IPP_LIMIT_ROTATED] = { DRM_EXYNOS_IPP_LIMIT_SIZE_ROTATED,
  365. DRM_EXYNOS_IPP_LIMIT_SIZE_AREA,
  366. DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER },
  367. };
  368. static inline void __limit_set_val(unsigned int *ptr, unsigned int val)
  369. {
  370. if (!*ptr)
  371. *ptr = val;
  372. }
  373. static void __get_size_limit(const struct drm_exynos_ipp_limit *limits,
  374. unsigned int num_limits, enum drm_ipp_size_id id,
  375. struct drm_ipp_limit *res)
  376. {
  377. const struct drm_exynos_ipp_limit *l = limits;
  378. int i = 0;
  379. memset(res, 0, sizeof(*res));
  380. for (i = 0; limit_id_fallback[id][i]; i++)
  381. for (l = limits; l - limits < num_limits; l++) {
  382. if (((l->type & DRM_EXYNOS_IPP_LIMIT_TYPE_MASK) !=
  383. DRM_EXYNOS_IPP_LIMIT_TYPE_SIZE) ||
  384. ((l->type & DRM_EXYNOS_IPP_LIMIT_SIZE_MASK) !=
  385. limit_id_fallback[id][i]))
  386. continue;
  387. __limit_set_val(&res->h.min, l->h.min);
  388. __limit_set_val(&res->h.max, l->h.max);
  389. __limit_set_val(&res->h.align, l->h.align);
  390. __limit_set_val(&res->v.min, l->v.min);
  391. __limit_set_val(&res->v.max, l->v.max);
  392. __limit_set_val(&res->v.align, l->v.align);
  393. }
  394. }
  395. static inline bool __align_check(unsigned int val, unsigned int align)
  396. {
  397. if (align && (val & (align - 1))) {
  398. DRM_DEBUG_DRIVER("Value %d exceeds HW limits (align %d)\n",
  399. val, align);
  400. return false;
  401. }
  402. return true;
  403. }
  404. static inline bool __size_limit_check(unsigned int val,
  405. struct drm_exynos_ipp_limit_val *l)
  406. {
  407. if ((l->min && val < l->min) || (l->max && val > l->max)) {
  408. DRM_DEBUG_DRIVER("Value %d exceeds HW limits (min %d, max %d)\n",
  409. val, l->min, l->max);
  410. return false;
  411. }
  412. return __align_check(val, l->align);
  413. }
  414. static int exynos_drm_ipp_check_size_limits(struct exynos_drm_ipp_buffer *buf,
  415. const struct drm_exynos_ipp_limit *limits, unsigned int num_limits,
  416. bool rotate, bool swap)
  417. {
  418. enum drm_ipp_size_id id = rotate ? IPP_LIMIT_ROTATED : IPP_LIMIT_AREA;
  419. struct drm_ipp_limit l;
  420. struct drm_exynos_ipp_limit_val *lh = &l.h, *lv = &l.v;
  421. int real_width = buf->buf.pitch[0] / buf->format->cpp[0];
  422. if (!limits)
  423. return 0;
  424. __get_size_limit(limits, num_limits, IPP_LIMIT_BUFFER, &l);
  425. if (!__size_limit_check(real_width, &l.h) ||
  426. !__size_limit_check(buf->buf.height, &l.v))
  427. return -EINVAL;
  428. if (swap) {
  429. lv = &l.h;
  430. lh = &l.v;
  431. }
  432. __get_size_limit(limits, num_limits, id, &l);
  433. if (!__size_limit_check(buf->rect.w, lh) ||
  434. !__align_check(buf->rect.x, lh->align) ||
  435. !__size_limit_check(buf->rect.h, lv) ||
  436. !__align_check(buf->rect.y, lv->align))
  437. return -EINVAL;
  438. return 0;
  439. }
  440. static inline bool __scale_limit_check(unsigned int src, unsigned int dst,
  441. unsigned int min, unsigned int max)
  442. {
  443. if ((max && (dst << 16) > src * max) ||
  444. (min && (dst << 16) < src * min)) {
  445. DRM_DEBUG_DRIVER("Scale from %d to %d exceeds HW limits (ratio min %d.%05d, max %d.%05d)\n",
  446. src, dst,
  447. min >> 16, 100000 * (min & 0xffff) / (1 << 16),
  448. max >> 16, 100000 * (max & 0xffff) / (1 << 16));
  449. return false;
  450. }
  451. return true;
  452. }
  453. static int exynos_drm_ipp_check_scale_limits(
  454. struct drm_exynos_ipp_task_rect *src,
  455. struct drm_exynos_ipp_task_rect *dst,
  456. const struct drm_exynos_ipp_limit *limits,
  457. unsigned int num_limits, bool swap)
  458. {
  459. const struct drm_exynos_ipp_limit_val *lh, *lv;
  460. int dw, dh;
  461. for (; num_limits; limits++, num_limits--)
  462. if ((limits->type & DRM_EXYNOS_IPP_LIMIT_TYPE_MASK) ==
  463. DRM_EXYNOS_IPP_LIMIT_TYPE_SCALE)
  464. break;
  465. if (!num_limits)
  466. return 0;
  467. lh = (!swap) ? &limits->h : &limits->v;
  468. lv = (!swap) ? &limits->v : &limits->h;
  469. dw = (!swap) ? dst->w : dst->h;
  470. dh = (!swap) ? dst->h : dst->w;
  471. if (!__scale_limit_check(src->w, dw, lh->min, lh->max) ||
  472. !__scale_limit_check(src->h, dh, lv->min, lv->max))
  473. return -EINVAL;
  474. return 0;
  475. }
  476. static int exynos_drm_ipp_check_format(struct exynos_drm_ipp_task *task,
  477. struct exynos_drm_ipp_buffer *buf,
  478. struct exynos_drm_ipp_buffer *src,
  479. struct exynos_drm_ipp_buffer *dst,
  480. bool rotate, bool swap)
  481. {
  482. const struct exynos_drm_ipp_formats *fmt;
  483. int ret, i;
  484. fmt = __ipp_format_get(task->ipp, buf->buf.fourcc, buf->buf.modifier,
  485. buf == src ? DRM_EXYNOS_IPP_FORMAT_SOURCE :
  486. DRM_EXYNOS_IPP_FORMAT_DESTINATION);
  487. if (!fmt) {
  488. DRM_DEV_DEBUG_DRIVER(task->dev,
  489. "Task %pK: %s format not supported\n",
  490. task, buf == src ? "src" : "dst");
  491. return -EINVAL;
  492. }
  493. /* basic checks */
  494. if (buf->buf.width == 0 || buf->buf.height == 0)
  495. return -EINVAL;
  496. buf->format = drm_format_info(buf->buf.fourcc);
  497. for (i = 0; i < buf->format->num_planes; i++) {
  498. unsigned int width = (i == 0) ? buf->buf.width :
  499. DIV_ROUND_UP(buf->buf.width, buf->format->hsub);
  500. if (buf->buf.pitch[i] == 0)
  501. buf->buf.pitch[i] = width * buf->format->cpp[i];
  502. if (buf->buf.pitch[i] < width * buf->format->cpp[i])
  503. return -EINVAL;
  504. if (!buf->buf.gem_id[i])
  505. return -ENOENT;
  506. }
  507. /* pitch for additional planes must match */
  508. if (buf->format->num_planes > 2 &&
  509. buf->buf.pitch[1] != buf->buf.pitch[2])
  510. return -EINVAL;
  511. /* check driver limits */
  512. ret = exynos_drm_ipp_check_size_limits(buf, fmt->limits,
  513. fmt->num_limits,
  514. rotate,
  515. buf == dst ? swap : false);
  516. if (ret)
  517. return ret;
  518. ret = exynos_drm_ipp_check_scale_limits(&src->rect, &dst->rect,
  519. fmt->limits,
  520. fmt->num_limits, swap);
  521. return ret;
  522. }
  523. static int exynos_drm_ipp_task_check(struct exynos_drm_ipp_task *task)
  524. {
  525. struct exynos_drm_ipp *ipp = task->ipp;
  526. struct exynos_drm_ipp_buffer *src = &task->src, *dst = &task->dst;
  527. unsigned int rotation = task->transform.rotation;
  528. int ret = 0;
  529. bool swap = drm_rotation_90_or_270(rotation);
  530. bool rotate = (rotation != DRM_MODE_ROTATE_0);
  531. bool scale = false;
  532. DRM_DEV_DEBUG_DRIVER(task->dev, "Checking task %pK\n", task);
  533. if (src->rect.w == UINT_MAX)
  534. src->rect.w = src->buf.width;
  535. if (src->rect.h == UINT_MAX)
  536. src->rect.h = src->buf.height;
  537. if (dst->rect.w == UINT_MAX)
  538. dst->rect.w = dst->buf.width;
  539. if (dst->rect.h == UINT_MAX)
  540. dst->rect.h = dst->buf.height;
  541. if (src->rect.x + src->rect.w > (src->buf.width) ||
  542. src->rect.y + src->rect.h > (src->buf.height) ||
  543. dst->rect.x + dst->rect.w > (dst->buf.width) ||
  544. dst->rect.y + dst->rect.h > (dst->buf.height)) {
  545. DRM_DEV_DEBUG_DRIVER(task->dev,
  546. "Task %pK: defined area is outside provided buffers\n",
  547. task);
  548. return -EINVAL;
  549. }
  550. if ((!swap && (src->rect.w != dst->rect.w ||
  551. src->rect.h != dst->rect.h)) ||
  552. (swap && (src->rect.w != dst->rect.h ||
  553. src->rect.h != dst->rect.w)))
  554. scale = true;
  555. if ((!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_CROP) &&
  556. (src->rect.x || src->rect.y || dst->rect.x || dst->rect.y)) ||
  557. (!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_ROTATE) && rotate) ||
  558. (!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_SCALE) && scale) ||
  559. (!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_CONVERT) &&
  560. src->buf.fourcc != dst->buf.fourcc)) {
  561. DRM_DEV_DEBUG_DRIVER(task->dev, "Task %pK: hw capabilities exceeded\n",
  562. task);
  563. return -EINVAL;
  564. }
  565. ret = exynos_drm_ipp_check_format(task, src, src, dst, rotate, swap);
  566. if (ret)
  567. return ret;
  568. ret = exynos_drm_ipp_check_format(task, dst, src, dst, false, swap);
  569. if (ret)
  570. return ret;
  571. DRM_DEV_DEBUG_DRIVER(ipp->dev, "Task %pK: all checks done.\n",
  572. task);
  573. return ret;
  574. }
  575. static int exynos_drm_ipp_task_setup_buffers(struct exynos_drm_ipp_task *task,
  576. struct drm_file *filp)
  577. {
  578. struct exynos_drm_ipp_buffer *src = &task->src, *dst = &task->dst;
  579. int ret = 0;
  580. DRM_DEV_DEBUG_DRIVER(task->dev, "Setting buffer for task %pK\n",
  581. task);
  582. ret = exynos_drm_ipp_task_setup_buffer(src, filp);
  583. if (ret) {
  584. DRM_DEV_DEBUG_DRIVER(task->dev,
  585. "Task %pK: src buffer setup failed\n",
  586. task);
  587. return ret;
  588. }
  589. ret = exynos_drm_ipp_task_setup_buffer(dst, filp);
  590. if (ret) {
  591. DRM_DEV_DEBUG_DRIVER(task->dev,
  592. "Task %pK: dst buffer setup failed\n",
  593. task);
  594. return ret;
  595. }
  596. DRM_DEV_DEBUG_DRIVER(task->dev, "Task %pK: buffers prepared.\n",
  597. task);
  598. return ret;
  599. }
  600. static int exynos_drm_ipp_event_create(struct exynos_drm_ipp_task *task,
  601. struct drm_file *file_priv, uint64_t user_data)
  602. {
  603. struct drm_pending_exynos_ipp_event *e = NULL;
  604. int ret;
  605. e = kzalloc(sizeof(*e), GFP_KERNEL);
  606. if (!e)
  607. return -ENOMEM;
  608. e->event.base.type = DRM_EXYNOS_IPP_EVENT;
  609. e->event.base.length = sizeof(e->event);
  610. e->event.user_data = user_data;
  611. ret = drm_event_reserve_init(task->ipp->drm_dev, file_priv, &e->base,
  612. &e->event.base);
  613. if (ret)
  614. goto free;
  615. task->event = e;
  616. return 0;
  617. free:
  618. kfree(e);
  619. return ret;
  620. }
  621. static void exynos_drm_ipp_event_send(struct exynos_drm_ipp_task *task)
  622. {
  623. struct timespec64 now;
  624. ktime_get_ts64(&now);
  625. task->event->event.tv_sec = now.tv_sec;
  626. task->event->event.tv_usec = now.tv_nsec / NSEC_PER_USEC;
  627. task->event->event.sequence = atomic_inc_return(&task->ipp->sequence);
  628. drm_send_event(task->ipp->drm_dev, &task->event->base);
  629. }
  630. static int exynos_drm_ipp_task_cleanup(struct exynos_drm_ipp_task *task)
  631. {
  632. int ret = task->ret;
  633. if (ret == 0 && task->event) {
  634. exynos_drm_ipp_event_send(task);
  635. /* ensure event won't be canceled on task free */
  636. task->event = NULL;
  637. }
  638. exynos_drm_ipp_task_free(task->ipp, task);
  639. return ret;
  640. }
  641. static void exynos_drm_ipp_cleanup_work(struct work_struct *work)
  642. {
  643. struct exynos_drm_ipp_task *task = container_of(work,
  644. struct exynos_drm_ipp_task, cleanup_work);
  645. exynos_drm_ipp_task_cleanup(task);
  646. }
  647. static void exynos_drm_ipp_next_task(struct exynos_drm_ipp *ipp);
  648. /**
  649. * exynos_drm_ipp_task_done - finish given task and set return code
  650. * @task: ipp task to finish
  651. * @ret: error code or 0 if operation has been performed successfully
  652. */
  653. void exynos_drm_ipp_task_done(struct exynos_drm_ipp_task *task, int ret)
  654. {
  655. struct exynos_drm_ipp *ipp = task->ipp;
  656. unsigned long flags;
  657. DRM_DEV_DEBUG_DRIVER(task->dev, "ipp: %d, task %pK done: %d\n",
  658. ipp->id, task, ret);
  659. spin_lock_irqsave(&ipp->lock, flags);
  660. if (ipp->task == task)
  661. ipp->task = NULL;
  662. task->flags |= DRM_EXYNOS_IPP_TASK_DONE;
  663. task->ret = ret;
  664. spin_unlock_irqrestore(&ipp->lock, flags);
  665. exynos_drm_ipp_next_task(ipp);
  666. wake_up(&ipp->done_wq);
  667. if (task->flags & DRM_EXYNOS_IPP_TASK_ASYNC) {
  668. INIT_WORK(&task->cleanup_work, exynos_drm_ipp_cleanup_work);
  669. schedule_work(&task->cleanup_work);
  670. }
  671. }
  672. static void exynos_drm_ipp_next_task(struct exynos_drm_ipp *ipp)
  673. {
  674. struct exynos_drm_ipp_task *task;
  675. unsigned long flags;
  676. int ret;
  677. DRM_DEV_DEBUG_DRIVER(ipp->dev, "ipp: %d, try to run new task\n",
  678. ipp->id);
  679. spin_lock_irqsave(&ipp->lock, flags);
  680. if (ipp->task || list_empty(&ipp->todo_list)) {
  681. spin_unlock_irqrestore(&ipp->lock, flags);
  682. return;
  683. }
  684. task = list_first_entry(&ipp->todo_list, struct exynos_drm_ipp_task,
  685. head);
  686. list_del_init(&task->head);
  687. ipp->task = task;
  688. spin_unlock_irqrestore(&ipp->lock, flags);
  689. DRM_DEV_DEBUG_DRIVER(ipp->dev,
  690. "ipp: %d, selected task %pK to run\n", ipp->id,
  691. task);
  692. ret = ipp->funcs->commit(ipp, task);
  693. if (ret)
  694. exynos_drm_ipp_task_done(task, ret);
  695. }
  696. static void exynos_drm_ipp_schedule_task(struct exynos_drm_ipp *ipp,
  697. struct exynos_drm_ipp_task *task)
  698. {
  699. unsigned long flags;
  700. spin_lock_irqsave(&ipp->lock, flags);
  701. list_add(&task->head, &ipp->todo_list);
  702. spin_unlock_irqrestore(&ipp->lock, flags);
  703. exynos_drm_ipp_next_task(ipp);
  704. }
  705. static void exynos_drm_ipp_task_abort(struct exynos_drm_ipp *ipp,
  706. struct exynos_drm_ipp_task *task)
  707. {
  708. unsigned long flags;
  709. spin_lock_irqsave(&ipp->lock, flags);
  710. if (task->flags & DRM_EXYNOS_IPP_TASK_DONE) {
  711. /* already completed task */
  712. exynos_drm_ipp_task_cleanup(task);
  713. } else if (ipp->task != task) {
  714. /* task has not been scheduled for execution yet */
  715. list_del_init(&task->head);
  716. exynos_drm_ipp_task_cleanup(task);
  717. } else {
  718. /*
  719. * currently processed task, call abort() and perform
  720. * cleanup with async worker
  721. */
  722. task->flags |= DRM_EXYNOS_IPP_TASK_ASYNC;
  723. spin_unlock_irqrestore(&ipp->lock, flags);
  724. if (ipp->funcs->abort)
  725. ipp->funcs->abort(ipp, task);
  726. return;
  727. }
  728. spin_unlock_irqrestore(&ipp->lock, flags);
  729. }
  730. /**
  731. * exynos_drm_ipp_commit_ioctl - perform image processing operation
  732. * @dev: DRM device
  733. * @data: ioctl data
  734. * @file_priv: DRM file info
  735. *
  736. * Construct a ipp task from the set of properties provided from the user
  737. * and try to schedule it to framebuffer processor hardware.
  738. *
  739. * Called by the user via ioctl.
  740. *
  741. * Returns:
  742. * Zero on success, negative errno on failure.
  743. */
  744. int exynos_drm_ipp_commit_ioctl(struct drm_device *dev, void *data,
  745. struct drm_file *file_priv)
  746. {
  747. struct drm_exynos_ioctl_ipp_commit *arg = data;
  748. struct exynos_drm_ipp *ipp;
  749. struct exynos_drm_ipp_task *task;
  750. int ret = 0;
  751. if ((arg->flags & ~DRM_EXYNOS_IPP_FLAGS) || arg->reserved)
  752. return -EINVAL;
  753. /* can't test and expect an event at the same time */
  754. if ((arg->flags & DRM_EXYNOS_IPP_FLAG_TEST_ONLY) &&
  755. (arg->flags & DRM_EXYNOS_IPP_FLAG_EVENT))
  756. return -EINVAL;
  757. ipp = __ipp_get(arg->ipp_id);
  758. if (!ipp)
  759. return -ENOENT;
  760. task = exynos_drm_ipp_task_alloc(ipp);
  761. if (!task)
  762. return -ENOMEM;
  763. ret = exynos_drm_ipp_task_set(task, arg);
  764. if (ret)
  765. goto free;
  766. ret = exynos_drm_ipp_task_check(task);
  767. if (ret)
  768. goto free;
  769. ret = exynos_drm_ipp_task_setup_buffers(task, file_priv);
  770. if (ret || arg->flags & DRM_EXYNOS_IPP_FLAG_TEST_ONLY)
  771. goto free;
  772. if (arg->flags & DRM_EXYNOS_IPP_FLAG_EVENT) {
  773. ret = exynos_drm_ipp_event_create(task, file_priv,
  774. arg->user_data);
  775. if (ret)
  776. goto free;
  777. }
  778. /*
  779. * Queue task for processing on the hardware. task object will be
  780. * then freed after exynos_drm_ipp_task_done()
  781. */
  782. if (arg->flags & DRM_EXYNOS_IPP_FLAG_NONBLOCK) {
  783. DRM_DEV_DEBUG_DRIVER(ipp->dev,
  784. "ipp: %d, nonblocking processing task %pK\n",
  785. ipp->id, task);
  786. task->flags |= DRM_EXYNOS_IPP_TASK_ASYNC;
  787. exynos_drm_ipp_schedule_task(task->ipp, task);
  788. ret = 0;
  789. } else {
  790. DRM_DEV_DEBUG_DRIVER(ipp->dev, "ipp: %d, processing task %pK\n",
  791. ipp->id, task);
  792. exynos_drm_ipp_schedule_task(ipp, task);
  793. ret = wait_event_interruptible(ipp->done_wq,
  794. task->flags & DRM_EXYNOS_IPP_TASK_DONE);
  795. if (ret)
  796. exynos_drm_ipp_task_abort(ipp, task);
  797. else
  798. ret = exynos_drm_ipp_task_cleanup(task);
  799. }
  800. return ret;
  801. free:
  802. exynos_drm_ipp_task_free(ipp, task);
  803. return ret;
  804. }