exynos_drm_drv.h 7.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /* exynos_drm_drv.h
  3. *
  4. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  5. * Authors:
  6. * Inki Dae <inki.dae@samsung.com>
  7. * Joonyoung Shim <jy0922.shim@samsung.com>
  8. * Seung-Woo Kim <sw0312.kim@samsung.com>
  9. */
  10. #ifndef _EXYNOS_DRM_DRV_H_
  11. #define _EXYNOS_DRM_DRV_H_
  12. #include <linux/module.h>
  13. #include <drm/drm_crtc.h>
  14. #include <drm/drm_device.h>
  15. #include <drm/drm_plane.h>
  16. #define MAX_CRTC 3
  17. #define MAX_PLANE 5
  18. #define MAX_FB_BUFFER 4
  19. #define DEFAULT_WIN 0
  20. struct drm_crtc_state;
  21. struct drm_display_mode;
  22. #define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc, base)
  23. #define to_exynos_plane(x) container_of(x, struct exynos_drm_plane, base)
  24. /* this enumerates display type. */
  25. enum exynos_drm_output_type {
  26. EXYNOS_DISPLAY_TYPE_NONE,
  27. /* RGB or CPU Interface. */
  28. EXYNOS_DISPLAY_TYPE_LCD,
  29. /* HDMI Interface. */
  30. EXYNOS_DISPLAY_TYPE_HDMI,
  31. /* Virtual Display Interface. */
  32. EXYNOS_DISPLAY_TYPE_VIDI,
  33. };
  34. struct exynos_drm_rect {
  35. unsigned int x, y;
  36. unsigned int w, h;
  37. };
  38. /*
  39. * Exynos drm plane state structure.
  40. *
  41. * @base: plane_state object (contains drm_framebuffer pointer)
  42. * @src: rectangle of the source image data to be displayed (clipped to
  43. * visible part).
  44. * @crtc: rectangle of the target image position on hardware screen
  45. * (clipped to visible part).
  46. * @h_ratio: horizontal scaling ratio, 16.16 fixed point
  47. * @v_ratio: vertical scaling ratio, 16.16 fixed point
  48. *
  49. * this structure consists plane state data that will be applied to hardware
  50. * specific overlay info.
  51. */
  52. struct exynos_drm_plane_state {
  53. struct drm_plane_state base;
  54. struct exynos_drm_rect crtc;
  55. struct exynos_drm_rect src;
  56. unsigned int h_ratio;
  57. unsigned int v_ratio;
  58. };
  59. static inline struct exynos_drm_plane_state *
  60. to_exynos_plane_state(struct drm_plane_state *state)
  61. {
  62. return container_of(state, struct exynos_drm_plane_state, base);
  63. }
  64. /*
  65. * Exynos drm common overlay structure.
  66. *
  67. * @base: plane object
  68. * @index: hardware index of the overlay layer
  69. *
  70. * this structure is common to exynos SoC and its contents would be copied
  71. * to hardware specific overlay info.
  72. */
  73. struct exynos_drm_plane {
  74. struct drm_plane base;
  75. const struct exynos_drm_plane_config *config;
  76. unsigned int index;
  77. };
  78. #define EXYNOS_DRM_PLANE_CAP_DOUBLE (1 << 0)
  79. #define EXYNOS_DRM_PLANE_CAP_SCALE (1 << 1)
  80. #define EXYNOS_DRM_PLANE_CAP_ZPOS (1 << 2)
  81. #define EXYNOS_DRM_PLANE_CAP_TILE (1 << 3)
  82. #define EXYNOS_DRM_PLANE_CAP_PIX_BLEND (1 << 4)
  83. #define EXYNOS_DRM_PLANE_CAP_WIN_BLEND (1 << 5)
  84. /*
  85. * Exynos DRM plane configuration structure.
  86. *
  87. * @zpos: initial z-position of the plane.
  88. * @type: type of the plane (primary, cursor or overlay).
  89. * @pixel_formats: supported pixel formats.
  90. * @num_pixel_formats: number of elements in 'pixel_formats'.
  91. * @capabilities: supported features (see EXYNOS_DRM_PLANE_CAP_*)
  92. */
  93. struct exynos_drm_plane_config {
  94. unsigned int zpos;
  95. enum drm_plane_type type;
  96. const uint32_t *pixel_formats;
  97. unsigned int num_pixel_formats;
  98. unsigned int capabilities;
  99. };
  100. /*
  101. * Exynos drm crtc ops
  102. *
  103. * @atomic_enable: enable the device
  104. * @atomic_disable: disable the device
  105. * @enable_vblank: specific driver callback for enabling vblank interrupt.
  106. * @disable_vblank: specific driver callback for disabling vblank interrupt.
  107. * @mode_valid: specific driver callback for mode validation
  108. * @atomic_check: validate state
  109. * @atomic_begin: prepare device to receive an update
  110. * @atomic_flush: mark the end of device update
  111. * @update_plane: apply hardware specific overlay data to registers.
  112. * @disable_plane: disable hardware specific overlay.
  113. * @te_handler: trigger to transfer video image at the tearing effect
  114. * synchronization signal if there is a page flip request.
  115. */
  116. struct exynos_drm_crtc;
  117. struct exynos_drm_crtc_ops {
  118. void (*atomic_enable)(struct exynos_drm_crtc *crtc);
  119. void (*atomic_disable)(struct exynos_drm_crtc *crtc);
  120. int (*enable_vblank)(struct exynos_drm_crtc *crtc);
  121. void (*disable_vblank)(struct exynos_drm_crtc *crtc);
  122. enum drm_mode_status (*mode_valid)(struct exynos_drm_crtc *crtc,
  123. const struct drm_display_mode *mode);
  124. bool (*mode_fixup)(struct exynos_drm_crtc *crtc,
  125. const struct drm_display_mode *mode,
  126. struct drm_display_mode *adjusted_mode);
  127. int (*atomic_check)(struct exynos_drm_crtc *crtc,
  128. struct drm_crtc_state *state);
  129. void (*atomic_begin)(struct exynos_drm_crtc *crtc);
  130. void (*update_plane)(struct exynos_drm_crtc *crtc,
  131. struct exynos_drm_plane *plane);
  132. void (*disable_plane)(struct exynos_drm_crtc *crtc,
  133. struct exynos_drm_plane *plane);
  134. void (*atomic_flush)(struct exynos_drm_crtc *crtc);
  135. void (*te_handler)(struct exynos_drm_crtc *crtc);
  136. };
  137. struct exynos_drm_clk {
  138. void (*enable)(struct exynos_drm_clk *clk, bool enable);
  139. };
  140. /*
  141. * Exynos specific crtc structure.
  142. *
  143. * @base: crtc object.
  144. * @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI.
  145. * @ops: pointer to callbacks for exynos drm specific functionality
  146. * @ctx: A pointer to the crtc's implementation specific context
  147. * @pipe_clk: A pointer to the crtc's pipeline clock.
  148. */
  149. struct exynos_drm_crtc {
  150. struct drm_crtc base;
  151. enum exynos_drm_output_type type;
  152. const struct exynos_drm_crtc_ops *ops;
  153. void *ctx;
  154. struct exynos_drm_clk *pipe_clk;
  155. bool i80_mode : 1;
  156. };
  157. static inline void exynos_drm_pipe_clk_enable(struct exynos_drm_crtc *crtc,
  158. bool enable)
  159. {
  160. if (crtc->pipe_clk)
  161. crtc->pipe_clk->enable(crtc->pipe_clk, enable);
  162. }
  163. struct drm_exynos_file_private {
  164. /* for g2d api */
  165. struct list_head inuse_cmdlist;
  166. struct list_head event_list;
  167. struct list_head userptr_list;
  168. };
  169. /*
  170. * Exynos drm private structure.
  171. *
  172. * @pending: the crtcs that have pending updates to finish
  173. * @lock: protect access to @pending
  174. * @wait: wait an atomic commit to finish
  175. */
  176. struct exynos_drm_private {
  177. struct drm_fb_helper *fb_helper;
  178. struct device *g2d_dev;
  179. struct device *dma_dev;
  180. void *mapping;
  181. /* for atomic commit */
  182. u32 pending;
  183. spinlock_t lock;
  184. wait_queue_head_t wait;
  185. };
  186. static inline struct device *to_dma_dev(struct drm_device *dev)
  187. {
  188. struct exynos_drm_private *priv = dev->dev_private;
  189. return priv->dma_dev;
  190. }
  191. static inline bool is_drm_iommu_supported(struct drm_device *drm_dev)
  192. {
  193. struct exynos_drm_private *priv = drm_dev->dev_private;
  194. return priv->mapping ? true : false;
  195. }
  196. int exynos_drm_register_dma(struct drm_device *drm, struct device *dev,
  197. void **dma_priv);
  198. void exynos_drm_unregister_dma(struct drm_device *drm, struct device *dev,
  199. void **dma_priv);
  200. void exynos_drm_cleanup_dma(struct drm_device *drm);
  201. #ifdef CONFIG_DRM_EXYNOS_DPI
  202. struct drm_encoder *exynos_dpi_probe(struct device *dev);
  203. int exynos_dpi_remove(struct drm_encoder *encoder);
  204. int exynos_dpi_bind(struct drm_device *dev, struct drm_encoder *encoder);
  205. #else
  206. static inline struct drm_encoder *
  207. exynos_dpi_probe(struct device *dev) { return NULL; }
  208. static inline int exynos_dpi_remove(struct drm_encoder *encoder)
  209. {
  210. return 0;
  211. }
  212. static inline int exynos_dpi_bind(struct drm_device *dev,
  213. struct drm_encoder *encoder)
  214. {
  215. return 0;
  216. }
  217. #endif
  218. #ifdef CONFIG_DRM_EXYNOS_FIMC
  219. int exynos_drm_check_fimc_device(struct device *dev);
  220. #else
  221. static inline int exynos_drm_check_fimc_device(struct device *dev)
  222. {
  223. return 0;
  224. }
  225. #endif
  226. int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state,
  227. bool nonblock);
  228. extern struct platform_driver fimd_driver;
  229. extern struct platform_driver exynos5433_decon_driver;
  230. extern struct platform_driver decon_driver;
  231. extern struct platform_driver dp_driver;
  232. extern struct platform_driver dsi_driver;
  233. extern struct platform_driver mixer_driver;
  234. extern struct platform_driver hdmi_driver;
  235. extern struct platform_driver vidi_driver;
  236. extern struct platform_driver g2d_driver;
  237. extern struct platform_driver fimc_driver;
  238. extern struct platform_driver rotator_driver;
  239. extern struct platform_driver scaler_driver;
  240. extern struct platform_driver gsc_driver;
  241. extern struct platform_driver mic_driver;
  242. #endif