cdns-mhdp8546-core.c 64 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Cadence MHDP8546 DP bridge driver.
  4. *
  5. * Copyright (C) 2020 Cadence Design Systems, Inc.
  6. *
  7. * Authors: Quentin Schulz <quentin.schulz@free-electrons.com>
  8. * Swapnil Jakhade <sjakhade@cadence.com>
  9. * Yuti Amonkar <yamonkar@cadence.com>
  10. * Tomi Valkeinen <tomi.valkeinen@ti.com>
  11. * Jyri Sarha <jsarha@ti.com>
  12. *
  13. * TODO:
  14. * - Implement optimized mailbox communication using mailbox interrupts
  15. * - Add support for power management
  16. * - Add support for features like audio, MST and fast link training
  17. * - Implement request_fw_cancel to handle HW_STATE
  18. * - Fix asynchronous loading of firmware implementation
  19. * - Add DRM helper function for cdns_mhdp_lower_link_rate
  20. */
  21. #include <linux/clk.h>
  22. #include <linux/delay.h>
  23. #include <linux/err.h>
  24. #include <linux/firmware.h>
  25. #include <linux/io.h>
  26. #include <linux/iopoll.h>
  27. #include <linux/irq.h>
  28. #include <linux/module.h>
  29. #include <linux/of.h>
  30. #include <linux/of_device.h>
  31. #include <linux/phy/phy.h>
  32. #include <linux/phy/phy-dp.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/slab.h>
  35. #include <linux/wait.h>
  36. #include <drm/drm_atomic.h>
  37. #include <drm/drm_atomic_helper.h>
  38. #include <drm/drm_atomic_state_helper.h>
  39. #include <drm/drm_bridge.h>
  40. #include <drm/drm_connector.h>
  41. #include <drm/drm_crtc_helper.h>
  42. #include <drm/drm_dp_helper.h>
  43. #include <drm/drm_modeset_helper_vtables.h>
  44. #include <drm/drm_print.h>
  45. #include <drm/drm_probe_helper.h>
  46. #include <asm/unaligned.h>
  47. #include "cdns-mhdp8546-core.h"
  48. #include "cdns-mhdp8546-j721e.h"
  49. static int cdns_mhdp_mailbox_read(struct cdns_mhdp_device *mhdp)
  50. {
  51. int ret, empty;
  52. WARN_ON(!mutex_is_locked(&mhdp->mbox_mutex));
  53. ret = readx_poll_timeout(readl, mhdp->regs + CDNS_MAILBOX_EMPTY,
  54. empty, !empty, MAILBOX_RETRY_US,
  55. MAILBOX_TIMEOUT_US);
  56. if (ret < 0)
  57. return ret;
  58. return readl(mhdp->regs + CDNS_MAILBOX_RX_DATA) & 0xff;
  59. }
  60. static int cdns_mhdp_mailbox_write(struct cdns_mhdp_device *mhdp, u8 val)
  61. {
  62. int ret, full;
  63. WARN_ON(!mutex_is_locked(&mhdp->mbox_mutex));
  64. ret = readx_poll_timeout(readl, mhdp->regs + CDNS_MAILBOX_FULL,
  65. full, !full, MAILBOX_RETRY_US,
  66. MAILBOX_TIMEOUT_US);
  67. if (ret < 0)
  68. return ret;
  69. writel(val, mhdp->regs + CDNS_MAILBOX_TX_DATA);
  70. return 0;
  71. }
  72. static int cdns_mhdp_mailbox_recv_header(struct cdns_mhdp_device *mhdp,
  73. u8 module_id, u8 opcode,
  74. u16 req_size)
  75. {
  76. u32 mbox_size, i;
  77. u8 header[4];
  78. int ret;
  79. /* read the header of the message */
  80. for (i = 0; i < sizeof(header); i++) {
  81. ret = cdns_mhdp_mailbox_read(mhdp);
  82. if (ret < 0)
  83. return ret;
  84. header[i] = ret;
  85. }
  86. mbox_size = get_unaligned_be16(header + 2);
  87. if (opcode != header[0] || module_id != header[1] ||
  88. req_size != mbox_size) {
  89. /*
  90. * If the message in mailbox is not what we want, we need to
  91. * clear the mailbox by reading its contents.
  92. */
  93. for (i = 0; i < mbox_size; i++)
  94. if (cdns_mhdp_mailbox_read(mhdp) < 0)
  95. break;
  96. return -EINVAL;
  97. }
  98. return 0;
  99. }
  100. static int cdns_mhdp_mailbox_recv_data(struct cdns_mhdp_device *mhdp,
  101. u8 *buff, u16 buff_size)
  102. {
  103. u32 i;
  104. int ret;
  105. for (i = 0; i < buff_size; i++) {
  106. ret = cdns_mhdp_mailbox_read(mhdp);
  107. if (ret < 0)
  108. return ret;
  109. buff[i] = ret;
  110. }
  111. return 0;
  112. }
  113. static int cdns_mhdp_mailbox_send(struct cdns_mhdp_device *mhdp, u8 module_id,
  114. u8 opcode, u16 size, u8 *message)
  115. {
  116. u8 header[4];
  117. int ret, i;
  118. header[0] = opcode;
  119. header[1] = module_id;
  120. put_unaligned_be16(size, header + 2);
  121. for (i = 0; i < sizeof(header); i++) {
  122. ret = cdns_mhdp_mailbox_write(mhdp, header[i]);
  123. if (ret)
  124. return ret;
  125. }
  126. for (i = 0; i < size; i++) {
  127. ret = cdns_mhdp_mailbox_write(mhdp, message[i]);
  128. if (ret)
  129. return ret;
  130. }
  131. return 0;
  132. }
  133. static
  134. int cdns_mhdp_reg_read(struct cdns_mhdp_device *mhdp, u32 addr, u32 *value)
  135. {
  136. u8 msg[4], resp[8];
  137. int ret;
  138. put_unaligned_be32(addr, msg);
  139. mutex_lock(&mhdp->mbox_mutex);
  140. ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_GENERAL,
  141. GENERAL_REGISTER_READ,
  142. sizeof(msg), msg);
  143. if (ret)
  144. goto out;
  145. ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_GENERAL,
  146. GENERAL_REGISTER_READ,
  147. sizeof(resp));
  148. if (ret)
  149. goto out;
  150. ret = cdns_mhdp_mailbox_recv_data(mhdp, resp, sizeof(resp));
  151. if (ret)
  152. goto out;
  153. /* Returned address value should be the same as requested */
  154. if (memcmp(msg, resp, sizeof(msg))) {
  155. ret = -EINVAL;
  156. goto out;
  157. }
  158. *value = get_unaligned_be32(resp + 4);
  159. out:
  160. mutex_unlock(&mhdp->mbox_mutex);
  161. if (ret) {
  162. dev_err(mhdp->dev, "Failed to read register\n");
  163. *value = 0;
  164. }
  165. return ret;
  166. }
  167. static
  168. int cdns_mhdp_reg_write(struct cdns_mhdp_device *mhdp, u16 addr, u32 val)
  169. {
  170. u8 msg[6];
  171. int ret;
  172. put_unaligned_be16(addr, msg);
  173. put_unaligned_be32(val, msg + 2);
  174. mutex_lock(&mhdp->mbox_mutex);
  175. ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
  176. DPTX_WRITE_REGISTER, sizeof(msg), msg);
  177. mutex_unlock(&mhdp->mbox_mutex);
  178. return ret;
  179. }
  180. static
  181. int cdns_mhdp_reg_write_bit(struct cdns_mhdp_device *mhdp, u16 addr,
  182. u8 start_bit, u8 bits_no, u32 val)
  183. {
  184. u8 field[8];
  185. int ret;
  186. put_unaligned_be16(addr, field);
  187. field[2] = start_bit;
  188. field[3] = bits_no;
  189. put_unaligned_be32(val, field + 4);
  190. mutex_lock(&mhdp->mbox_mutex);
  191. ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
  192. DPTX_WRITE_FIELD, sizeof(field), field);
  193. mutex_unlock(&mhdp->mbox_mutex);
  194. return ret;
  195. }
  196. static
  197. int cdns_mhdp_dpcd_read(struct cdns_mhdp_device *mhdp,
  198. u32 addr, u8 *data, u16 len)
  199. {
  200. u8 msg[5], reg[5];
  201. int ret;
  202. put_unaligned_be16(len, msg);
  203. put_unaligned_be24(addr, msg + 2);
  204. mutex_lock(&mhdp->mbox_mutex);
  205. ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
  206. DPTX_READ_DPCD, sizeof(msg), msg);
  207. if (ret)
  208. goto out;
  209. ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX,
  210. DPTX_READ_DPCD,
  211. sizeof(reg) + len);
  212. if (ret)
  213. goto out;
  214. ret = cdns_mhdp_mailbox_recv_data(mhdp, reg, sizeof(reg));
  215. if (ret)
  216. goto out;
  217. ret = cdns_mhdp_mailbox_recv_data(mhdp, data, len);
  218. out:
  219. mutex_unlock(&mhdp->mbox_mutex);
  220. return ret;
  221. }
  222. static
  223. int cdns_mhdp_dpcd_write(struct cdns_mhdp_device *mhdp, u32 addr, u8 value)
  224. {
  225. u8 msg[6], reg[5];
  226. int ret;
  227. put_unaligned_be16(1, msg);
  228. put_unaligned_be24(addr, msg + 2);
  229. msg[5] = value;
  230. mutex_lock(&mhdp->mbox_mutex);
  231. ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
  232. DPTX_WRITE_DPCD, sizeof(msg), msg);
  233. if (ret)
  234. goto out;
  235. ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX,
  236. DPTX_WRITE_DPCD, sizeof(reg));
  237. if (ret)
  238. goto out;
  239. ret = cdns_mhdp_mailbox_recv_data(mhdp, reg, sizeof(reg));
  240. if (ret)
  241. goto out;
  242. if (addr != get_unaligned_be24(reg + 2))
  243. ret = -EINVAL;
  244. out:
  245. mutex_unlock(&mhdp->mbox_mutex);
  246. if (ret)
  247. dev_err(mhdp->dev, "dpcd write failed: %d\n", ret);
  248. return ret;
  249. }
  250. static
  251. int cdns_mhdp_set_firmware_active(struct cdns_mhdp_device *mhdp, bool enable)
  252. {
  253. u8 msg[5];
  254. int ret, i;
  255. msg[0] = GENERAL_MAIN_CONTROL;
  256. msg[1] = MB_MODULE_ID_GENERAL;
  257. msg[2] = 0;
  258. msg[3] = 1;
  259. msg[4] = enable ? FW_ACTIVE : FW_STANDBY;
  260. mutex_lock(&mhdp->mbox_mutex);
  261. for (i = 0; i < sizeof(msg); i++) {
  262. ret = cdns_mhdp_mailbox_write(mhdp, msg[i]);
  263. if (ret)
  264. goto out;
  265. }
  266. /* read the firmware state */
  267. ret = cdns_mhdp_mailbox_recv_data(mhdp, msg, sizeof(msg));
  268. if (ret)
  269. goto out;
  270. ret = 0;
  271. out:
  272. mutex_unlock(&mhdp->mbox_mutex);
  273. if (ret < 0)
  274. dev_err(mhdp->dev, "set firmware active failed\n");
  275. return ret;
  276. }
  277. static
  278. int cdns_mhdp_get_hpd_status(struct cdns_mhdp_device *mhdp)
  279. {
  280. u8 status;
  281. int ret;
  282. mutex_lock(&mhdp->mbox_mutex);
  283. ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
  284. DPTX_HPD_STATE, 0, NULL);
  285. if (ret)
  286. goto err_get_hpd;
  287. ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX,
  288. DPTX_HPD_STATE,
  289. sizeof(status));
  290. if (ret)
  291. goto err_get_hpd;
  292. ret = cdns_mhdp_mailbox_recv_data(mhdp, &status, sizeof(status));
  293. if (ret)
  294. goto err_get_hpd;
  295. mutex_unlock(&mhdp->mbox_mutex);
  296. dev_dbg(mhdp->dev, "%s: HPD %splugged\n", __func__,
  297. status ? "" : "un");
  298. return status;
  299. err_get_hpd:
  300. mutex_unlock(&mhdp->mbox_mutex);
  301. return ret;
  302. }
  303. static
  304. int cdns_mhdp_get_edid_block(void *data, u8 *edid,
  305. unsigned int block, size_t length)
  306. {
  307. struct cdns_mhdp_device *mhdp = data;
  308. u8 msg[2], reg[2], i;
  309. int ret;
  310. mutex_lock(&mhdp->mbox_mutex);
  311. for (i = 0; i < 4; i++) {
  312. msg[0] = block / 2;
  313. msg[1] = block % 2;
  314. ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
  315. DPTX_GET_EDID, sizeof(msg), msg);
  316. if (ret)
  317. continue;
  318. ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX,
  319. DPTX_GET_EDID,
  320. sizeof(reg) + length);
  321. if (ret)
  322. continue;
  323. ret = cdns_mhdp_mailbox_recv_data(mhdp, reg, sizeof(reg));
  324. if (ret)
  325. continue;
  326. ret = cdns_mhdp_mailbox_recv_data(mhdp, edid, length);
  327. if (ret)
  328. continue;
  329. if (reg[0] == length && reg[1] == block / 2)
  330. break;
  331. }
  332. mutex_unlock(&mhdp->mbox_mutex);
  333. if (ret)
  334. dev_err(mhdp->dev, "get block[%d] edid failed: %d\n",
  335. block, ret);
  336. return ret;
  337. }
  338. static
  339. int cdns_mhdp_read_hpd_event(struct cdns_mhdp_device *mhdp)
  340. {
  341. u8 event = 0;
  342. int ret;
  343. mutex_lock(&mhdp->mbox_mutex);
  344. ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
  345. DPTX_READ_EVENT, 0, NULL);
  346. if (ret)
  347. goto out;
  348. ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX,
  349. DPTX_READ_EVENT, sizeof(event));
  350. if (ret < 0)
  351. goto out;
  352. ret = cdns_mhdp_mailbox_recv_data(mhdp, &event, sizeof(event));
  353. out:
  354. mutex_unlock(&mhdp->mbox_mutex);
  355. if (ret < 0)
  356. return ret;
  357. dev_dbg(mhdp->dev, "%s: %s%s%s%s\n", __func__,
  358. (event & DPTX_READ_EVENT_HPD_TO_HIGH) ? "TO_HIGH " : "",
  359. (event & DPTX_READ_EVENT_HPD_TO_LOW) ? "TO_LOW " : "",
  360. (event & DPTX_READ_EVENT_HPD_PULSE) ? "PULSE " : "",
  361. (event & DPTX_READ_EVENT_HPD_STATE) ? "HPD_STATE " : "");
  362. return event;
  363. }
  364. static
  365. int cdns_mhdp_adjust_lt(struct cdns_mhdp_device *mhdp, unsigned int nlanes,
  366. unsigned int udelay, const u8 *lanes_data,
  367. u8 link_status[DP_LINK_STATUS_SIZE])
  368. {
  369. u8 payload[7];
  370. u8 hdr[5]; /* For DPCD read response header */
  371. u32 addr;
  372. int ret;
  373. if (nlanes != 4 && nlanes != 2 && nlanes != 1) {
  374. dev_err(mhdp->dev, "invalid number of lanes: %u\n", nlanes);
  375. ret = -EINVAL;
  376. goto out;
  377. }
  378. payload[0] = nlanes;
  379. put_unaligned_be16(udelay, payload + 1);
  380. memcpy(payload + 3, lanes_data, nlanes);
  381. mutex_lock(&mhdp->mbox_mutex);
  382. ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
  383. DPTX_ADJUST_LT,
  384. sizeof(payload), payload);
  385. if (ret)
  386. goto out;
  387. /* Yes, read the DPCD read command response */
  388. ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX,
  389. DPTX_READ_DPCD,
  390. sizeof(hdr) + DP_LINK_STATUS_SIZE);
  391. if (ret)
  392. goto out;
  393. ret = cdns_mhdp_mailbox_recv_data(mhdp, hdr, sizeof(hdr));
  394. if (ret)
  395. goto out;
  396. addr = get_unaligned_be24(hdr + 2);
  397. if (addr != DP_LANE0_1_STATUS)
  398. goto out;
  399. ret = cdns_mhdp_mailbox_recv_data(mhdp, link_status,
  400. DP_LINK_STATUS_SIZE);
  401. out:
  402. mutex_unlock(&mhdp->mbox_mutex);
  403. if (ret)
  404. dev_err(mhdp->dev, "Failed to adjust Link Training.\n");
  405. return ret;
  406. }
  407. /**
  408. * cdns_mhdp_link_power_up() - power up a DisplayPort link
  409. * @aux: DisplayPort AUX channel
  410. * @link: pointer to a structure containing the link configuration
  411. *
  412. * Returns 0 on success or a negative error code on failure.
  413. */
  414. static
  415. int cdns_mhdp_link_power_up(struct drm_dp_aux *aux, struct cdns_mhdp_link *link)
  416. {
  417. u8 value;
  418. int err;
  419. /* DP_SET_POWER register is only available on DPCD v1.1 and later */
  420. if (link->revision < 0x11)
  421. return 0;
  422. err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
  423. if (err < 0)
  424. return err;
  425. value &= ~DP_SET_POWER_MASK;
  426. value |= DP_SET_POWER_D0;
  427. err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
  428. if (err < 0)
  429. return err;
  430. /*
  431. * According to the DP 1.1 specification, a "Sink Device must exit the
  432. * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
  433. * Control Field" (register 0x600).
  434. */
  435. usleep_range(1000, 2000);
  436. return 0;
  437. }
  438. /**
  439. * cdns_mhdp_link_power_down() - power down a DisplayPort link
  440. * @aux: DisplayPort AUX channel
  441. * @link: pointer to a structure containing the link configuration
  442. *
  443. * Returns 0 on success or a negative error code on failure.
  444. */
  445. static
  446. int cdns_mhdp_link_power_down(struct drm_dp_aux *aux,
  447. struct cdns_mhdp_link *link)
  448. {
  449. u8 value;
  450. int err;
  451. /* DP_SET_POWER register is only available on DPCD v1.1 and later */
  452. if (link->revision < 0x11)
  453. return 0;
  454. err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
  455. if (err < 0)
  456. return err;
  457. value &= ~DP_SET_POWER_MASK;
  458. value |= DP_SET_POWER_D3;
  459. err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
  460. if (err < 0)
  461. return err;
  462. return 0;
  463. }
  464. /**
  465. * cdns_mhdp_link_configure() - configure a DisplayPort link
  466. * @aux: DisplayPort AUX channel
  467. * @link: pointer to a structure containing the link configuration
  468. *
  469. * Returns 0 on success or a negative error code on failure.
  470. */
  471. static
  472. int cdns_mhdp_link_configure(struct drm_dp_aux *aux,
  473. struct cdns_mhdp_link *link)
  474. {
  475. u8 values[2];
  476. int err;
  477. values[0] = drm_dp_link_rate_to_bw_code(link->rate);
  478. values[1] = link->num_lanes;
  479. if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
  480. values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
  481. err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
  482. if (err < 0)
  483. return err;
  484. return 0;
  485. }
  486. static unsigned int cdns_mhdp_max_link_rate(struct cdns_mhdp_device *mhdp)
  487. {
  488. return min(mhdp->host.link_rate, mhdp->sink.link_rate);
  489. }
  490. static u8 cdns_mhdp_max_num_lanes(struct cdns_mhdp_device *mhdp)
  491. {
  492. return min(mhdp->sink.lanes_cnt, mhdp->host.lanes_cnt);
  493. }
  494. static u8 cdns_mhdp_eq_training_pattern_supported(struct cdns_mhdp_device *mhdp)
  495. {
  496. return fls(mhdp->host.pattern_supp & mhdp->sink.pattern_supp);
  497. }
  498. static bool cdns_mhdp_get_ssc_supported(struct cdns_mhdp_device *mhdp)
  499. {
  500. /* Check if SSC is supported by both sides */
  501. return mhdp->host.ssc && mhdp->sink.ssc;
  502. }
  503. static enum drm_connector_status cdns_mhdp_detect(struct cdns_mhdp_device *mhdp)
  504. {
  505. dev_dbg(mhdp->dev, "%s: %d\n", __func__, mhdp->plugged);
  506. if (mhdp->plugged)
  507. return connector_status_connected;
  508. else
  509. return connector_status_disconnected;
  510. }
  511. static int cdns_mhdp_check_fw_version(struct cdns_mhdp_device *mhdp)
  512. {
  513. u32 major_num, minor_num, revision;
  514. u32 fw_ver, lib_ver;
  515. fw_ver = (readl(mhdp->regs + CDNS_VER_H) << 8)
  516. | readl(mhdp->regs + CDNS_VER_L);
  517. lib_ver = (readl(mhdp->regs + CDNS_LIB_H_ADDR) << 8)
  518. | readl(mhdp->regs + CDNS_LIB_L_ADDR);
  519. if (lib_ver < 33984) {
  520. /*
  521. * Older FW versions with major number 1, used to store FW
  522. * version information by storing repository revision number
  523. * in registers. This is for identifying these FW versions.
  524. */
  525. major_num = 1;
  526. minor_num = 2;
  527. if (fw_ver == 26098) {
  528. revision = 15;
  529. } else if (lib_ver == 0 && fw_ver == 0) {
  530. revision = 17;
  531. } else {
  532. dev_err(mhdp->dev, "Unsupported FW version: fw_ver = %u, lib_ver = %u\n",
  533. fw_ver, lib_ver);
  534. return -ENODEV;
  535. }
  536. } else {
  537. /* To identify newer FW versions with major number 2 onwards. */
  538. major_num = fw_ver / 10000;
  539. minor_num = (fw_ver / 100) % 100;
  540. revision = (fw_ver % 10000) % 100;
  541. }
  542. dev_dbg(mhdp->dev, "FW version: v%u.%u.%u\n", major_num, minor_num,
  543. revision);
  544. return 0;
  545. }
  546. static int cdns_mhdp_fw_activate(const struct firmware *fw,
  547. struct cdns_mhdp_device *mhdp)
  548. {
  549. unsigned int reg;
  550. int ret;
  551. /* Release uCPU reset and stall it. */
  552. writel(CDNS_CPU_STALL, mhdp->regs + CDNS_APB_CTRL);
  553. memcpy_toio(mhdp->regs + CDNS_MHDP_IMEM, fw->data, fw->size);
  554. /* Leave debug mode, release stall */
  555. writel(0, mhdp->regs + CDNS_APB_CTRL);
  556. /*
  557. * Wait for the KEEP_ALIVE "message" on the first 8 bits.
  558. * Updated each sched "tick" (~2ms)
  559. */
  560. ret = readl_poll_timeout(mhdp->regs + CDNS_KEEP_ALIVE, reg,
  561. reg & CDNS_KEEP_ALIVE_MASK, 500,
  562. CDNS_KEEP_ALIVE_TIMEOUT);
  563. if (ret) {
  564. dev_err(mhdp->dev,
  565. "device didn't give any life sign: reg %d\n", reg);
  566. return ret;
  567. }
  568. ret = cdns_mhdp_check_fw_version(mhdp);
  569. if (ret)
  570. return ret;
  571. /* Init events to 0 as it's not cleared by FW at boot but on read */
  572. readl(mhdp->regs + CDNS_SW_EVENT0);
  573. readl(mhdp->regs + CDNS_SW_EVENT1);
  574. readl(mhdp->regs + CDNS_SW_EVENT2);
  575. readl(mhdp->regs + CDNS_SW_EVENT3);
  576. /* Activate uCPU */
  577. ret = cdns_mhdp_set_firmware_active(mhdp, true);
  578. if (ret)
  579. return ret;
  580. spin_lock(&mhdp->start_lock);
  581. mhdp->hw_state = MHDP_HW_READY;
  582. /*
  583. * Here we must keep the lock while enabling the interrupts
  584. * since it would otherwise be possible that interrupt enable
  585. * code is executed after the bridge is detached. The similar
  586. * situation is not possible in attach()/detach() callbacks
  587. * since the hw_state changes from MHDP_HW_READY to
  588. * MHDP_HW_STOPPED happens only due to driver removal when
  589. * bridge should already be detached.
  590. */
  591. if (mhdp->bridge_attached)
  592. writel(~(u32)CDNS_APB_INT_MASK_SW_EVENT_INT,
  593. mhdp->regs + CDNS_APB_INT_MASK);
  594. spin_unlock(&mhdp->start_lock);
  595. wake_up(&mhdp->fw_load_wq);
  596. dev_dbg(mhdp->dev, "DP FW activated\n");
  597. return 0;
  598. }
  599. static void cdns_mhdp_fw_cb(const struct firmware *fw, void *context)
  600. {
  601. struct cdns_mhdp_device *mhdp = context;
  602. bool bridge_attached;
  603. int ret;
  604. dev_dbg(mhdp->dev, "firmware callback\n");
  605. if (!fw || !fw->data) {
  606. dev_err(mhdp->dev, "%s: No firmware.\n", __func__);
  607. return;
  608. }
  609. ret = cdns_mhdp_fw_activate(fw, mhdp);
  610. release_firmware(fw);
  611. if (ret)
  612. return;
  613. /*
  614. * XXX how to make sure the bridge is still attached when
  615. * calling drm_kms_helper_hotplug_event() after releasing
  616. * the lock? We should not hold the spin lock when
  617. * calling drm_kms_helper_hotplug_event() since it may
  618. * cause a dead lock. FB-dev console calls detect from the
  619. * same thread just down the call stack started here.
  620. */
  621. spin_lock(&mhdp->start_lock);
  622. bridge_attached = mhdp->bridge_attached;
  623. spin_unlock(&mhdp->start_lock);
  624. if (bridge_attached) {
  625. if (mhdp->connector.dev)
  626. drm_kms_helper_hotplug_event(mhdp->bridge.dev);
  627. else
  628. drm_bridge_hpd_notify(&mhdp->bridge, cdns_mhdp_detect(mhdp));
  629. }
  630. }
  631. static int cdns_mhdp_load_firmware(struct cdns_mhdp_device *mhdp)
  632. {
  633. int ret;
  634. ret = request_firmware_nowait(THIS_MODULE, true, FW_NAME, mhdp->dev,
  635. GFP_KERNEL, mhdp, cdns_mhdp_fw_cb);
  636. if (ret) {
  637. dev_err(mhdp->dev, "failed to load firmware (%s), ret: %d\n",
  638. FW_NAME, ret);
  639. return ret;
  640. }
  641. return 0;
  642. }
  643. static ssize_t cdns_mhdp_transfer(struct drm_dp_aux *aux,
  644. struct drm_dp_aux_msg *msg)
  645. {
  646. struct cdns_mhdp_device *mhdp = dev_get_drvdata(aux->dev);
  647. int ret;
  648. if (msg->request != DP_AUX_NATIVE_WRITE &&
  649. msg->request != DP_AUX_NATIVE_READ)
  650. return -EOPNOTSUPP;
  651. if (msg->request == DP_AUX_NATIVE_WRITE) {
  652. const u8 *buf = msg->buffer;
  653. unsigned int i;
  654. for (i = 0; i < msg->size; ++i) {
  655. ret = cdns_mhdp_dpcd_write(mhdp,
  656. msg->address + i, buf[i]);
  657. if (!ret)
  658. continue;
  659. dev_err(mhdp->dev,
  660. "Failed to write DPCD addr %u\n",
  661. msg->address + i);
  662. return ret;
  663. }
  664. } else {
  665. ret = cdns_mhdp_dpcd_read(mhdp, msg->address,
  666. msg->buffer, msg->size);
  667. if (ret) {
  668. dev_err(mhdp->dev,
  669. "Failed to read DPCD addr %u\n",
  670. msg->address);
  671. return ret;
  672. }
  673. }
  674. return msg->size;
  675. }
  676. static int cdns_mhdp_link_training_init(struct cdns_mhdp_device *mhdp)
  677. {
  678. union phy_configure_opts phy_cfg;
  679. u32 reg32;
  680. int ret;
  681. drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,
  682. DP_TRAINING_PATTERN_DISABLE);
  683. /* Reset PHY configuration */
  684. reg32 = CDNS_PHY_COMMON_CONFIG | CDNS_PHY_TRAINING_TYPE(1);
  685. if (!mhdp->host.scrambler)
  686. reg32 |= CDNS_PHY_SCRAMBLER_BYPASS;
  687. cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, reg32);
  688. cdns_mhdp_reg_write(mhdp, CDNS_DP_ENHNCD,
  689. mhdp->sink.enhanced & mhdp->host.enhanced);
  690. cdns_mhdp_reg_write(mhdp, CDNS_DP_LANE_EN,
  691. CDNS_DP_LANE_EN_LANES(mhdp->link.num_lanes));
  692. cdns_mhdp_link_configure(&mhdp->aux, &mhdp->link);
  693. phy_cfg.dp.link_rate = mhdp->link.rate / 100;
  694. phy_cfg.dp.lanes = mhdp->link.num_lanes;
  695. memset(phy_cfg.dp.voltage, 0, sizeof(phy_cfg.dp.voltage));
  696. memset(phy_cfg.dp.pre, 0, sizeof(phy_cfg.dp.pre));
  697. phy_cfg.dp.ssc = cdns_mhdp_get_ssc_supported(mhdp);
  698. phy_cfg.dp.set_lanes = true;
  699. phy_cfg.dp.set_rate = true;
  700. phy_cfg.dp.set_voltages = true;
  701. ret = phy_configure(mhdp->phy, &phy_cfg);
  702. if (ret) {
  703. dev_err(mhdp->dev, "%s: phy_configure() failed: %d\n",
  704. __func__, ret);
  705. return ret;
  706. }
  707. cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG,
  708. CDNS_PHY_COMMON_CONFIG |
  709. CDNS_PHY_TRAINING_EN |
  710. CDNS_PHY_TRAINING_TYPE(1) |
  711. CDNS_PHY_SCRAMBLER_BYPASS);
  712. drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,
  713. DP_TRAINING_PATTERN_1 | DP_LINK_SCRAMBLING_DISABLE);
  714. return 0;
  715. }
  716. static void cdns_mhdp_get_adjust_train(struct cdns_mhdp_device *mhdp,
  717. u8 link_status[DP_LINK_STATUS_SIZE],
  718. u8 lanes_data[CDNS_DP_MAX_NUM_LANES],
  719. union phy_configure_opts *phy_cfg)
  720. {
  721. u8 adjust, max_pre_emph, max_volt_swing;
  722. u8 set_volt, set_pre;
  723. unsigned int i;
  724. max_pre_emph = CDNS_PRE_EMPHASIS(mhdp->host.pre_emphasis)
  725. << DP_TRAIN_PRE_EMPHASIS_SHIFT;
  726. max_volt_swing = CDNS_VOLT_SWING(mhdp->host.volt_swing);
  727. for (i = 0; i < mhdp->link.num_lanes; i++) {
  728. /* Check if Voltage swing and pre-emphasis are within limits */
  729. adjust = drm_dp_get_adjust_request_voltage(link_status, i);
  730. set_volt = min(adjust, max_volt_swing);
  731. adjust = drm_dp_get_adjust_request_pre_emphasis(link_status, i);
  732. set_pre = min(adjust, max_pre_emph)
  733. >> DP_TRAIN_PRE_EMPHASIS_SHIFT;
  734. /*
  735. * Voltage swing level and pre-emphasis level combination is
  736. * not allowed: leaving pre-emphasis as-is, and adjusting
  737. * voltage swing.
  738. */
  739. if (set_volt + set_pre > 3)
  740. set_volt = 3 - set_pre;
  741. phy_cfg->dp.voltage[i] = set_volt;
  742. lanes_data[i] = set_volt;
  743. if (set_volt == max_volt_swing)
  744. lanes_data[i] |= DP_TRAIN_MAX_SWING_REACHED;
  745. phy_cfg->dp.pre[i] = set_pre;
  746. lanes_data[i] |= (set_pre << DP_TRAIN_PRE_EMPHASIS_SHIFT);
  747. if (set_pre == (max_pre_emph >> DP_TRAIN_PRE_EMPHASIS_SHIFT))
  748. lanes_data[i] |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
  749. }
  750. }
  751. static
  752. void cdns_mhdp_set_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE],
  753. unsigned int lane, u8 volt)
  754. {
  755. unsigned int s = ((lane & 1) ?
  756. DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
  757. DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
  758. unsigned int idx = DP_ADJUST_REQUEST_LANE0_1 - DP_LANE0_1_STATUS + (lane >> 1);
  759. link_status[idx] &= ~(DP_ADJUST_VOLTAGE_SWING_LANE0_MASK << s);
  760. link_status[idx] |= volt << s;
  761. }
  762. static
  763. void cdns_mhdp_set_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE],
  764. unsigned int lane, u8 pre_emphasis)
  765. {
  766. unsigned int s = ((lane & 1) ?
  767. DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
  768. DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
  769. unsigned int idx = DP_ADJUST_REQUEST_LANE0_1 - DP_LANE0_1_STATUS + (lane >> 1);
  770. link_status[idx] &= ~(DP_ADJUST_PRE_EMPHASIS_LANE0_MASK << s);
  771. link_status[idx] |= pre_emphasis << s;
  772. }
  773. static void cdns_mhdp_adjust_requested_eq(struct cdns_mhdp_device *mhdp,
  774. u8 link_status[DP_LINK_STATUS_SIZE])
  775. {
  776. u8 max_pre = CDNS_PRE_EMPHASIS(mhdp->host.pre_emphasis);
  777. u8 max_volt = CDNS_VOLT_SWING(mhdp->host.volt_swing);
  778. unsigned int i;
  779. u8 volt, pre;
  780. for (i = 0; i < mhdp->link.num_lanes; i++) {
  781. volt = drm_dp_get_adjust_request_voltage(link_status, i);
  782. pre = drm_dp_get_adjust_request_pre_emphasis(link_status, i);
  783. if (volt + pre > 3)
  784. cdns_mhdp_set_adjust_request_voltage(link_status, i,
  785. 3 - pre);
  786. if (mhdp->host.volt_swing & CDNS_FORCE_VOLT_SWING)
  787. cdns_mhdp_set_adjust_request_voltage(link_status, i,
  788. max_volt);
  789. if (mhdp->host.pre_emphasis & CDNS_FORCE_PRE_EMPHASIS)
  790. cdns_mhdp_set_adjust_request_pre_emphasis(link_status,
  791. i, max_pre);
  792. }
  793. }
  794. static void cdns_mhdp_print_lt_status(const char *prefix,
  795. struct cdns_mhdp_device *mhdp,
  796. union phy_configure_opts *phy_cfg)
  797. {
  798. char vs[8] = "0/0/0/0";
  799. char pe[8] = "0/0/0/0";
  800. unsigned int i;
  801. for (i = 0; i < mhdp->link.num_lanes; i++) {
  802. vs[i * 2] = '0' + phy_cfg->dp.voltage[i];
  803. pe[i * 2] = '0' + phy_cfg->dp.pre[i];
  804. }
  805. vs[i * 2 - 1] = '\0';
  806. pe[i * 2 - 1] = '\0';
  807. dev_dbg(mhdp->dev, "%s, %u lanes, %u Mbps, vs %s, pe %s\n",
  808. prefix,
  809. mhdp->link.num_lanes, mhdp->link.rate / 100,
  810. vs, pe);
  811. }
  812. static bool cdns_mhdp_link_training_channel_eq(struct cdns_mhdp_device *mhdp,
  813. u8 eq_tps,
  814. unsigned int training_interval)
  815. {
  816. u8 lanes_data[CDNS_DP_MAX_NUM_LANES], fail_counter_short = 0;
  817. u8 link_status[DP_LINK_STATUS_SIZE];
  818. union phy_configure_opts phy_cfg;
  819. u32 reg32;
  820. int ret;
  821. bool r;
  822. dev_dbg(mhdp->dev, "Starting EQ phase\n");
  823. /* Enable link training TPS[eq_tps] in PHY */
  824. reg32 = CDNS_PHY_COMMON_CONFIG | CDNS_PHY_TRAINING_EN |
  825. CDNS_PHY_TRAINING_TYPE(eq_tps);
  826. if (eq_tps != 4)
  827. reg32 |= CDNS_PHY_SCRAMBLER_BYPASS;
  828. cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, reg32);
  829. drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,
  830. (eq_tps != 4) ? eq_tps | DP_LINK_SCRAMBLING_DISABLE :
  831. CDNS_DP_TRAINING_PATTERN_4);
  832. drm_dp_dpcd_read_link_status(&mhdp->aux, link_status);
  833. do {
  834. cdns_mhdp_get_adjust_train(mhdp, link_status, lanes_data,
  835. &phy_cfg);
  836. phy_cfg.dp.lanes = mhdp->link.num_lanes;
  837. phy_cfg.dp.ssc = cdns_mhdp_get_ssc_supported(mhdp);
  838. phy_cfg.dp.set_lanes = false;
  839. phy_cfg.dp.set_rate = false;
  840. phy_cfg.dp.set_voltages = true;
  841. ret = phy_configure(mhdp->phy, &phy_cfg);
  842. if (ret) {
  843. dev_err(mhdp->dev, "%s: phy_configure() failed: %d\n",
  844. __func__, ret);
  845. goto err;
  846. }
  847. cdns_mhdp_adjust_lt(mhdp, mhdp->link.num_lanes,
  848. training_interval, lanes_data, link_status);
  849. r = drm_dp_clock_recovery_ok(link_status, mhdp->link.num_lanes);
  850. if (!r)
  851. goto err;
  852. if (drm_dp_channel_eq_ok(link_status, mhdp->link.num_lanes)) {
  853. cdns_mhdp_print_lt_status("EQ phase ok", mhdp,
  854. &phy_cfg);
  855. return true;
  856. }
  857. fail_counter_short++;
  858. cdns_mhdp_adjust_requested_eq(mhdp, link_status);
  859. } while (fail_counter_short < 5);
  860. err:
  861. cdns_mhdp_print_lt_status("EQ phase failed", mhdp, &phy_cfg);
  862. return false;
  863. }
  864. static void cdns_mhdp_adjust_requested_cr(struct cdns_mhdp_device *mhdp,
  865. u8 link_status[DP_LINK_STATUS_SIZE],
  866. u8 *req_volt, u8 *req_pre)
  867. {
  868. const u8 max_volt = CDNS_VOLT_SWING(mhdp->host.volt_swing);
  869. const u8 max_pre = CDNS_PRE_EMPHASIS(mhdp->host.pre_emphasis);
  870. unsigned int i;
  871. for (i = 0; i < mhdp->link.num_lanes; i++) {
  872. u8 val;
  873. val = mhdp->host.volt_swing & CDNS_FORCE_VOLT_SWING ?
  874. max_volt : req_volt[i];
  875. cdns_mhdp_set_adjust_request_voltage(link_status, i, val);
  876. val = mhdp->host.pre_emphasis & CDNS_FORCE_PRE_EMPHASIS ?
  877. max_pre : req_pre[i];
  878. cdns_mhdp_set_adjust_request_pre_emphasis(link_status, i, val);
  879. }
  880. }
  881. static
  882. void cdns_mhdp_validate_cr(struct cdns_mhdp_device *mhdp, bool *cr_done,
  883. bool *same_before_adjust, bool *max_swing_reached,
  884. u8 before_cr[CDNS_DP_MAX_NUM_LANES],
  885. u8 after_cr[DP_LINK_STATUS_SIZE], u8 *req_volt,
  886. u8 *req_pre)
  887. {
  888. const u8 max_volt = CDNS_VOLT_SWING(mhdp->host.volt_swing);
  889. const u8 max_pre = CDNS_PRE_EMPHASIS(mhdp->host.pre_emphasis);
  890. bool same_pre, same_volt;
  891. unsigned int i;
  892. u8 adjust;
  893. *same_before_adjust = false;
  894. *max_swing_reached = false;
  895. *cr_done = drm_dp_clock_recovery_ok(after_cr, mhdp->link.num_lanes);
  896. for (i = 0; i < mhdp->link.num_lanes; i++) {
  897. adjust = drm_dp_get_adjust_request_voltage(after_cr, i);
  898. req_volt[i] = min(adjust, max_volt);
  899. adjust = drm_dp_get_adjust_request_pre_emphasis(after_cr, i) >>
  900. DP_TRAIN_PRE_EMPHASIS_SHIFT;
  901. req_pre[i] = min(adjust, max_pre);
  902. same_pre = (before_cr[i] & DP_TRAIN_PRE_EMPHASIS_MASK) ==
  903. req_pre[i] << DP_TRAIN_PRE_EMPHASIS_SHIFT;
  904. same_volt = (before_cr[i] & DP_TRAIN_VOLTAGE_SWING_MASK) ==
  905. req_volt[i];
  906. if (same_pre && same_volt)
  907. *same_before_adjust = true;
  908. /* 3.1.5.2 in DP Standard v1.4. Table 3-1 */
  909. if (!*cr_done && req_volt[i] + req_pre[i] >= 3) {
  910. *max_swing_reached = true;
  911. return;
  912. }
  913. }
  914. }
  915. static bool cdns_mhdp_link_training_cr(struct cdns_mhdp_device *mhdp)
  916. {
  917. u8 lanes_data[CDNS_DP_MAX_NUM_LANES],
  918. fail_counter_short = 0, fail_counter_cr_long = 0;
  919. u8 link_status[DP_LINK_STATUS_SIZE];
  920. bool cr_done;
  921. union phy_configure_opts phy_cfg;
  922. int ret;
  923. dev_dbg(mhdp->dev, "Starting CR phase\n");
  924. ret = cdns_mhdp_link_training_init(mhdp);
  925. if (ret)
  926. goto err;
  927. drm_dp_dpcd_read_link_status(&mhdp->aux, link_status);
  928. do {
  929. u8 requested_adjust_volt_swing[CDNS_DP_MAX_NUM_LANES] = {};
  930. u8 requested_adjust_pre_emphasis[CDNS_DP_MAX_NUM_LANES] = {};
  931. bool same_before_adjust, max_swing_reached;
  932. cdns_mhdp_get_adjust_train(mhdp, link_status, lanes_data,
  933. &phy_cfg);
  934. phy_cfg.dp.lanes = mhdp->link.num_lanes;
  935. phy_cfg.dp.ssc = cdns_mhdp_get_ssc_supported(mhdp);
  936. phy_cfg.dp.set_lanes = false;
  937. phy_cfg.dp.set_rate = false;
  938. phy_cfg.dp.set_voltages = true;
  939. ret = phy_configure(mhdp->phy, &phy_cfg);
  940. if (ret) {
  941. dev_err(mhdp->dev, "%s: phy_configure() failed: %d\n",
  942. __func__, ret);
  943. goto err;
  944. }
  945. cdns_mhdp_adjust_lt(mhdp, mhdp->link.num_lanes, 100,
  946. lanes_data, link_status);
  947. cdns_mhdp_validate_cr(mhdp, &cr_done, &same_before_adjust,
  948. &max_swing_reached, lanes_data,
  949. link_status,
  950. requested_adjust_volt_swing,
  951. requested_adjust_pre_emphasis);
  952. if (max_swing_reached) {
  953. dev_err(mhdp->dev, "CR: max swing reached\n");
  954. goto err;
  955. }
  956. if (cr_done) {
  957. cdns_mhdp_print_lt_status("CR phase ok", mhdp,
  958. &phy_cfg);
  959. return true;
  960. }
  961. /* Not all CR_DONE bits set */
  962. fail_counter_cr_long++;
  963. if (same_before_adjust) {
  964. fail_counter_short++;
  965. continue;
  966. }
  967. fail_counter_short = 0;
  968. /*
  969. * Voltage swing/pre-emphasis adjust requested
  970. * during CR phase
  971. */
  972. cdns_mhdp_adjust_requested_cr(mhdp, link_status,
  973. requested_adjust_volt_swing,
  974. requested_adjust_pre_emphasis);
  975. } while (fail_counter_short < 5 && fail_counter_cr_long < 10);
  976. err:
  977. cdns_mhdp_print_lt_status("CR phase failed", mhdp, &phy_cfg);
  978. return false;
  979. }
  980. static void cdns_mhdp_lower_link_rate(struct cdns_mhdp_link *link)
  981. {
  982. switch (drm_dp_link_rate_to_bw_code(link->rate)) {
  983. case DP_LINK_BW_2_7:
  984. link->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_1_62);
  985. break;
  986. case DP_LINK_BW_5_4:
  987. link->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_2_7);
  988. break;
  989. case DP_LINK_BW_8_1:
  990. link->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4);
  991. break;
  992. }
  993. }
  994. static int cdns_mhdp_link_training(struct cdns_mhdp_device *mhdp,
  995. unsigned int training_interval)
  996. {
  997. u32 reg32;
  998. const u8 eq_tps = cdns_mhdp_eq_training_pattern_supported(mhdp);
  999. int ret;
  1000. while (1) {
  1001. if (!cdns_mhdp_link_training_cr(mhdp)) {
  1002. if (drm_dp_link_rate_to_bw_code(mhdp->link.rate) !=
  1003. DP_LINK_BW_1_62) {
  1004. dev_dbg(mhdp->dev,
  1005. "Reducing link rate during CR phase\n");
  1006. cdns_mhdp_lower_link_rate(&mhdp->link);
  1007. continue;
  1008. } else if (mhdp->link.num_lanes > 1) {
  1009. dev_dbg(mhdp->dev,
  1010. "Reducing lanes number during CR phase\n");
  1011. mhdp->link.num_lanes >>= 1;
  1012. mhdp->link.rate = cdns_mhdp_max_link_rate(mhdp);
  1013. continue;
  1014. }
  1015. dev_err(mhdp->dev,
  1016. "Link training failed during CR phase\n");
  1017. goto err;
  1018. }
  1019. if (cdns_mhdp_link_training_channel_eq(mhdp, eq_tps,
  1020. training_interval))
  1021. break;
  1022. if (mhdp->link.num_lanes > 1) {
  1023. dev_dbg(mhdp->dev,
  1024. "Reducing lanes number during EQ phase\n");
  1025. mhdp->link.num_lanes >>= 1;
  1026. continue;
  1027. } else if (drm_dp_link_rate_to_bw_code(mhdp->link.rate) !=
  1028. DP_LINK_BW_1_62) {
  1029. dev_dbg(mhdp->dev,
  1030. "Reducing link rate during EQ phase\n");
  1031. cdns_mhdp_lower_link_rate(&mhdp->link);
  1032. mhdp->link.num_lanes = cdns_mhdp_max_num_lanes(mhdp);
  1033. continue;
  1034. }
  1035. dev_err(mhdp->dev, "Link training failed during EQ phase\n");
  1036. goto err;
  1037. }
  1038. dev_dbg(mhdp->dev, "Link training ok. Lanes: %u, Rate %u Mbps\n",
  1039. mhdp->link.num_lanes, mhdp->link.rate / 100);
  1040. drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,
  1041. mhdp->host.scrambler ? 0 :
  1042. DP_LINK_SCRAMBLING_DISABLE);
  1043. ret = cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, &reg32);
  1044. if (ret < 0) {
  1045. dev_err(mhdp->dev,
  1046. "Failed to read CDNS_DP_FRAMER_GLOBAL_CONFIG %d\n",
  1047. ret);
  1048. return ret;
  1049. }
  1050. reg32 &= ~GENMASK(1, 0);
  1051. reg32 |= CDNS_DP_NUM_LANES(mhdp->link.num_lanes);
  1052. reg32 |= CDNS_DP_WR_FAILING_EDGE_VSYNC;
  1053. reg32 |= CDNS_DP_FRAMER_EN;
  1054. cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, reg32);
  1055. /* Reset PHY config */
  1056. reg32 = CDNS_PHY_COMMON_CONFIG | CDNS_PHY_TRAINING_TYPE(1);
  1057. if (!mhdp->host.scrambler)
  1058. reg32 |= CDNS_PHY_SCRAMBLER_BYPASS;
  1059. cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, reg32);
  1060. return 0;
  1061. err:
  1062. /* Reset PHY config */
  1063. reg32 = CDNS_PHY_COMMON_CONFIG | CDNS_PHY_TRAINING_TYPE(1);
  1064. if (!mhdp->host.scrambler)
  1065. reg32 |= CDNS_PHY_SCRAMBLER_BYPASS;
  1066. cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, reg32);
  1067. drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,
  1068. DP_TRAINING_PATTERN_DISABLE);
  1069. return -EIO;
  1070. }
  1071. static u32 cdns_mhdp_get_training_interval_us(struct cdns_mhdp_device *mhdp,
  1072. u32 interval)
  1073. {
  1074. if (interval == 0)
  1075. return 400;
  1076. if (interval < 5)
  1077. return 4000 << (interval - 1);
  1078. dev_err(mhdp->dev,
  1079. "wrong training interval returned by DPCD: %d\n", interval);
  1080. return 0;
  1081. }
  1082. static void cdns_mhdp_fill_host_caps(struct cdns_mhdp_device *mhdp)
  1083. {
  1084. unsigned int link_rate;
  1085. /* Get source capabilities based on PHY attributes */
  1086. mhdp->host.lanes_cnt = mhdp->phy->attrs.bus_width;
  1087. if (!mhdp->host.lanes_cnt)
  1088. mhdp->host.lanes_cnt = 4;
  1089. link_rate = mhdp->phy->attrs.max_link_rate;
  1090. if (!link_rate)
  1091. link_rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_8_1);
  1092. else
  1093. /* PHY uses Mb/s, DRM uses tens of kb/s. */
  1094. link_rate *= 100;
  1095. mhdp->host.link_rate = link_rate;
  1096. mhdp->host.volt_swing = CDNS_VOLT_SWING(3);
  1097. mhdp->host.pre_emphasis = CDNS_PRE_EMPHASIS(3);
  1098. mhdp->host.pattern_supp = CDNS_SUPPORT_TPS(1) |
  1099. CDNS_SUPPORT_TPS(2) | CDNS_SUPPORT_TPS(3) |
  1100. CDNS_SUPPORT_TPS(4);
  1101. mhdp->host.lane_mapping = CDNS_LANE_MAPPING_NORMAL;
  1102. mhdp->host.fast_link = false;
  1103. mhdp->host.enhanced = true;
  1104. mhdp->host.scrambler = true;
  1105. mhdp->host.ssc = false;
  1106. }
  1107. static void cdns_mhdp_fill_sink_caps(struct cdns_mhdp_device *mhdp,
  1108. u8 dpcd[DP_RECEIVER_CAP_SIZE])
  1109. {
  1110. mhdp->sink.link_rate = mhdp->link.rate;
  1111. mhdp->sink.lanes_cnt = mhdp->link.num_lanes;
  1112. mhdp->sink.enhanced = !!(mhdp->link.capabilities &
  1113. DP_LINK_CAP_ENHANCED_FRAMING);
  1114. /* Set SSC support */
  1115. mhdp->sink.ssc = !!(dpcd[DP_MAX_DOWNSPREAD] &
  1116. DP_MAX_DOWNSPREAD_0_5);
  1117. /* Set TPS support */
  1118. mhdp->sink.pattern_supp = CDNS_SUPPORT_TPS(1) | CDNS_SUPPORT_TPS(2);
  1119. if (drm_dp_tps3_supported(dpcd))
  1120. mhdp->sink.pattern_supp |= CDNS_SUPPORT_TPS(3);
  1121. if (drm_dp_tps4_supported(dpcd))
  1122. mhdp->sink.pattern_supp |= CDNS_SUPPORT_TPS(4);
  1123. /* Set fast link support */
  1124. mhdp->sink.fast_link = !!(dpcd[DP_MAX_DOWNSPREAD] &
  1125. DP_NO_AUX_HANDSHAKE_LINK_TRAINING);
  1126. }
  1127. static int cdns_mhdp_link_up(struct cdns_mhdp_device *mhdp)
  1128. {
  1129. u8 dpcd[DP_RECEIVER_CAP_SIZE], amp[2];
  1130. u32 resp, interval, interval_us;
  1131. u8 ext_cap_chk = 0;
  1132. unsigned int addr;
  1133. int err;
  1134. WARN_ON(!mutex_is_locked(&mhdp->link_mutex));
  1135. drm_dp_dpcd_readb(&mhdp->aux, DP_TRAINING_AUX_RD_INTERVAL,
  1136. &ext_cap_chk);
  1137. if (ext_cap_chk & DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT)
  1138. addr = DP_DP13_DPCD_REV;
  1139. else
  1140. addr = DP_DPCD_REV;
  1141. err = drm_dp_dpcd_read(&mhdp->aux, addr, dpcd, DP_RECEIVER_CAP_SIZE);
  1142. if (err < 0) {
  1143. dev_err(mhdp->dev, "Failed to read receiver capabilities\n");
  1144. return err;
  1145. }
  1146. mhdp->link.revision = dpcd[0];
  1147. mhdp->link.rate = drm_dp_bw_code_to_link_rate(dpcd[1]);
  1148. mhdp->link.num_lanes = dpcd[2] & DP_MAX_LANE_COUNT_MASK;
  1149. if (dpcd[2] & DP_ENHANCED_FRAME_CAP)
  1150. mhdp->link.capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
  1151. dev_dbg(mhdp->dev, "Set sink device power state via DPCD\n");
  1152. cdns_mhdp_link_power_up(&mhdp->aux, &mhdp->link);
  1153. cdns_mhdp_fill_sink_caps(mhdp, dpcd);
  1154. mhdp->link.rate = cdns_mhdp_max_link_rate(mhdp);
  1155. mhdp->link.num_lanes = cdns_mhdp_max_num_lanes(mhdp);
  1156. /* Disable framer for link training */
  1157. err = cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, &resp);
  1158. if (err < 0) {
  1159. dev_err(mhdp->dev,
  1160. "Failed to read CDNS_DP_FRAMER_GLOBAL_CONFIG %d\n",
  1161. err);
  1162. return err;
  1163. }
  1164. resp &= ~CDNS_DP_FRAMER_EN;
  1165. cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, resp);
  1166. /* Spread AMP if required, enable 8b/10b coding */
  1167. amp[0] = cdns_mhdp_get_ssc_supported(mhdp) ? DP_SPREAD_AMP_0_5 : 0;
  1168. amp[1] = DP_SET_ANSI_8B10B;
  1169. drm_dp_dpcd_write(&mhdp->aux, DP_DOWNSPREAD_CTRL, amp, 2);
  1170. if (mhdp->host.fast_link & mhdp->sink.fast_link) {
  1171. dev_err(mhdp->dev, "fastlink not supported\n");
  1172. return -EOPNOTSUPP;
  1173. }
  1174. interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & DP_TRAINING_AUX_RD_MASK;
  1175. interval_us = cdns_mhdp_get_training_interval_us(mhdp, interval);
  1176. if (!interval_us ||
  1177. cdns_mhdp_link_training(mhdp, interval_us)) {
  1178. dev_err(mhdp->dev, "Link training failed. Exiting.\n");
  1179. return -EIO;
  1180. }
  1181. mhdp->link_up = true;
  1182. return 0;
  1183. }
  1184. static void cdns_mhdp_link_down(struct cdns_mhdp_device *mhdp)
  1185. {
  1186. WARN_ON(!mutex_is_locked(&mhdp->link_mutex));
  1187. if (mhdp->plugged)
  1188. cdns_mhdp_link_power_down(&mhdp->aux, &mhdp->link);
  1189. mhdp->link_up = false;
  1190. }
  1191. static struct edid *cdns_mhdp_get_edid(struct cdns_mhdp_device *mhdp,
  1192. struct drm_connector *connector)
  1193. {
  1194. if (!mhdp->plugged)
  1195. return NULL;
  1196. return drm_do_get_edid(connector, cdns_mhdp_get_edid_block, mhdp);
  1197. }
  1198. static int cdns_mhdp_get_modes(struct drm_connector *connector)
  1199. {
  1200. struct cdns_mhdp_device *mhdp = connector_to_mhdp(connector);
  1201. struct edid *edid;
  1202. int num_modes;
  1203. if (!mhdp->plugged)
  1204. return 0;
  1205. edid = cdns_mhdp_get_edid(mhdp, connector);
  1206. if (!edid) {
  1207. dev_err(mhdp->dev, "Failed to read EDID\n");
  1208. return 0;
  1209. }
  1210. drm_connector_update_edid_property(connector, edid);
  1211. num_modes = drm_add_edid_modes(connector, edid);
  1212. kfree(edid);
  1213. /*
  1214. * HACK: Warn about unsupported display formats until we deal
  1215. * with them correctly.
  1216. */
  1217. if (connector->display_info.color_formats &&
  1218. !(connector->display_info.color_formats &
  1219. mhdp->display_fmt.color_format))
  1220. dev_warn(mhdp->dev,
  1221. "%s: No supported color_format found (0x%08x)\n",
  1222. __func__, connector->display_info.color_formats);
  1223. if (connector->display_info.bpc &&
  1224. connector->display_info.bpc < mhdp->display_fmt.bpc)
  1225. dev_warn(mhdp->dev, "%s: Display bpc only %d < %d\n",
  1226. __func__, connector->display_info.bpc,
  1227. mhdp->display_fmt.bpc);
  1228. return num_modes;
  1229. }
  1230. static int cdns_mhdp_connector_detect(struct drm_connector *conn,
  1231. struct drm_modeset_acquire_ctx *ctx,
  1232. bool force)
  1233. {
  1234. struct cdns_mhdp_device *mhdp = connector_to_mhdp(conn);
  1235. return cdns_mhdp_detect(mhdp);
  1236. }
  1237. static u32 cdns_mhdp_get_bpp(struct cdns_mhdp_display_fmt *fmt)
  1238. {
  1239. u32 bpp;
  1240. if (fmt->y_only)
  1241. return fmt->bpc;
  1242. switch (fmt->color_format) {
  1243. case DRM_COLOR_FORMAT_RGB444:
  1244. case DRM_COLOR_FORMAT_YCRCB444:
  1245. bpp = fmt->bpc * 3;
  1246. break;
  1247. case DRM_COLOR_FORMAT_YCRCB422:
  1248. bpp = fmt->bpc * 2;
  1249. break;
  1250. case DRM_COLOR_FORMAT_YCRCB420:
  1251. bpp = fmt->bpc * 3 / 2;
  1252. break;
  1253. default:
  1254. bpp = fmt->bpc * 3;
  1255. WARN_ON(1);
  1256. }
  1257. return bpp;
  1258. }
  1259. static
  1260. bool cdns_mhdp_bandwidth_ok(struct cdns_mhdp_device *mhdp,
  1261. const struct drm_display_mode *mode,
  1262. unsigned int lanes, unsigned int rate)
  1263. {
  1264. u32 max_bw, req_bw, bpp;
  1265. /*
  1266. * mode->clock is expressed in kHz. Multiplying by bpp and dividing by 8
  1267. * we get the number of kB/s. DisplayPort applies a 8b-10b encoding, the
  1268. * value thus equals the bandwidth in 10kb/s units, which matches the
  1269. * units of the rate parameter.
  1270. */
  1271. bpp = cdns_mhdp_get_bpp(&mhdp->display_fmt);
  1272. req_bw = mode->clock * bpp / 8;
  1273. max_bw = lanes * rate;
  1274. if (req_bw > max_bw) {
  1275. dev_dbg(mhdp->dev,
  1276. "Unsupported Mode: %s, Req BW: %u, Available Max BW:%u\n",
  1277. mode->name, req_bw, max_bw);
  1278. return false;
  1279. }
  1280. return true;
  1281. }
  1282. static
  1283. enum drm_mode_status cdns_mhdp_mode_valid(struct drm_connector *conn,
  1284. struct drm_display_mode *mode)
  1285. {
  1286. struct cdns_mhdp_device *mhdp = connector_to_mhdp(conn);
  1287. mutex_lock(&mhdp->link_mutex);
  1288. if (!cdns_mhdp_bandwidth_ok(mhdp, mode, mhdp->link.num_lanes,
  1289. mhdp->link.rate)) {
  1290. mutex_unlock(&mhdp->link_mutex);
  1291. return MODE_CLOCK_HIGH;
  1292. }
  1293. mutex_unlock(&mhdp->link_mutex);
  1294. return MODE_OK;
  1295. }
  1296. static const struct drm_connector_helper_funcs cdns_mhdp_conn_helper_funcs = {
  1297. .detect_ctx = cdns_mhdp_connector_detect,
  1298. .get_modes = cdns_mhdp_get_modes,
  1299. .mode_valid = cdns_mhdp_mode_valid,
  1300. };
  1301. static const struct drm_connector_funcs cdns_mhdp_conn_funcs = {
  1302. .fill_modes = drm_helper_probe_single_connector_modes,
  1303. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  1304. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  1305. .reset = drm_atomic_helper_connector_reset,
  1306. .destroy = drm_connector_cleanup,
  1307. };
  1308. static int cdns_mhdp_connector_init(struct cdns_mhdp_device *mhdp)
  1309. {
  1310. u32 bus_format = MEDIA_BUS_FMT_RGB121212_1X36;
  1311. struct drm_connector *conn = &mhdp->connector;
  1312. struct drm_bridge *bridge = &mhdp->bridge;
  1313. int ret;
  1314. if (!bridge->encoder) {
  1315. dev_err(mhdp->dev, "Parent encoder object not found");
  1316. return -ENODEV;
  1317. }
  1318. conn->polled = DRM_CONNECTOR_POLL_HPD;
  1319. ret = drm_connector_init(bridge->dev, conn, &cdns_mhdp_conn_funcs,
  1320. DRM_MODE_CONNECTOR_DisplayPort);
  1321. if (ret) {
  1322. dev_err(mhdp->dev, "Failed to initialize connector with drm\n");
  1323. return ret;
  1324. }
  1325. drm_connector_helper_add(conn, &cdns_mhdp_conn_helper_funcs);
  1326. ret = drm_display_info_set_bus_formats(&conn->display_info,
  1327. &bus_format, 1);
  1328. if (ret)
  1329. return ret;
  1330. ret = drm_connector_attach_encoder(conn, bridge->encoder);
  1331. if (ret) {
  1332. dev_err(mhdp->dev, "Failed to attach connector to encoder\n");
  1333. return ret;
  1334. }
  1335. return 0;
  1336. }
  1337. static int cdns_mhdp_attach(struct drm_bridge *bridge,
  1338. enum drm_bridge_attach_flags flags)
  1339. {
  1340. struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
  1341. bool hw_ready;
  1342. int ret;
  1343. dev_dbg(mhdp->dev, "%s\n", __func__);
  1344. if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) {
  1345. ret = cdns_mhdp_connector_init(mhdp);
  1346. if (ret)
  1347. return ret;
  1348. }
  1349. spin_lock(&mhdp->start_lock);
  1350. mhdp->bridge_attached = true;
  1351. hw_ready = mhdp->hw_state == MHDP_HW_READY;
  1352. spin_unlock(&mhdp->start_lock);
  1353. /* Enable SW event interrupts */
  1354. if (hw_ready)
  1355. writel(~(u32)CDNS_APB_INT_MASK_SW_EVENT_INT,
  1356. mhdp->regs + CDNS_APB_INT_MASK);
  1357. return 0;
  1358. }
  1359. static void cdns_mhdp_configure_video(struct cdns_mhdp_device *mhdp,
  1360. const struct drm_display_mode *mode)
  1361. {
  1362. unsigned int dp_framer_sp = 0, msa_horizontal_1,
  1363. msa_vertical_1, bnd_hsync2vsync, hsync2vsync_pol_ctrl,
  1364. misc0 = 0, misc1 = 0, pxl_repr,
  1365. front_porch, back_porch, msa_h0, msa_v0, hsync, vsync,
  1366. dp_vertical_1;
  1367. u8 stream_id = mhdp->stream_id;
  1368. u32 bpp, bpc, pxlfmt, framer;
  1369. int ret;
  1370. pxlfmt = mhdp->display_fmt.color_format;
  1371. bpc = mhdp->display_fmt.bpc;
  1372. /*
  1373. * If YCBCR supported and stream not SD, use ITU709
  1374. * Need to handle ITU version with YCBCR420 when supported
  1375. */
  1376. if ((pxlfmt == DRM_COLOR_FORMAT_YCRCB444 ||
  1377. pxlfmt == DRM_COLOR_FORMAT_YCRCB422) && mode->crtc_vdisplay >= 720)
  1378. misc0 = DP_YCBCR_COEFFICIENTS_ITU709;
  1379. bpp = cdns_mhdp_get_bpp(&mhdp->display_fmt);
  1380. switch (pxlfmt) {
  1381. case DRM_COLOR_FORMAT_RGB444:
  1382. pxl_repr = CDNS_DP_FRAMER_RGB << CDNS_DP_FRAMER_PXL_FORMAT;
  1383. misc0 |= DP_COLOR_FORMAT_RGB;
  1384. break;
  1385. case DRM_COLOR_FORMAT_YCRCB444:
  1386. pxl_repr = CDNS_DP_FRAMER_YCBCR444 << CDNS_DP_FRAMER_PXL_FORMAT;
  1387. misc0 |= DP_COLOR_FORMAT_YCbCr444 | DP_TEST_DYNAMIC_RANGE_CEA;
  1388. break;
  1389. case DRM_COLOR_FORMAT_YCRCB422:
  1390. pxl_repr = CDNS_DP_FRAMER_YCBCR422 << CDNS_DP_FRAMER_PXL_FORMAT;
  1391. misc0 |= DP_COLOR_FORMAT_YCbCr422 | DP_TEST_DYNAMIC_RANGE_CEA;
  1392. break;
  1393. case DRM_COLOR_FORMAT_YCRCB420:
  1394. pxl_repr = CDNS_DP_FRAMER_YCBCR420 << CDNS_DP_FRAMER_PXL_FORMAT;
  1395. break;
  1396. default:
  1397. pxl_repr = CDNS_DP_FRAMER_Y_ONLY << CDNS_DP_FRAMER_PXL_FORMAT;
  1398. }
  1399. switch (bpc) {
  1400. case 6:
  1401. misc0 |= DP_TEST_BIT_DEPTH_6;
  1402. pxl_repr |= CDNS_DP_FRAMER_6_BPC;
  1403. break;
  1404. case 8:
  1405. misc0 |= DP_TEST_BIT_DEPTH_8;
  1406. pxl_repr |= CDNS_DP_FRAMER_8_BPC;
  1407. break;
  1408. case 10:
  1409. misc0 |= DP_TEST_BIT_DEPTH_10;
  1410. pxl_repr |= CDNS_DP_FRAMER_10_BPC;
  1411. break;
  1412. case 12:
  1413. misc0 |= DP_TEST_BIT_DEPTH_12;
  1414. pxl_repr |= CDNS_DP_FRAMER_12_BPC;
  1415. break;
  1416. case 16:
  1417. misc0 |= DP_TEST_BIT_DEPTH_16;
  1418. pxl_repr |= CDNS_DP_FRAMER_16_BPC;
  1419. break;
  1420. }
  1421. bnd_hsync2vsync = CDNS_IP_BYPASS_V_INTERFACE;
  1422. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  1423. bnd_hsync2vsync |= CDNS_IP_DET_INTERLACE_FORMAT;
  1424. cdns_mhdp_reg_write(mhdp, CDNS_BND_HSYNC2VSYNC(stream_id),
  1425. bnd_hsync2vsync);
  1426. hsync2vsync_pol_ctrl = 0;
  1427. if (mode->flags & DRM_MODE_FLAG_NHSYNC)
  1428. hsync2vsync_pol_ctrl |= CDNS_H2V_HSYNC_POL_ACTIVE_LOW;
  1429. if (mode->flags & DRM_MODE_FLAG_NVSYNC)
  1430. hsync2vsync_pol_ctrl |= CDNS_H2V_VSYNC_POL_ACTIVE_LOW;
  1431. cdns_mhdp_reg_write(mhdp, CDNS_HSYNC2VSYNC_POL_CTRL(stream_id),
  1432. hsync2vsync_pol_ctrl);
  1433. cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_PXL_REPR(stream_id), pxl_repr);
  1434. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  1435. dp_framer_sp |= CDNS_DP_FRAMER_INTERLACE;
  1436. if (mode->flags & DRM_MODE_FLAG_NHSYNC)
  1437. dp_framer_sp |= CDNS_DP_FRAMER_HSYNC_POL_LOW;
  1438. if (mode->flags & DRM_MODE_FLAG_NVSYNC)
  1439. dp_framer_sp |= CDNS_DP_FRAMER_VSYNC_POL_LOW;
  1440. cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_SP(stream_id), dp_framer_sp);
  1441. front_porch = mode->crtc_hsync_start - mode->crtc_hdisplay;
  1442. back_porch = mode->crtc_htotal - mode->crtc_hsync_end;
  1443. cdns_mhdp_reg_write(mhdp, CDNS_DP_FRONT_BACK_PORCH(stream_id),
  1444. CDNS_DP_FRONT_PORCH(front_porch) |
  1445. CDNS_DP_BACK_PORCH(back_porch));
  1446. cdns_mhdp_reg_write(mhdp, CDNS_DP_BYTE_COUNT(stream_id),
  1447. mode->crtc_hdisplay * bpp / 8);
  1448. msa_h0 = mode->crtc_htotal - mode->crtc_hsync_start;
  1449. cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_HORIZONTAL_0(stream_id),
  1450. CDNS_DP_MSAH0_H_TOTAL(mode->crtc_htotal) |
  1451. CDNS_DP_MSAH0_HSYNC_START(msa_h0));
  1452. hsync = mode->crtc_hsync_end - mode->crtc_hsync_start;
  1453. msa_horizontal_1 = CDNS_DP_MSAH1_HSYNC_WIDTH(hsync) |
  1454. CDNS_DP_MSAH1_HDISP_WIDTH(mode->crtc_hdisplay);
  1455. if (mode->flags & DRM_MODE_FLAG_NHSYNC)
  1456. msa_horizontal_1 |= CDNS_DP_MSAH1_HSYNC_POL_LOW;
  1457. cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_HORIZONTAL_1(stream_id),
  1458. msa_horizontal_1);
  1459. msa_v0 = mode->crtc_vtotal - mode->crtc_vsync_start;
  1460. cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_VERTICAL_0(stream_id),
  1461. CDNS_DP_MSAV0_V_TOTAL(mode->crtc_vtotal) |
  1462. CDNS_DP_MSAV0_VSYNC_START(msa_v0));
  1463. vsync = mode->crtc_vsync_end - mode->crtc_vsync_start;
  1464. msa_vertical_1 = CDNS_DP_MSAV1_VSYNC_WIDTH(vsync) |
  1465. CDNS_DP_MSAV1_VDISP_WIDTH(mode->crtc_vdisplay);
  1466. if (mode->flags & DRM_MODE_FLAG_NVSYNC)
  1467. msa_vertical_1 |= CDNS_DP_MSAV1_VSYNC_POL_LOW;
  1468. cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_VERTICAL_1(stream_id),
  1469. msa_vertical_1);
  1470. if ((mode->flags & DRM_MODE_FLAG_INTERLACE) &&
  1471. mode->crtc_vtotal % 2 == 0)
  1472. misc1 = DP_TEST_INTERLACED;
  1473. if (mhdp->display_fmt.y_only)
  1474. misc1 |= CDNS_DP_TEST_COLOR_FORMAT_RAW_Y_ONLY;
  1475. /* Use VSC SDP for Y420 */
  1476. if (pxlfmt == DRM_COLOR_FORMAT_YCRCB420)
  1477. misc1 = CDNS_DP_TEST_VSC_SDP;
  1478. cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_MISC(stream_id),
  1479. misc0 | (misc1 << 8));
  1480. cdns_mhdp_reg_write(mhdp, CDNS_DP_HORIZONTAL(stream_id),
  1481. CDNS_DP_H_HSYNC_WIDTH(hsync) |
  1482. CDNS_DP_H_H_TOTAL(mode->crtc_hdisplay));
  1483. cdns_mhdp_reg_write(mhdp, CDNS_DP_VERTICAL_0(stream_id),
  1484. CDNS_DP_V0_VHEIGHT(mode->crtc_vdisplay) |
  1485. CDNS_DP_V0_VSTART(msa_v0));
  1486. dp_vertical_1 = CDNS_DP_V1_VTOTAL(mode->crtc_vtotal);
  1487. if ((mode->flags & DRM_MODE_FLAG_INTERLACE) &&
  1488. mode->crtc_vtotal % 2 == 0)
  1489. dp_vertical_1 |= CDNS_DP_V1_VTOTAL_EVEN;
  1490. cdns_mhdp_reg_write(mhdp, CDNS_DP_VERTICAL_1(stream_id), dp_vertical_1);
  1491. cdns_mhdp_reg_write_bit(mhdp, CDNS_DP_VB_ID(stream_id), 2, 1,
  1492. (mode->flags & DRM_MODE_FLAG_INTERLACE) ?
  1493. CDNS_DP_VB_ID_INTERLACED : 0);
  1494. ret = cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, &framer);
  1495. if (ret < 0) {
  1496. dev_err(mhdp->dev,
  1497. "Failed to read CDNS_DP_FRAMER_GLOBAL_CONFIG %d\n",
  1498. ret);
  1499. return;
  1500. }
  1501. framer |= CDNS_DP_FRAMER_EN;
  1502. framer &= ~CDNS_DP_NO_VIDEO_MODE;
  1503. cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, framer);
  1504. }
  1505. static void cdns_mhdp_sst_enable(struct cdns_mhdp_device *mhdp,
  1506. const struct drm_display_mode *mode)
  1507. {
  1508. u32 rate, vs, required_bandwidth, available_bandwidth;
  1509. s32 line_thresh1, line_thresh2, line_thresh = 0;
  1510. int pxlclock = mode->crtc_clock;
  1511. u32 tu_size = 64;
  1512. u32 bpp;
  1513. /* Get rate in MSymbols per second per lane */
  1514. rate = mhdp->link.rate / 1000;
  1515. bpp = cdns_mhdp_get_bpp(&mhdp->display_fmt);
  1516. required_bandwidth = pxlclock * bpp / 8;
  1517. available_bandwidth = mhdp->link.num_lanes * rate;
  1518. vs = tu_size * required_bandwidth / available_bandwidth;
  1519. vs /= 1000;
  1520. if (vs == tu_size)
  1521. vs = tu_size - 1;
  1522. line_thresh1 = ((vs + 1) << 5) * 8 / bpp;
  1523. line_thresh2 = (pxlclock << 5) / 1000 / rate * (vs + 1) - (1 << 5);
  1524. line_thresh = line_thresh1 - line_thresh2 / (s32)mhdp->link.num_lanes;
  1525. line_thresh = (line_thresh >> 5) + 2;
  1526. mhdp->stream_id = 0;
  1527. cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_TU,
  1528. CDNS_DP_FRAMER_TU_VS(vs) |
  1529. CDNS_DP_FRAMER_TU_SIZE(tu_size) |
  1530. CDNS_DP_FRAMER_TU_CNT_RST_EN);
  1531. cdns_mhdp_reg_write(mhdp, CDNS_DP_LINE_THRESH(0),
  1532. line_thresh & GENMASK(5, 0));
  1533. cdns_mhdp_reg_write(mhdp, CDNS_DP_STREAM_CONFIG_2(0),
  1534. CDNS_DP_SC2_TU_VS_DIFF((tu_size - vs > 3) ?
  1535. 0 : tu_size - vs));
  1536. cdns_mhdp_configure_video(mhdp, mode);
  1537. }
  1538. static void cdns_mhdp_atomic_enable(struct drm_bridge *bridge,
  1539. struct drm_bridge_state *bridge_state)
  1540. {
  1541. struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
  1542. struct drm_atomic_state *state = bridge_state->base.state;
  1543. struct cdns_mhdp_bridge_state *mhdp_state;
  1544. struct drm_crtc_state *crtc_state;
  1545. struct drm_connector *connector;
  1546. struct drm_connector_state *conn_state;
  1547. struct drm_bridge_state *new_state;
  1548. const struct drm_display_mode *mode;
  1549. u32 resp;
  1550. int ret;
  1551. dev_dbg(mhdp->dev, "bridge enable\n");
  1552. mutex_lock(&mhdp->link_mutex);
  1553. if (mhdp->plugged && !mhdp->link_up) {
  1554. ret = cdns_mhdp_link_up(mhdp);
  1555. if (ret < 0)
  1556. goto out;
  1557. }
  1558. if (mhdp->info && mhdp->info->ops && mhdp->info->ops->enable)
  1559. mhdp->info->ops->enable(mhdp);
  1560. /* Enable VIF clock for stream 0 */
  1561. ret = cdns_mhdp_reg_read(mhdp, CDNS_DPTX_CAR, &resp);
  1562. if (ret < 0) {
  1563. dev_err(mhdp->dev, "Failed to read CDNS_DPTX_CAR %d\n", ret);
  1564. goto out;
  1565. }
  1566. cdns_mhdp_reg_write(mhdp, CDNS_DPTX_CAR,
  1567. resp | CDNS_VIF_CLK_EN | CDNS_VIF_CLK_RSTN);
  1568. connector = drm_atomic_get_new_connector_for_encoder(state,
  1569. bridge->encoder);
  1570. if (WARN_ON(!connector))
  1571. goto out;
  1572. conn_state = drm_atomic_get_new_connector_state(state, connector);
  1573. if (WARN_ON(!conn_state))
  1574. goto out;
  1575. crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
  1576. if (WARN_ON(!crtc_state))
  1577. goto out;
  1578. mode = &crtc_state->adjusted_mode;
  1579. new_state = drm_atomic_get_new_bridge_state(state, bridge);
  1580. if (WARN_ON(!new_state))
  1581. goto out;
  1582. if (!cdns_mhdp_bandwidth_ok(mhdp, mode, mhdp->link.num_lanes,
  1583. mhdp->link.rate)) {
  1584. ret = -EINVAL;
  1585. goto out;
  1586. }
  1587. cdns_mhdp_sst_enable(mhdp, mode);
  1588. mhdp_state = to_cdns_mhdp_bridge_state(new_state);
  1589. mhdp_state->current_mode = drm_mode_duplicate(bridge->dev, mode);
  1590. drm_mode_set_name(mhdp_state->current_mode);
  1591. dev_dbg(mhdp->dev, "%s: Enabling mode %s\n", __func__, mode->name);
  1592. mhdp->bridge_enabled = true;
  1593. out:
  1594. mutex_unlock(&mhdp->link_mutex);
  1595. if (ret < 0)
  1596. schedule_work(&mhdp->modeset_retry_work);
  1597. }
  1598. static void cdns_mhdp_atomic_disable(struct drm_bridge *bridge,
  1599. struct drm_bridge_state *bridge_state)
  1600. {
  1601. struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
  1602. u32 resp;
  1603. dev_dbg(mhdp->dev, "%s\n", __func__);
  1604. mutex_lock(&mhdp->link_mutex);
  1605. mhdp->bridge_enabled = false;
  1606. cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, &resp);
  1607. resp &= ~CDNS_DP_FRAMER_EN;
  1608. resp |= CDNS_DP_NO_VIDEO_MODE;
  1609. cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, resp);
  1610. cdns_mhdp_link_down(mhdp);
  1611. /* Disable VIF clock for stream 0 */
  1612. cdns_mhdp_reg_read(mhdp, CDNS_DPTX_CAR, &resp);
  1613. cdns_mhdp_reg_write(mhdp, CDNS_DPTX_CAR,
  1614. resp & ~(CDNS_VIF_CLK_EN | CDNS_VIF_CLK_RSTN));
  1615. if (mhdp->info && mhdp->info->ops && mhdp->info->ops->disable)
  1616. mhdp->info->ops->disable(mhdp);
  1617. mutex_unlock(&mhdp->link_mutex);
  1618. }
  1619. static void cdns_mhdp_detach(struct drm_bridge *bridge)
  1620. {
  1621. struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
  1622. dev_dbg(mhdp->dev, "%s\n", __func__);
  1623. spin_lock(&mhdp->start_lock);
  1624. mhdp->bridge_attached = false;
  1625. spin_unlock(&mhdp->start_lock);
  1626. writel(~0, mhdp->regs + CDNS_APB_INT_MASK);
  1627. }
  1628. static struct drm_bridge_state *
  1629. cdns_mhdp_bridge_atomic_duplicate_state(struct drm_bridge *bridge)
  1630. {
  1631. struct cdns_mhdp_bridge_state *state;
  1632. state = kzalloc(sizeof(*state), GFP_KERNEL);
  1633. if (!state)
  1634. return NULL;
  1635. __drm_atomic_helper_bridge_duplicate_state(bridge, &state->base);
  1636. return &state->base;
  1637. }
  1638. static void
  1639. cdns_mhdp_bridge_atomic_destroy_state(struct drm_bridge *bridge,
  1640. struct drm_bridge_state *state)
  1641. {
  1642. struct cdns_mhdp_bridge_state *cdns_mhdp_state;
  1643. cdns_mhdp_state = to_cdns_mhdp_bridge_state(state);
  1644. if (cdns_mhdp_state->current_mode) {
  1645. drm_mode_destroy(bridge->dev, cdns_mhdp_state->current_mode);
  1646. cdns_mhdp_state->current_mode = NULL;
  1647. }
  1648. kfree(cdns_mhdp_state);
  1649. }
  1650. static struct drm_bridge_state *
  1651. cdns_mhdp_bridge_atomic_reset(struct drm_bridge *bridge)
  1652. {
  1653. struct cdns_mhdp_bridge_state *cdns_mhdp_state;
  1654. cdns_mhdp_state = kzalloc(sizeof(*cdns_mhdp_state), GFP_KERNEL);
  1655. if (!cdns_mhdp_state)
  1656. return NULL;
  1657. __drm_atomic_helper_bridge_reset(bridge, &cdns_mhdp_state->base);
  1658. return &cdns_mhdp_state->base;
  1659. }
  1660. static int cdns_mhdp_atomic_check(struct drm_bridge *bridge,
  1661. struct drm_bridge_state *bridge_state,
  1662. struct drm_crtc_state *crtc_state,
  1663. struct drm_connector_state *conn_state)
  1664. {
  1665. struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
  1666. const struct drm_display_mode *mode = &crtc_state->adjusted_mode;
  1667. mutex_lock(&mhdp->link_mutex);
  1668. if (!cdns_mhdp_bandwidth_ok(mhdp, mode, mhdp->link.num_lanes,
  1669. mhdp->link.rate)) {
  1670. dev_err(mhdp->dev, "%s: Not enough BW for %s (%u lanes at %u Mbps)\n",
  1671. __func__, mode->name, mhdp->link.num_lanes,
  1672. mhdp->link.rate / 100);
  1673. mutex_unlock(&mhdp->link_mutex);
  1674. return -EINVAL;
  1675. }
  1676. mutex_unlock(&mhdp->link_mutex);
  1677. return 0;
  1678. }
  1679. static enum drm_connector_status cdns_mhdp_bridge_detect(struct drm_bridge *bridge)
  1680. {
  1681. struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
  1682. return cdns_mhdp_detect(mhdp);
  1683. }
  1684. static struct edid *cdns_mhdp_bridge_get_edid(struct drm_bridge *bridge,
  1685. struct drm_connector *connector)
  1686. {
  1687. struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
  1688. return cdns_mhdp_get_edid(mhdp, connector);
  1689. }
  1690. static void cdns_mhdp_bridge_hpd_enable(struct drm_bridge *bridge)
  1691. {
  1692. struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
  1693. /* Enable SW event interrupts */
  1694. if (mhdp->bridge_attached)
  1695. writel(~(u32)CDNS_APB_INT_MASK_SW_EVENT_INT,
  1696. mhdp->regs + CDNS_APB_INT_MASK);
  1697. }
  1698. static void cdns_mhdp_bridge_hpd_disable(struct drm_bridge *bridge)
  1699. {
  1700. struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
  1701. writel(CDNS_APB_INT_MASK_SW_EVENT_INT, mhdp->regs + CDNS_APB_INT_MASK);
  1702. }
  1703. static const struct drm_bridge_funcs cdns_mhdp_bridge_funcs = {
  1704. .atomic_enable = cdns_mhdp_atomic_enable,
  1705. .atomic_disable = cdns_mhdp_atomic_disable,
  1706. .atomic_check = cdns_mhdp_atomic_check,
  1707. .attach = cdns_mhdp_attach,
  1708. .detach = cdns_mhdp_detach,
  1709. .atomic_duplicate_state = cdns_mhdp_bridge_atomic_duplicate_state,
  1710. .atomic_destroy_state = cdns_mhdp_bridge_atomic_destroy_state,
  1711. .atomic_reset = cdns_mhdp_bridge_atomic_reset,
  1712. .detect = cdns_mhdp_bridge_detect,
  1713. .get_edid = cdns_mhdp_bridge_get_edid,
  1714. .hpd_enable = cdns_mhdp_bridge_hpd_enable,
  1715. .hpd_disable = cdns_mhdp_bridge_hpd_disable,
  1716. };
  1717. static bool cdns_mhdp_detect_hpd(struct cdns_mhdp_device *mhdp, bool *hpd_pulse)
  1718. {
  1719. int hpd_event, hpd_status;
  1720. *hpd_pulse = false;
  1721. hpd_event = cdns_mhdp_read_hpd_event(mhdp);
  1722. /* Getting event bits failed, bail out */
  1723. if (hpd_event < 0) {
  1724. dev_warn(mhdp->dev, "%s: read event failed: %d\n",
  1725. __func__, hpd_event);
  1726. return false;
  1727. }
  1728. hpd_status = cdns_mhdp_get_hpd_status(mhdp);
  1729. if (hpd_status < 0) {
  1730. dev_warn(mhdp->dev, "%s: get hpd status failed: %d\n",
  1731. __func__, hpd_status);
  1732. return false;
  1733. }
  1734. if (hpd_event & DPTX_READ_EVENT_HPD_PULSE)
  1735. *hpd_pulse = true;
  1736. return !!hpd_status;
  1737. }
  1738. static int cdns_mhdp_update_link_status(struct cdns_mhdp_device *mhdp)
  1739. {
  1740. struct cdns_mhdp_bridge_state *cdns_bridge_state;
  1741. struct drm_display_mode *current_mode;
  1742. bool old_plugged = mhdp->plugged;
  1743. struct drm_bridge_state *state;
  1744. u8 status[DP_LINK_STATUS_SIZE];
  1745. bool hpd_pulse;
  1746. int ret = 0;
  1747. mutex_lock(&mhdp->link_mutex);
  1748. mhdp->plugged = cdns_mhdp_detect_hpd(mhdp, &hpd_pulse);
  1749. if (!mhdp->plugged) {
  1750. cdns_mhdp_link_down(mhdp);
  1751. mhdp->link.rate = mhdp->host.link_rate;
  1752. mhdp->link.num_lanes = mhdp->host.lanes_cnt;
  1753. goto out;
  1754. }
  1755. /*
  1756. * If we get a HPD pulse event and we were and still are connected,
  1757. * check the link status. If link status is ok, there's nothing to do
  1758. * as we don't handle DP interrupts. If link status is bad, continue
  1759. * with full link setup.
  1760. */
  1761. if (hpd_pulse && old_plugged == mhdp->plugged) {
  1762. ret = drm_dp_dpcd_read_link_status(&mhdp->aux, status);
  1763. /*
  1764. * If everything looks fine, just return, as we don't handle
  1765. * DP IRQs.
  1766. */
  1767. if (ret > 0 &&
  1768. drm_dp_channel_eq_ok(status, mhdp->link.num_lanes) &&
  1769. drm_dp_clock_recovery_ok(status, mhdp->link.num_lanes))
  1770. goto out;
  1771. /* If link is bad, mark link as down so that we do a new LT */
  1772. mhdp->link_up = false;
  1773. }
  1774. if (!mhdp->link_up) {
  1775. ret = cdns_mhdp_link_up(mhdp);
  1776. if (ret < 0)
  1777. goto out;
  1778. }
  1779. if (mhdp->bridge_enabled) {
  1780. state = drm_priv_to_bridge_state(mhdp->bridge.base.state);
  1781. if (!state) {
  1782. ret = -EINVAL;
  1783. goto out;
  1784. }
  1785. cdns_bridge_state = to_cdns_mhdp_bridge_state(state);
  1786. if (!cdns_bridge_state) {
  1787. ret = -EINVAL;
  1788. goto out;
  1789. }
  1790. current_mode = cdns_bridge_state->current_mode;
  1791. if (!current_mode) {
  1792. ret = -EINVAL;
  1793. goto out;
  1794. }
  1795. if (!cdns_mhdp_bandwidth_ok(mhdp, current_mode, mhdp->link.num_lanes,
  1796. mhdp->link.rate)) {
  1797. ret = -EINVAL;
  1798. goto out;
  1799. }
  1800. dev_dbg(mhdp->dev, "%s: Enabling mode %s\n", __func__,
  1801. current_mode->name);
  1802. cdns_mhdp_sst_enable(mhdp, current_mode);
  1803. }
  1804. out:
  1805. mutex_unlock(&mhdp->link_mutex);
  1806. return ret;
  1807. }
  1808. static void cdns_mhdp_modeset_retry_fn(struct work_struct *work)
  1809. {
  1810. struct cdns_mhdp_device *mhdp;
  1811. struct drm_connector *conn;
  1812. mhdp = container_of(work, typeof(*mhdp), modeset_retry_work);
  1813. conn = &mhdp->connector;
  1814. /* Grab the locks before changing connector property */
  1815. mutex_lock(&conn->dev->mode_config.mutex);
  1816. /*
  1817. * Set connector link status to BAD and send a Uevent to notify
  1818. * userspace to do a modeset.
  1819. */
  1820. drm_connector_set_link_status_property(conn, DRM_MODE_LINK_STATUS_BAD);
  1821. mutex_unlock(&conn->dev->mode_config.mutex);
  1822. /* Send Hotplug uevent so userspace can reprobe */
  1823. drm_kms_helper_hotplug_event(mhdp->bridge.dev);
  1824. }
  1825. static irqreturn_t cdns_mhdp_irq_handler(int irq, void *data)
  1826. {
  1827. struct cdns_mhdp_device *mhdp = data;
  1828. u32 apb_stat, sw_ev0;
  1829. bool bridge_attached;
  1830. int ret;
  1831. apb_stat = readl(mhdp->regs + CDNS_APB_INT_STATUS);
  1832. if (!(apb_stat & CDNS_APB_INT_MASK_SW_EVENT_INT))
  1833. return IRQ_NONE;
  1834. sw_ev0 = readl(mhdp->regs + CDNS_SW_EVENT0);
  1835. /*
  1836. * Calling drm_kms_helper_hotplug_event() when not attached
  1837. * to drm device causes an oops because the drm_bridge->dev
  1838. * is NULL. See cdns_mhdp_fw_cb() comments for details about the
  1839. * problems related drm_kms_helper_hotplug_event() call.
  1840. */
  1841. spin_lock(&mhdp->start_lock);
  1842. bridge_attached = mhdp->bridge_attached;
  1843. spin_unlock(&mhdp->start_lock);
  1844. if (bridge_attached && (sw_ev0 & CDNS_DPTX_HPD)) {
  1845. ret = cdns_mhdp_update_link_status(mhdp);
  1846. if (mhdp->connector.dev) {
  1847. if (ret < 0)
  1848. schedule_work(&mhdp->modeset_retry_work);
  1849. else
  1850. drm_kms_helper_hotplug_event(mhdp->bridge.dev);
  1851. } else {
  1852. drm_bridge_hpd_notify(&mhdp->bridge, cdns_mhdp_detect(mhdp));
  1853. }
  1854. }
  1855. return IRQ_HANDLED;
  1856. }
  1857. static int cdns_mhdp_probe(struct platform_device *pdev)
  1858. {
  1859. struct device *dev = &pdev->dev;
  1860. struct cdns_mhdp_device *mhdp;
  1861. unsigned long rate;
  1862. struct clk *clk;
  1863. int ret;
  1864. int irq;
  1865. mhdp = devm_kzalloc(dev, sizeof(*mhdp), GFP_KERNEL);
  1866. if (!mhdp)
  1867. return -ENOMEM;
  1868. clk = devm_clk_get(dev, NULL);
  1869. if (IS_ERR(clk)) {
  1870. dev_err(dev, "couldn't get clk: %ld\n", PTR_ERR(clk));
  1871. return PTR_ERR(clk);
  1872. }
  1873. mhdp->clk = clk;
  1874. mhdp->dev = dev;
  1875. mutex_init(&mhdp->mbox_mutex);
  1876. mutex_init(&mhdp->link_mutex);
  1877. spin_lock_init(&mhdp->start_lock);
  1878. drm_dp_aux_init(&mhdp->aux);
  1879. mhdp->aux.dev = dev;
  1880. mhdp->aux.transfer = cdns_mhdp_transfer;
  1881. mhdp->regs = devm_platform_ioremap_resource(pdev, 0);
  1882. if (IS_ERR(mhdp->regs)) {
  1883. dev_err(dev, "Failed to get memory resource\n");
  1884. return PTR_ERR(mhdp->regs);
  1885. }
  1886. mhdp->phy = devm_of_phy_get_by_index(dev, pdev->dev.of_node, 0);
  1887. if (IS_ERR(mhdp->phy)) {
  1888. dev_err(dev, "no PHY configured\n");
  1889. return PTR_ERR(mhdp->phy);
  1890. }
  1891. platform_set_drvdata(pdev, mhdp);
  1892. mhdp->info = of_device_get_match_data(dev);
  1893. clk_prepare_enable(clk);
  1894. pm_runtime_enable(dev);
  1895. ret = pm_runtime_resume_and_get(dev);
  1896. if (ret < 0) {
  1897. dev_err(dev, "pm_runtime_resume_and_get failed\n");
  1898. pm_runtime_disable(dev);
  1899. goto clk_disable;
  1900. }
  1901. if (mhdp->info && mhdp->info->ops && mhdp->info->ops->init) {
  1902. ret = mhdp->info->ops->init(mhdp);
  1903. if (ret != 0) {
  1904. dev_err(dev, "MHDP platform initialization failed: %d\n",
  1905. ret);
  1906. goto runtime_put;
  1907. }
  1908. }
  1909. rate = clk_get_rate(clk);
  1910. writel(rate % 1000000, mhdp->regs + CDNS_SW_CLK_L);
  1911. writel(rate / 1000000, mhdp->regs + CDNS_SW_CLK_H);
  1912. dev_dbg(dev, "func clk rate %lu Hz\n", rate);
  1913. writel(~0, mhdp->regs + CDNS_APB_INT_MASK);
  1914. irq = platform_get_irq(pdev, 0);
  1915. ret = devm_request_threaded_irq(mhdp->dev, irq, NULL,
  1916. cdns_mhdp_irq_handler, IRQF_ONESHOT,
  1917. "mhdp8546", mhdp);
  1918. if (ret) {
  1919. dev_err(dev, "cannot install IRQ %d\n", irq);
  1920. ret = -EIO;
  1921. goto plat_fini;
  1922. }
  1923. cdns_mhdp_fill_host_caps(mhdp);
  1924. /* Initialize link rate and num of lanes to host values */
  1925. mhdp->link.rate = mhdp->host.link_rate;
  1926. mhdp->link.num_lanes = mhdp->host.lanes_cnt;
  1927. /* The only currently supported format */
  1928. mhdp->display_fmt.y_only = false;
  1929. mhdp->display_fmt.color_format = DRM_COLOR_FORMAT_RGB444;
  1930. mhdp->display_fmt.bpc = 8;
  1931. mhdp->bridge.of_node = pdev->dev.of_node;
  1932. mhdp->bridge.funcs = &cdns_mhdp_bridge_funcs;
  1933. mhdp->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID |
  1934. DRM_BRIDGE_OP_HPD;
  1935. mhdp->bridge.type = DRM_MODE_CONNECTOR_DisplayPort;
  1936. if (mhdp->info)
  1937. mhdp->bridge.timings = mhdp->info->timings;
  1938. ret = phy_init(mhdp->phy);
  1939. if (ret) {
  1940. dev_err(mhdp->dev, "Failed to initialize PHY: %d\n", ret);
  1941. goto plat_fini;
  1942. }
  1943. /* Initialize the work for modeset in case of link train failure */
  1944. INIT_WORK(&mhdp->modeset_retry_work, cdns_mhdp_modeset_retry_fn);
  1945. init_waitqueue_head(&mhdp->fw_load_wq);
  1946. ret = cdns_mhdp_load_firmware(mhdp);
  1947. if (ret)
  1948. goto phy_exit;
  1949. drm_bridge_add(&mhdp->bridge);
  1950. return 0;
  1951. phy_exit:
  1952. phy_exit(mhdp->phy);
  1953. plat_fini:
  1954. if (mhdp->info && mhdp->info->ops && mhdp->info->ops->exit)
  1955. mhdp->info->ops->exit(mhdp);
  1956. runtime_put:
  1957. pm_runtime_put_sync(dev);
  1958. pm_runtime_disable(dev);
  1959. clk_disable:
  1960. clk_disable_unprepare(mhdp->clk);
  1961. return ret;
  1962. }
  1963. static int cdns_mhdp_remove(struct platform_device *pdev)
  1964. {
  1965. struct cdns_mhdp_device *mhdp = dev_get_drvdata(&pdev->dev);
  1966. unsigned long timeout = msecs_to_jiffies(100);
  1967. bool stop_fw = false;
  1968. int ret;
  1969. drm_bridge_remove(&mhdp->bridge);
  1970. ret = wait_event_timeout(mhdp->fw_load_wq,
  1971. mhdp->hw_state == MHDP_HW_READY,
  1972. timeout);
  1973. if (ret == 0)
  1974. dev_err(mhdp->dev, "%s: Timeout waiting for fw loading\n",
  1975. __func__);
  1976. else
  1977. stop_fw = true;
  1978. spin_lock(&mhdp->start_lock);
  1979. mhdp->hw_state = MHDP_HW_STOPPED;
  1980. spin_unlock(&mhdp->start_lock);
  1981. if (stop_fw)
  1982. ret = cdns_mhdp_set_firmware_active(mhdp, false);
  1983. phy_exit(mhdp->phy);
  1984. if (mhdp->info && mhdp->info->ops && mhdp->info->ops->exit)
  1985. mhdp->info->ops->exit(mhdp);
  1986. pm_runtime_put_sync(&pdev->dev);
  1987. pm_runtime_disable(&pdev->dev);
  1988. cancel_work_sync(&mhdp->modeset_retry_work);
  1989. flush_scheduled_work();
  1990. clk_disable_unprepare(mhdp->clk);
  1991. return ret;
  1992. }
  1993. static const struct of_device_id mhdp_ids[] = {
  1994. { .compatible = "cdns,mhdp8546", },
  1995. #ifdef CONFIG_DRM_CDNS_MHDP8546_J721E
  1996. { .compatible = "ti,j721e-mhdp8546",
  1997. .data = &(const struct cdns_mhdp_platform_info) {
  1998. .timings = &mhdp_ti_j721e_bridge_timings,
  1999. .ops = &mhdp_ti_j721e_ops,
  2000. },
  2001. },
  2002. #endif
  2003. { /* sentinel */ }
  2004. };
  2005. MODULE_DEVICE_TABLE(of, mhdp_ids);
  2006. static struct platform_driver mhdp_driver = {
  2007. .driver = {
  2008. .name = "cdns-mhdp8546",
  2009. .of_match_table = of_match_ptr(mhdp_ids),
  2010. },
  2011. .probe = cdns_mhdp_probe,
  2012. .remove = cdns_mhdp_remove,
  2013. };
  2014. module_platform_driver(mhdp_driver);
  2015. MODULE_FIRMWARE(FW_NAME);
  2016. MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
  2017. MODULE_AUTHOR("Swapnil Jakhade <sjakhade@cadence.com>");
  2018. MODULE_AUTHOR("Yuti Amonkar <yamonkar@cadence.com>");
  2019. MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>");
  2020. MODULE_AUTHOR("Jyri Sarha <jsarha@ti.com>");
  2021. MODULE_DESCRIPTION("Cadence MHDP8546 DP bridge driver");
  2022. MODULE_LICENSE("GPL");
  2023. MODULE_ALIAS("platform:cdns-mhdp8546");