analogix-anx6345.c 20 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright(c) 2016, Analogix Semiconductor.
  4. * Copyright(c) 2017, Icenowy Zheng <icenowy@aosc.io>
  5. *
  6. * Based on anx7808 driver obtained from chromeos with copyright:
  7. * Copyright(c) 2013, Google Inc.
  8. */
  9. #include <linux/delay.h>
  10. #include <linux/err.h>
  11. #include <linux/gpio/consumer.h>
  12. #include <linux/i2c.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/of_platform.h>
  17. #include <linux/regmap.h>
  18. #include <linux/regulator/consumer.h>
  19. #include <linux/types.h>
  20. #include <drm/drm_atomic_helper.h>
  21. #include <drm/drm_bridge.h>
  22. #include <drm/drm_crtc.h>
  23. #include <drm/drm_crtc_helper.h>
  24. #include <drm/drm_dp_helper.h>
  25. #include <drm/drm_edid.h>
  26. #include <drm/drm_of.h>
  27. #include <drm/drm_panel.h>
  28. #include <drm/drm_print.h>
  29. #include <drm/drm_probe_helper.h>
  30. #include "analogix-i2c-dptx.h"
  31. #include "analogix-i2c-txcommon.h"
  32. #define POLL_DELAY 50000 /* us */
  33. #define POLL_TIMEOUT 5000000 /* us */
  34. #define I2C_IDX_DPTX 0
  35. #define I2C_IDX_TXCOM 1
  36. static const u8 anx6345_i2c_addresses[] = {
  37. [I2C_IDX_DPTX] = 0x70,
  38. [I2C_IDX_TXCOM] = 0x72,
  39. };
  40. #define I2C_NUM_ADDRESSES ARRAY_SIZE(anx6345_i2c_addresses)
  41. struct anx6345 {
  42. struct drm_dp_aux aux;
  43. struct drm_bridge bridge;
  44. struct i2c_client *client;
  45. struct edid *edid;
  46. struct drm_connector connector;
  47. struct drm_panel *panel;
  48. struct regulator *dvdd12;
  49. struct regulator *dvdd25;
  50. struct gpio_desc *gpiod_reset;
  51. struct mutex lock; /* protect EDID access */
  52. /* I2C Slave addresses of ANX6345 are mapped as DPTX and SYS */
  53. struct i2c_client *i2c_clients[I2C_NUM_ADDRESSES];
  54. struct regmap *map[I2C_NUM_ADDRESSES];
  55. u16 chipid;
  56. u8 dpcd[DP_RECEIVER_CAP_SIZE];
  57. bool powered;
  58. };
  59. static inline struct anx6345 *connector_to_anx6345(struct drm_connector *c)
  60. {
  61. return container_of(c, struct anx6345, connector);
  62. }
  63. static inline struct anx6345 *bridge_to_anx6345(struct drm_bridge *bridge)
  64. {
  65. return container_of(bridge, struct anx6345, bridge);
  66. }
  67. static int anx6345_set_bits(struct regmap *map, u8 reg, u8 mask)
  68. {
  69. return regmap_update_bits(map, reg, mask, mask);
  70. }
  71. static int anx6345_clear_bits(struct regmap *map, u8 reg, u8 mask)
  72. {
  73. return regmap_update_bits(map, reg, mask, 0);
  74. }
  75. static ssize_t anx6345_aux_transfer(struct drm_dp_aux *aux,
  76. struct drm_dp_aux_msg *msg)
  77. {
  78. struct anx6345 *anx6345 = container_of(aux, struct anx6345, aux);
  79. return anx_dp_aux_transfer(anx6345->map[I2C_IDX_DPTX], msg);
  80. }
  81. static int anx6345_dp_link_training(struct anx6345 *anx6345)
  82. {
  83. unsigned int value;
  84. u8 dp_bw, dpcd[2];
  85. int err;
  86. err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM],
  87. SP_POWERDOWN_CTRL_REG,
  88. SP_TOTAL_PD);
  89. if (err)
  90. return err;
  91. err = drm_dp_dpcd_readb(&anx6345->aux, DP_MAX_LINK_RATE, &dp_bw);
  92. if (err < 0)
  93. return err;
  94. switch (dp_bw) {
  95. case DP_LINK_BW_1_62:
  96. case DP_LINK_BW_2_7:
  97. break;
  98. default:
  99. DRM_DEBUG_KMS("DP bandwidth (%#02x) not supported\n", dp_bw);
  100. return -EINVAL;
  101. }
  102. err = anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL1_REG,
  103. SP_VIDEO_MUTE);
  104. if (err)
  105. return err;
  106. err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM],
  107. SP_VID_CTRL1_REG, SP_VIDEO_EN);
  108. if (err)
  109. return err;
  110. /* Get DPCD info */
  111. err = drm_dp_dpcd_read(&anx6345->aux, DP_DPCD_REV,
  112. &anx6345->dpcd, DP_RECEIVER_CAP_SIZE);
  113. if (err < 0) {
  114. DRM_ERROR("Failed to read DPCD: %d\n", err);
  115. return err;
  116. }
  117. /* Clear channel x SERDES power down */
  118. err = anx6345_clear_bits(anx6345->map[I2C_IDX_DPTX],
  119. SP_DP_ANALOG_POWER_DOWN_REG, SP_CH0_PD);
  120. if (err)
  121. return err;
  122. /*
  123. * Power up the sink (DP_SET_POWER register is only available on DPCD
  124. * v1.1 and later).
  125. */
  126. if (anx6345->dpcd[DP_DPCD_REV] >= 0x11) {
  127. err = drm_dp_dpcd_readb(&anx6345->aux, DP_SET_POWER, &dpcd[0]);
  128. if (err < 0) {
  129. DRM_ERROR("Failed to read DP_SET_POWER register: %d\n",
  130. err);
  131. return err;
  132. }
  133. dpcd[0] &= ~DP_SET_POWER_MASK;
  134. dpcd[0] |= DP_SET_POWER_D0;
  135. err = drm_dp_dpcd_writeb(&anx6345->aux, DP_SET_POWER, dpcd[0]);
  136. if (err < 0) {
  137. DRM_ERROR("Failed to power up DisplayPort link: %d\n",
  138. err);
  139. return err;
  140. }
  141. /*
  142. * According to the DP 1.1 specification, a "Sink Device must
  143. * exit the power saving state within 1 ms" (Section 2.5.3.1,
  144. * Table 5-52, "Sink Control Field" (register 0x600).
  145. */
  146. usleep_range(1000, 2000);
  147. }
  148. /* Possibly enable downspread on the sink */
  149. err = regmap_write(anx6345->map[I2C_IDX_DPTX],
  150. SP_DP_DOWNSPREAD_CTRL1_REG, 0);
  151. if (err)
  152. return err;
  153. if (anx6345->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5) {
  154. DRM_DEBUG("Enable downspread on the sink\n");
  155. /* 4000PPM */
  156. err = regmap_write(anx6345->map[I2C_IDX_DPTX],
  157. SP_DP_DOWNSPREAD_CTRL1_REG, 8);
  158. if (err)
  159. return err;
  160. err = drm_dp_dpcd_writeb(&anx6345->aux, DP_DOWNSPREAD_CTRL,
  161. DP_SPREAD_AMP_0_5);
  162. if (err < 0)
  163. return err;
  164. } else {
  165. err = drm_dp_dpcd_writeb(&anx6345->aux, DP_DOWNSPREAD_CTRL, 0);
  166. if (err < 0)
  167. return err;
  168. }
  169. /* Set the lane count and the link rate on the sink */
  170. if (drm_dp_enhanced_frame_cap(anx6345->dpcd))
  171. err = anx6345_set_bits(anx6345->map[I2C_IDX_DPTX],
  172. SP_DP_SYSTEM_CTRL_BASE + 4,
  173. SP_ENHANCED_MODE);
  174. else
  175. err = anx6345_clear_bits(anx6345->map[I2C_IDX_DPTX],
  176. SP_DP_SYSTEM_CTRL_BASE + 4,
  177. SP_ENHANCED_MODE);
  178. if (err)
  179. return err;
  180. dpcd[0] = dp_bw;
  181. err = regmap_write(anx6345->map[I2C_IDX_DPTX],
  182. SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
  183. if (err)
  184. return err;
  185. dpcd[1] = drm_dp_max_lane_count(anx6345->dpcd);
  186. err = regmap_write(anx6345->map[I2C_IDX_DPTX],
  187. SP_DP_LANE_COUNT_SET_REG, dpcd[1]);
  188. if (err)
  189. return err;
  190. if (drm_dp_enhanced_frame_cap(anx6345->dpcd))
  191. dpcd[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
  192. err = drm_dp_dpcd_write(&anx6345->aux, DP_LINK_BW_SET, dpcd,
  193. sizeof(dpcd));
  194. if (err < 0) {
  195. DRM_ERROR("Failed to configure link: %d\n", err);
  196. return err;
  197. }
  198. /* Start training on the source */
  199. err = regmap_write(anx6345->map[I2C_IDX_DPTX], SP_DP_LT_CTRL_REG,
  200. SP_LT_EN);
  201. if (err)
  202. return err;
  203. return regmap_read_poll_timeout(anx6345->map[I2C_IDX_DPTX],
  204. SP_DP_LT_CTRL_REG,
  205. value, !(value & SP_DP_LT_INPROGRESS),
  206. POLL_DELAY, POLL_TIMEOUT);
  207. }
  208. static int anx6345_tx_initialization(struct anx6345 *anx6345)
  209. {
  210. int err, i;
  211. /* FIXME: colordepth is hardcoded for now */
  212. err = regmap_write(anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL2_REG,
  213. SP_IN_BPC_6BIT << SP_IN_BPC_SHIFT);
  214. if (err)
  215. return err;
  216. err = regmap_write(anx6345->map[I2C_IDX_DPTX], SP_DP_PLL_CTRL_REG, 0);
  217. if (err)
  218. return err;
  219. err = regmap_write(anx6345->map[I2C_IDX_TXCOM],
  220. SP_ANALOG_DEBUG1_REG, 0);
  221. if (err)
  222. return err;
  223. err = regmap_write(anx6345->map[I2C_IDX_DPTX],
  224. SP_DP_LINK_DEBUG_CTRL_REG,
  225. SP_NEW_PRBS7 | SP_M_VID_DEBUG);
  226. if (err)
  227. return err;
  228. err = regmap_write(anx6345->map[I2C_IDX_DPTX],
  229. SP_DP_ANALOG_POWER_DOWN_REG, 0);
  230. if (err)
  231. return err;
  232. /* Force HPD */
  233. err = anx6345_set_bits(anx6345->map[I2C_IDX_DPTX],
  234. SP_DP_SYSTEM_CTRL_BASE + 3,
  235. SP_HPD_FORCE | SP_HPD_CTRL);
  236. if (err)
  237. return err;
  238. for (i = 0; i < 4; i++) {
  239. /* 4 lanes */
  240. err = regmap_write(anx6345->map[I2C_IDX_DPTX],
  241. SP_DP_LANE0_LT_CTRL_REG + i, 0);
  242. if (err)
  243. return err;
  244. }
  245. /* Reset AUX */
  246. err = anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM],
  247. SP_RESET_CTRL2_REG, SP_AUX_RST);
  248. if (err)
  249. return err;
  250. return anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM],
  251. SP_RESET_CTRL2_REG, SP_AUX_RST);
  252. }
  253. static void anx6345_poweron(struct anx6345 *anx6345)
  254. {
  255. int err;
  256. /* Ensure reset is asserted before starting power on sequence */
  257. gpiod_set_value_cansleep(anx6345->gpiod_reset, 1);
  258. usleep_range(1000, 2000);
  259. err = regulator_enable(anx6345->dvdd12);
  260. if (err) {
  261. DRM_ERROR("Failed to enable dvdd12 regulator: %d\n",
  262. err);
  263. return;
  264. }
  265. /* T1 - delay between VDD12 and VDD25 should be 0-2ms */
  266. usleep_range(1000, 2000);
  267. err = regulator_enable(anx6345->dvdd25);
  268. if (err) {
  269. DRM_ERROR("Failed to enable dvdd25 regulator: %d\n",
  270. err);
  271. return;
  272. }
  273. /* T2 - delay between RESETN and all power rail stable,
  274. * should be 2-5ms
  275. */
  276. usleep_range(2000, 5000);
  277. gpiod_set_value_cansleep(anx6345->gpiod_reset, 0);
  278. /* Power on registers module */
  279. anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM], SP_POWERDOWN_CTRL_REG,
  280. SP_HDCP_PD | SP_AUDIO_PD | SP_VIDEO_PD | SP_LINK_PD);
  281. anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM], SP_POWERDOWN_CTRL_REG,
  282. SP_REGISTER_PD | SP_TOTAL_PD);
  283. if (anx6345->panel)
  284. drm_panel_prepare(anx6345->panel);
  285. anx6345->powered = true;
  286. }
  287. static void anx6345_poweroff(struct anx6345 *anx6345)
  288. {
  289. int err;
  290. gpiod_set_value_cansleep(anx6345->gpiod_reset, 1);
  291. usleep_range(1000, 2000);
  292. if (anx6345->panel)
  293. drm_panel_unprepare(anx6345->panel);
  294. err = regulator_disable(anx6345->dvdd25);
  295. if (err) {
  296. DRM_ERROR("Failed to disable dvdd25 regulator: %d\n",
  297. err);
  298. return;
  299. }
  300. usleep_range(5000, 10000);
  301. err = regulator_disable(anx6345->dvdd12);
  302. if (err) {
  303. DRM_ERROR("Failed to disable dvdd12 regulator: %d\n",
  304. err);
  305. return;
  306. }
  307. usleep_range(1000, 2000);
  308. anx6345->powered = false;
  309. }
  310. static int anx6345_start(struct anx6345 *anx6345)
  311. {
  312. int err;
  313. if (!anx6345->powered)
  314. anx6345_poweron(anx6345);
  315. /* Power on needed modules */
  316. err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM],
  317. SP_POWERDOWN_CTRL_REG,
  318. SP_VIDEO_PD | SP_LINK_PD);
  319. err = anx6345_tx_initialization(anx6345);
  320. if (err) {
  321. DRM_ERROR("Failed eDP transmitter initialization: %d\n", err);
  322. anx6345_poweroff(anx6345);
  323. return err;
  324. }
  325. err = anx6345_dp_link_training(anx6345);
  326. if (err) {
  327. DRM_ERROR("Failed link training: %d\n", err);
  328. anx6345_poweroff(anx6345);
  329. return err;
  330. }
  331. /*
  332. * This delay seems to help keep the hardware in a good state. Without
  333. * it, there are times where it fails silently.
  334. */
  335. usleep_range(10000, 15000);
  336. return 0;
  337. }
  338. static int anx6345_config_dp_output(struct anx6345 *anx6345)
  339. {
  340. int err;
  341. err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL1_REG,
  342. SP_VIDEO_MUTE);
  343. if (err)
  344. return err;
  345. /* Enable DP output */
  346. err = anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL1_REG,
  347. SP_VIDEO_EN);
  348. if (err)
  349. return err;
  350. /* Force stream valid */
  351. return anx6345_set_bits(anx6345->map[I2C_IDX_DPTX],
  352. SP_DP_SYSTEM_CTRL_BASE + 3,
  353. SP_STRM_FORCE | SP_STRM_CTRL);
  354. }
  355. static int anx6345_get_downstream_info(struct anx6345 *anx6345)
  356. {
  357. u8 value;
  358. int err;
  359. err = drm_dp_dpcd_readb(&anx6345->aux, DP_SINK_COUNT, &value);
  360. if (err < 0) {
  361. DRM_ERROR("Get sink count failed %d\n", err);
  362. return err;
  363. }
  364. if (!DP_GET_SINK_COUNT(value)) {
  365. DRM_ERROR("Downstream disconnected\n");
  366. return -EIO;
  367. }
  368. return 0;
  369. }
  370. static int anx6345_get_modes(struct drm_connector *connector)
  371. {
  372. struct anx6345 *anx6345 = connector_to_anx6345(connector);
  373. int err, num_modes = 0;
  374. bool power_off = false;
  375. mutex_lock(&anx6345->lock);
  376. if (!anx6345->edid) {
  377. if (!anx6345->powered) {
  378. anx6345_poweron(anx6345);
  379. power_off = true;
  380. }
  381. err = anx6345_get_downstream_info(anx6345);
  382. if (err) {
  383. DRM_ERROR("Failed to get downstream info: %d\n", err);
  384. goto unlock;
  385. }
  386. anx6345->edid = drm_get_edid(connector, &anx6345->aux.ddc);
  387. if (!anx6345->edid)
  388. DRM_ERROR("Failed to read EDID from panel\n");
  389. err = drm_connector_update_edid_property(connector,
  390. anx6345->edid);
  391. if (err) {
  392. DRM_ERROR("Failed to update EDID property: %d\n", err);
  393. goto unlock;
  394. }
  395. }
  396. num_modes += drm_add_edid_modes(connector, anx6345->edid);
  397. /* Driver currently supports only 6bpc */
  398. connector->display_info.bpc = 6;
  399. unlock:
  400. if (power_off)
  401. anx6345_poweroff(anx6345);
  402. mutex_unlock(&anx6345->lock);
  403. if (!num_modes && anx6345->panel)
  404. num_modes += drm_panel_get_modes(anx6345->panel, connector);
  405. return num_modes;
  406. }
  407. static const struct drm_connector_helper_funcs anx6345_connector_helper_funcs = {
  408. .get_modes = anx6345_get_modes,
  409. };
  410. static void
  411. anx6345_connector_destroy(struct drm_connector *connector)
  412. {
  413. drm_connector_cleanup(connector);
  414. }
  415. static const struct drm_connector_funcs anx6345_connector_funcs = {
  416. .fill_modes = drm_helper_probe_single_connector_modes,
  417. .destroy = anx6345_connector_destroy,
  418. .reset = drm_atomic_helper_connector_reset,
  419. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  420. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  421. };
  422. static int anx6345_bridge_attach(struct drm_bridge *bridge,
  423. enum drm_bridge_attach_flags flags)
  424. {
  425. struct anx6345 *anx6345 = bridge_to_anx6345(bridge);
  426. int err;
  427. if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) {
  428. DRM_ERROR("Fix bridge driver to make connector optional!");
  429. return -EINVAL;
  430. }
  431. if (!bridge->encoder) {
  432. DRM_ERROR("Parent encoder object not found");
  433. return -ENODEV;
  434. }
  435. /* Register aux channel */
  436. anx6345->aux.name = "DP-AUX";
  437. anx6345->aux.dev = &anx6345->client->dev;
  438. anx6345->aux.transfer = anx6345_aux_transfer;
  439. err = drm_dp_aux_register(&anx6345->aux);
  440. if (err < 0) {
  441. DRM_ERROR("Failed to register aux channel: %d\n", err);
  442. return err;
  443. }
  444. err = drm_connector_init(bridge->dev, &anx6345->connector,
  445. &anx6345_connector_funcs,
  446. DRM_MODE_CONNECTOR_eDP);
  447. if (err) {
  448. DRM_ERROR("Failed to initialize connector: %d\n", err);
  449. return err;
  450. }
  451. drm_connector_helper_add(&anx6345->connector,
  452. &anx6345_connector_helper_funcs);
  453. err = drm_connector_register(&anx6345->connector);
  454. if (err) {
  455. DRM_ERROR("Failed to register connector: %d\n", err);
  456. return err;
  457. }
  458. anx6345->connector.polled = DRM_CONNECTOR_POLL_HPD;
  459. err = drm_connector_attach_encoder(&anx6345->connector,
  460. bridge->encoder);
  461. if (err) {
  462. DRM_ERROR("Failed to link up connector to encoder: %d\n", err);
  463. return err;
  464. }
  465. return 0;
  466. }
  467. static enum drm_mode_status
  468. anx6345_bridge_mode_valid(struct drm_bridge *bridge,
  469. const struct drm_display_info *info,
  470. const struct drm_display_mode *mode)
  471. {
  472. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  473. return MODE_NO_INTERLACE;
  474. /* Max 1200p at 5.4 Ghz, one lane */
  475. if (mode->clock > 154000)
  476. return MODE_CLOCK_HIGH;
  477. return MODE_OK;
  478. }
  479. static void anx6345_bridge_disable(struct drm_bridge *bridge)
  480. {
  481. struct anx6345 *anx6345 = bridge_to_anx6345(bridge);
  482. /* Power off all modules except configuration registers access */
  483. anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM], SP_POWERDOWN_CTRL_REG,
  484. SP_HDCP_PD | SP_AUDIO_PD | SP_VIDEO_PD | SP_LINK_PD);
  485. if (anx6345->panel)
  486. drm_panel_disable(anx6345->panel);
  487. if (anx6345->powered)
  488. anx6345_poweroff(anx6345);
  489. }
  490. static void anx6345_bridge_enable(struct drm_bridge *bridge)
  491. {
  492. struct anx6345 *anx6345 = bridge_to_anx6345(bridge);
  493. int err;
  494. if (anx6345->panel)
  495. drm_panel_enable(anx6345->panel);
  496. err = anx6345_start(anx6345);
  497. if (err) {
  498. DRM_ERROR("Failed to initialize: %d\n", err);
  499. return;
  500. }
  501. err = anx6345_config_dp_output(anx6345);
  502. if (err)
  503. DRM_ERROR("Failed to enable DP output: %d\n", err);
  504. }
  505. static const struct drm_bridge_funcs anx6345_bridge_funcs = {
  506. .attach = anx6345_bridge_attach,
  507. .mode_valid = anx6345_bridge_mode_valid,
  508. .disable = anx6345_bridge_disable,
  509. .enable = anx6345_bridge_enable,
  510. };
  511. static void unregister_i2c_dummy_clients(struct anx6345 *anx6345)
  512. {
  513. unsigned int i;
  514. for (i = 1; i < ARRAY_SIZE(anx6345->i2c_clients); i++)
  515. if (anx6345->i2c_clients[i] &&
  516. anx6345->i2c_clients[i]->addr != anx6345->client->addr)
  517. i2c_unregister_device(anx6345->i2c_clients[i]);
  518. }
  519. static const struct regmap_config anx6345_regmap_config = {
  520. .reg_bits = 8,
  521. .val_bits = 8,
  522. .max_register = 0xff,
  523. .cache_type = REGCACHE_NONE,
  524. };
  525. static const u16 anx6345_chipid_list[] = {
  526. 0x6345,
  527. };
  528. static bool anx6345_get_chip_id(struct anx6345 *anx6345)
  529. {
  530. unsigned int i, idl, idh, version;
  531. if (regmap_read(anx6345->map[I2C_IDX_TXCOM], SP_DEVICE_IDL_REG, &idl))
  532. return false;
  533. if (regmap_read(anx6345->map[I2C_IDX_TXCOM], SP_DEVICE_IDH_REG, &idh))
  534. return false;
  535. anx6345->chipid = (u8)idl | ((u8)idh << 8);
  536. if (regmap_read(anx6345->map[I2C_IDX_TXCOM], SP_DEVICE_VERSION_REG,
  537. &version))
  538. return false;
  539. for (i = 0; i < ARRAY_SIZE(anx6345_chipid_list); i++) {
  540. if (anx6345->chipid == anx6345_chipid_list[i]) {
  541. DRM_INFO("Found ANX%x (ver. %d) eDP Transmitter\n",
  542. anx6345->chipid, version);
  543. return true;
  544. }
  545. }
  546. DRM_ERROR("ANX%x (ver. %d) not supported by this driver\n",
  547. anx6345->chipid, version);
  548. return false;
  549. }
  550. static int anx6345_i2c_probe(struct i2c_client *client,
  551. const struct i2c_device_id *id)
  552. {
  553. struct anx6345 *anx6345;
  554. struct device *dev;
  555. int i, err;
  556. anx6345 = devm_kzalloc(&client->dev, sizeof(*anx6345), GFP_KERNEL);
  557. if (!anx6345)
  558. return -ENOMEM;
  559. mutex_init(&anx6345->lock);
  560. anx6345->bridge.of_node = client->dev.of_node;
  561. anx6345->client = client;
  562. i2c_set_clientdata(client, anx6345);
  563. dev = &anx6345->client->dev;
  564. err = drm_of_find_panel_or_bridge(client->dev.of_node, 1, 0,
  565. &anx6345->panel, NULL);
  566. if (err == -EPROBE_DEFER)
  567. return err;
  568. if (err)
  569. DRM_DEBUG("No panel found\n");
  570. /* 1.2V digital core power regulator */
  571. anx6345->dvdd12 = devm_regulator_get(dev, "dvdd12");
  572. if (IS_ERR(anx6345->dvdd12)) {
  573. if (PTR_ERR(anx6345->dvdd12) != -EPROBE_DEFER)
  574. DRM_ERROR("Failed to get dvdd12 supply (%ld)\n",
  575. PTR_ERR(anx6345->dvdd12));
  576. return PTR_ERR(anx6345->dvdd12);
  577. }
  578. /* 2.5V digital core power regulator */
  579. anx6345->dvdd25 = devm_regulator_get(dev, "dvdd25");
  580. if (IS_ERR(anx6345->dvdd25)) {
  581. if (PTR_ERR(anx6345->dvdd25) != -EPROBE_DEFER)
  582. DRM_ERROR("Failed to get dvdd25 supply (%ld)\n",
  583. PTR_ERR(anx6345->dvdd25));
  584. return PTR_ERR(anx6345->dvdd25);
  585. }
  586. /* GPIO for chip reset */
  587. anx6345->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
  588. if (IS_ERR(anx6345->gpiod_reset)) {
  589. DRM_ERROR("Reset gpio not found\n");
  590. return PTR_ERR(anx6345->gpiod_reset);
  591. }
  592. /* Map slave addresses of ANX6345 */
  593. for (i = 0; i < I2C_NUM_ADDRESSES; i++) {
  594. if (anx6345_i2c_addresses[i] >> 1 != client->addr)
  595. anx6345->i2c_clients[i] = i2c_new_dummy_device(client->adapter,
  596. anx6345_i2c_addresses[i] >> 1);
  597. else
  598. anx6345->i2c_clients[i] = client;
  599. if (IS_ERR(anx6345->i2c_clients[i])) {
  600. err = PTR_ERR(anx6345->i2c_clients[i]);
  601. DRM_ERROR("Failed to reserve I2C bus %02x\n",
  602. anx6345_i2c_addresses[i]);
  603. goto err_unregister_i2c;
  604. }
  605. anx6345->map[i] = devm_regmap_init_i2c(anx6345->i2c_clients[i],
  606. &anx6345_regmap_config);
  607. if (IS_ERR(anx6345->map[i])) {
  608. err = PTR_ERR(anx6345->map[i]);
  609. DRM_ERROR("Failed regmap initialization %02x\n",
  610. anx6345_i2c_addresses[i]);
  611. goto err_unregister_i2c;
  612. }
  613. }
  614. /* Look for supported chip ID */
  615. anx6345_poweron(anx6345);
  616. if (anx6345_get_chip_id(anx6345)) {
  617. anx6345->bridge.funcs = &anx6345_bridge_funcs;
  618. drm_bridge_add(&anx6345->bridge);
  619. return 0;
  620. } else {
  621. anx6345_poweroff(anx6345);
  622. err = -ENODEV;
  623. }
  624. err_unregister_i2c:
  625. unregister_i2c_dummy_clients(anx6345);
  626. return err;
  627. }
  628. static int anx6345_i2c_remove(struct i2c_client *client)
  629. {
  630. struct anx6345 *anx6345 = i2c_get_clientdata(client);
  631. drm_bridge_remove(&anx6345->bridge);
  632. unregister_i2c_dummy_clients(anx6345);
  633. kfree(anx6345->edid);
  634. mutex_destroy(&anx6345->lock);
  635. return 0;
  636. }
  637. static const struct i2c_device_id anx6345_id[] = {
  638. { "anx6345", 0 },
  639. { /* sentinel */ }
  640. };
  641. MODULE_DEVICE_TABLE(i2c, anx6345_id);
  642. static const struct of_device_id anx6345_match_table[] = {
  643. { .compatible = "analogix,anx6345", },
  644. { /* sentinel */ },
  645. };
  646. MODULE_DEVICE_TABLE(of, anx6345_match_table);
  647. static struct i2c_driver anx6345_driver = {
  648. .driver = {
  649. .name = "anx6345",
  650. .of_match_table = of_match_ptr(anx6345_match_table),
  651. },
  652. .probe = anx6345_i2c_probe,
  653. .remove = anx6345_i2c_remove,
  654. .id_table = anx6345_id,
  655. };
  656. module_i2c_driver(anx6345_driver);
  657. MODULE_DESCRIPTION("ANX6345 eDP Transmitter driver");
  658. MODULE_AUTHOR("Icenowy Zheng <icenowy@aosc.io>");
  659. MODULE_LICENSE("GPL v2");