xilinx-pr-decoupler.c 3.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017, National Instruments Corp.
  4. * Copyright (c) 2017, Xilix Inc
  5. *
  6. * FPGA Bridge Driver for the Xilinx LogiCORE Partial Reconfiguration
  7. * Decoupler IP Core.
  8. */
  9. #include <linux/clk.h>
  10. #include <linux/io.h>
  11. #include <linux/kernel.h>
  12. #include <linux/of_device.h>
  13. #include <linux/module.h>
  14. #include <linux/fpga/fpga-bridge.h>
  15. #define CTRL_CMD_DECOUPLE BIT(0)
  16. #define CTRL_CMD_COUPLE 0
  17. #define CTRL_OFFSET 0
  18. struct xlnx_pr_decoupler_data {
  19. void __iomem *io_base;
  20. struct clk *clk;
  21. };
  22. static inline void xlnx_pr_decoupler_write(struct xlnx_pr_decoupler_data *d,
  23. u32 offset, u32 val)
  24. {
  25. writel(val, d->io_base + offset);
  26. }
  27. static inline u32 xlnx_pr_decouple_read(const struct xlnx_pr_decoupler_data *d,
  28. u32 offset)
  29. {
  30. return readl(d->io_base + offset);
  31. }
  32. static int xlnx_pr_decoupler_enable_set(struct fpga_bridge *bridge, bool enable)
  33. {
  34. int err;
  35. struct xlnx_pr_decoupler_data *priv = bridge->priv;
  36. err = clk_enable(priv->clk);
  37. if (err)
  38. return err;
  39. if (enable)
  40. xlnx_pr_decoupler_write(priv, CTRL_OFFSET, CTRL_CMD_COUPLE);
  41. else
  42. xlnx_pr_decoupler_write(priv, CTRL_OFFSET, CTRL_CMD_DECOUPLE);
  43. clk_disable(priv->clk);
  44. return 0;
  45. }
  46. static int xlnx_pr_decoupler_enable_show(struct fpga_bridge *bridge)
  47. {
  48. const struct xlnx_pr_decoupler_data *priv = bridge->priv;
  49. u32 status;
  50. int err;
  51. err = clk_enable(priv->clk);
  52. if (err)
  53. return err;
  54. status = readl(priv->io_base);
  55. clk_disable(priv->clk);
  56. return !status;
  57. }
  58. static const struct fpga_bridge_ops xlnx_pr_decoupler_br_ops = {
  59. .enable_set = xlnx_pr_decoupler_enable_set,
  60. .enable_show = xlnx_pr_decoupler_enable_show,
  61. };
  62. static const struct of_device_id xlnx_pr_decoupler_of_match[] = {
  63. { .compatible = "xlnx,pr-decoupler-1.00", },
  64. { .compatible = "xlnx,pr-decoupler", },
  65. {},
  66. };
  67. MODULE_DEVICE_TABLE(of, xlnx_pr_decoupler_of_match);
  68. static int xlnx_pr_decoupler_probe(struct platform_device *pdev)
  69. {
  70. struct xlnx_pr_decoupler_data *priv;
  71. struct fpga_bridge *br;
  72. int err;
  73. struct resource *res;
  74. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  75. if (!priv)
  76. return -ENOMEM;
  77. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  78. priv->io_base = devm_ioremap_resource(&pdev->dev, res);
  79. if (IS_ERR(priv->io_base))
  80. return PTR_ERR(priv->io_base);
  81. priv->clk = devm_clk_get(&pdev->dev, "aclk");
  82. if (IS_ERR(priv->clk)) {
  83. if (PTR_ERR(priv->clk) != -EPROBE_DEFER)
  84. dev_err(&pdev->dev, "input clock not found\n");
  85. return PTR_ERR(priv->clk);
  86. }
  87. err = clk_prepare_enable(priv->clk);
  88. if (err) {
  89. dev_err(&pdev->dev, "unable to enable clock\n");
  90. return err;
  91. }
  92. clk_disable(priv->clk);
  93. br = devm_fpga_bridge_create(&pdev->dev, "Xilinx PR Decoupler",
  94. &xlnx_pr_decoupler_br_ops, priv);
  95. if (!br) {
  96. err = -ENOMEM;
  97. goto err_clk;
  98. }
  99. platform_set_drvdata(pdev, br);
  100. err = fpga_bridge_register(br);
  101. if (err) {
  102. dev_err(&pdev->dev, "unable to register Xilinx PR Decoupler");
  103. goto err_clk;
  104. }
  105. return 0;
  106. err_clk:
  107. clk_unprepare(priv->clk);
  108. return err;
  109. }
  110. static int xlnx_pr_decoupler_remove(struct platform_device *pdev)
  111. {
  112. struct fpga_bridge *bridge = platform_get_drvdata(pdev);
  113. struct xlnx_pr_decoupler_data *p = bridge->priv;
  114. fpga_bridge_unregister(bridge);
  115. clk_unprepare(p->clk);
  116. return 0;
  117. }
  118. static struct platform_driver xlnx_pr_decoupler_driver = {
  119. .probe = xlnx_pr_decoupler_probe,
  120. .remove = xlnx_pr_decoupler_remove,
  121. .driver = {
  122. .name = "xlnx_pr_decoupler",
  123. .of_match_table = of_match_ptr(xlnx_pr_decoupler_of_match),
  124. },
  125. };
  126. module_platform_driver(xlnx_pr_decoupler_driver);
  127. MODULE_DESCRIPTION("Xilinx Partial Reconfiguration Decoupler");
  128. MODULE_AUTHOR("Moritz Fischer <mdf@kernel.org>");
  129. MODULE_AUTHOR("Michal Simek <michal.simek@xilinx.com>");
  130. MODULE_LICENSE("GPL v2");