zynqmp.c 33 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Xilinx Zynq MPSoC Firmware layer
  4. *
  5. * Copyright (C) 2014-2021 Xilinx, Inc.
  6. *
  7. * Michal Simek <michal.simek@xilinx.com>
  8. * Davorin Mista <davorin.mista@aggios.com>
  9. * Jolly Shah <jollys@xilinx.com>
  10. * Rajan Vaja <rajanv@xilinx.com>
  11. */
  12. #include <linux/arm-smccc.h>
  13. #include <linux/compiler.h>
  14. #include <linux/device.h>
  15. #include <linux/init.h>
  16. #include <linux/mfd/core.h>
  17. #include <linux/module.h>
  18. #include <linux/of.h>
  19. #include <linux/of_platform.h>
  20. #include <linux/slab.h>
  21. #include <linux/uaccess.h>
  22. #include <linux/hashtable.h>
  23. #include <linux/firmware/xlnx-zynqmp.h>
  24. #include "zynqmp-debug.h"
  25. /* Max HashMap Order for PM API feature check (1<<7 = 128) */
  26. #define PM_API_FEATURE_CHECK_MAX_ORDER 7
  27. static bool feature_check_enabled;
  28. static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
  29. /**
  30. * struct pm_api_feature_data - PM API Feature data
  31. * @pm_api_id: PM API Id, used as key to index into hashmap
  32. * @feature_status: status of PM API feature: valid, invalid
  33. * @hentry: hlist_node that hooks this entry into hashtable
  34. */
  35. struct pm_api_feature_data {
  36. u32 pm_api_id;
  37. int feature_status;
  38. struct hlist_node hentry;
  39. };
  40. static const struct mfd_cell firmware_devs[] = {
  41. {
  42. .name = "zynqmp_power_controller",
  43. },
  44. };
  45. /**
  46. * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes
  47. * @ret_status: PMUFW return code
  48. *
  49. * Return: corresponding Linux error code
  50. */
  51. static int zynqmp_pm_ret_code(u32 ret_status)
  52. {
  53. switch (ret_status) {
  54. case XST_PM_SUCCESS:
  55. case XST_PM_DOUBLE_REQ:
  56. return 0;
  57. case XST_PM_NO_FEATURE:
  58. return -ENOTSUPP;
  59. case XST_PM_NO_ACCESS:
  60. return -EACCES;
  61. case XST_PM_ABORT_SUSPEND:
  62. return -ECANCELED;
  63. case XST_PM_MULT_USER:
  64. return -EUSERS;
  65. case XST_PM_INTERNAL:
  66. case XST_PM_CONFLICT:
  67. case XST_PM_INVALID_NODE:
  68. default:
  69. return -EINVAL;
  70. }
  71. }
  72. static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2,
  73. u32 *ret_payload)
  74. {
  75. return -ENODEV;
  76. }
  77. /*
  78. * PM function call wrapper
  79. * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration
  80. */
  81. static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail;
  82. /**
  83. * do_fw_call_smc() - Call system-level platform management layer (SMC)
  84. * @arg0: Argument 0 to SMC call
  85. * @arg1: Argument 1 to SMC call
  86. * @arg2: Argument 2 to SMC call
  87. * @ret_payload: Returned value array
  88. *
  89. * Invoke platform management function via SMC call (no hypervisor present).
  90. *
  91. * Return: Returns status, either success or error+reason
  92. */
  93. static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2,
  94. u32 *ret_payload)
  95. {
  96. struct arm_smccc_res res;
  97. arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
  98. if (ret_payload) {
  99. ret_payload[0] = lower_32_bits(res.a0);
  100. ret_payload[1] = upper_32_bits(res.a0);
  101. ret_payload[2] = lower_32_bits(res.a1);
  102. ret_payload[3] = upper_32_bits(res.a1);
  103. }
  104. return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
  105. }
  106. /**
  107. * do_fw_call_hvc() - Call system-level platform management layer (HVC)
  108. * @arg0: Argument 0 to HVC call
  109. * @arg1: Argument 1 to HVC call
  110. * @arg2: Argument 2 to HVC call
  111. * @ret_payload: Returned value array
  112. *
  113. * Invoke platform management function via HVC
  114. * HVC-based for communication through hypervisor
  115. * (no direct communication with ATF).
  116. *
  117. * Return: Returns status, either success or error+reason
  118. */
  119. static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2,
  120. u32 *ret_payload)
  121. {
  122. struct arm_smccc_res res;
  123. arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
  124. if (ret_payload) {
  125. ret_payload[0] = lower_32_bits(res.a0);
  126. ret_payload[1] = upper_32_bits(res.a0);
  127. ret_payload[2] = lower_32_bits(res.a1);
  128. ret_payload[3] = upper_32_bits(res.a1);
  129. }
  130. return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
  131. }
  132. /**
  133. * zynqmp_pm_feature() - Check weather given feature is supported or not
  134. * @api_id: API ID to check
  135. *
  136. * Return: Returns status, either success or error+reason
  137. */
  138. static int zynqmp_pm_feature(u32 api_id)
  139. {
  140. int ret;
  141. u32 ret_payload[PAYLOAD_ARG_CNT];
  142. u64 smc_arg[2];
  143. struct pm_api_feature_data *feature_data;
  144. if (!feature_check_enabled)
  145. return 0;
  146. /* Check for existing entry in hash table for given api */
  147. hash_for_each_possible(pm_api_features_map, feature_data, hentry,
  148. api_id) {
  149. if (feature_data->pm_api_id == api_id)
  150. return feature_data->feature_status;
  151. }
  152. /* Add new entry if not present */
  153. feature_data = kmalloc(sizeof(*feature_data), GFP_KERNEL);
  154. if (!feature_data)
  155. return -ENOMEM;
  156. feature_data->pm_api_id = api_id;
  157. smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
  158. smc_arg[1] = api_id;
  159. ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload);
  160. if (ret)
  161. ret = -EOPNOTSUPP;
  162. else
  163. ret = ret_payload[1];
  164. feature_data->feature_status = ret;
  165. hash_add(pm_api_features_map, &feature_data->hentry, api_id);
  166. return ret;
  167. }
  168. /**
  169. * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer
  170. * caller function depending on the configuration
  171. * @pm_api_id: Requested PM-API call
  172. * @arg0: Argument 0 to requested PM-API call
  173. * @arg1: Argument 1 to requested PM-API call
  174. * @arg2: Argument 2 to requested PM-API call
  175. * @arg3: Argument 3 to requested PM-API call
  176. * @ret_payload: Returned value array
  177. *
  178. * Invoke platform management function for SMC or HVC call, depending on
  179. * configuration.
  180. * Following SMC Calling Convention (SMCCC) for SMC64:
  181. * Pm Function Identifier,
  182. * PM_SIP_SVC + PM_API_ID =
  183. * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
  184. * ((SMC_64) << FUNCID_CC_SHIFT)
  185. * ((SIP_START) << FUNCID_OEN_SHIFT)
  186. * ((PM_API_ID) & FUNCID_NUM_MASK))
  187. *
  188. * PM_SIP_SVC - Registered ZynqMP SIP Service Call.
  189. * PM_API_ID - Platform Management API ID.
  190. *
  191. * Return: Returns status, either success or error+reason
  192. */
  193. int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
  194. u32 arg2, u32 arg3, u32 *ret_payload)
  195. {
  196. /*
  197. * Added SIP service call Function Identifier
  198. * Make sure to stay in x0 register
  199. */
  200. u64 smc_arg[4];
  201. int ret;
  202. /* Check if feature is supported or not */
  203. ret = zynqmp_pm_feature(pm_api_id);
  204. if (ret < 0)
  205. return ret;
  206. smc_arg[0] = PM_SIP_SVC | pm_api_id;
  207. smc_arg[1] = ((u64)arg1 << 32) | arg0;
  208. smc_arg[2] = ((u64)arg3 << 32) | arg2;
  209. return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload);
  210. }
  211. static u32 pm_api_version;
  212. static u32 pm_tz_version;
  213. /**
  214. * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware
  215. * @version: Returned version value
  216. *
  217. * Return: Returns status, either success or error+reason
  218. */
  219. int zynqmp_pm_get_api_version(u32 *version)
  220. {
  221. u32 ret_payload[PAYLOAD_ARG_CNT];
  222. int ret;
  223. if (!version)
  224. return -EINVAL;
  225. /* Check is PM API version already verified */
  226. if (pm_api_version > 0) {
  227. *version = pm_api_version;
  228. return 0;
  229. }
  230. ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload);
  231. *version = ret_payload[1];
  232. return ret;
  233. }
  234. EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version);
  235. /**
  236. * zynqmp_pm_get_chipid - Get silicon ID registers
  237. * @idcode: IDCODE register
  238. * @version: version register
  239. *
  240. * Return: Returns the status of the operation and the idcode and version
  241. * registers in @idcode and @version.
  242. */
  243. int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
  244. {
  245. u32 ret_payload[PAYLOAD_ARG_CNT];
  246. int ret;
  247. if (!idcode || !version)
  248. return -EINVAL;
  249. ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
  250. *idcode = ret_payload[1];
  251. *version = ret_payload[2];
  252. return ret;
  253. }
  254. EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid);
  255. /**
  256. * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
  257. * @version: Returned version value
  258. *
  259. * Return: Returns status, either success or error+reason
  260. */
  261. static int zynqmp_pm_get_trustzone_version(u32 *version)
  262. {
  263. u32 ret_payload[PAYLOAD_ARG_CNT];
  264. int ret;
  265. if (!version)
  266. return -EINVAL;
  267. /* Check is PM trustzone version already verified */
  268. if (pm_tz_version > 0) {
  269. *version = pm_tz_version;
  270. return 0;
  271. }
  272. ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0,
  273. 0, 0, ret_payload);
  274. *version = ret_payload[1];
  275. return ret;
  276. }
  277. /**
  278. * get_set_conduit_method() - Choose SMC or HVC based communication
  279. * @np: Pointer to the device_node structure
  280. *
  281. * Use SMC or HVC-based functions to communicate with EL2/EL3.
  282. *
  283. * Return: Returns 0 on success or error code
  284. */
  285. static int get_set_conduit_method(struct device_node *np)
  286. {
  287. const char *method;
  288. if (of_property_read_string(np, "method", &method)) {
  289. pr_warn("%s missing \"method\" property\n", __func__);
  290. return -ENXIO;
  291. }
  292. if (!strcmp("hvc", method)) {
  293. do_fw_call = do_fw_call_hvc;
  294. } else if (!strcmp("smc", method)) {
  295. do_fw_call = do_fw_call_smc;
  296. } else {
  297. pr_warn("%s Invalid \"method\" property: %s\n",
  298. __func__, method);
  299. return -EINVAL;
  300. }
  301. return 0;
  302. }
  303. /**
  304. * zynqmp_pm_query_data() - Get query data from firmware
  305. * @qdata: Variable to the zynqmp_pm_query_data structure
  306. * @out: Returned output value
  307. *
  308. * Return: Returns status, either success or error+reason
  309. */
  310. int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
  311. {
  312. int ret;
  313. ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1,
  314. qdata.arg2, qdata.arg3, out);
  315. /*
  316. * For clock name query, all bytes in SMC response are clock name
  317. * characters and return code is always success. For invalid clocks,
  318. * clock name bytes would be zeros.
  319. */
  320. return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
  321. }
  322. EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
  323. /**
  324. * zynqmp_pm_clock_enable() - Enable the clock for given id
  325. * @clock_id: ID of the clock to be enabled
  326. *
  327. * This function is used by master to enable the clock
  328. * including peripherals and PLL clocks.
  329. *
  330. * Return: Returns status, either success or error+reason
  331. */
  332. int zynqmp_pm_clock_enable(u32 clock_id)
  333. {
  334. return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL);
  335. }
  336. EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
  337. /**
  338. * zynqmp_pm_clock_disable() - Disable the clock for given id
  339. * @clock_id: ID of the clock to be disable
  340. *
  341. * This function is used by master to disable the clock
  342. * including peripherals and PLL clocks.
  343. *
  344. * Return: Returns status, either success or error+reason
  345. */
  346. int zynqmp_pm_clock_disable(u32 clock_id)
  347. {
  348. return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL);
  349. }
  350. EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
  351. /**
  352. * zynqmp_pm_clock_getstate() - Get the clock state for given id
  353. * @clock_id: ID of the clock to be queried
  354. * @state: 1/0 (Enabled/Disabled)
  355. *
  356. * This function is used by master to get the state of clock
  357. * including peripherals and PLL clocks.
  358. *
  359. * Return: Returns status, either success or error+reason
  360. */
  361. int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
  362. {
  363. u32 ret_payload[PAYLOAD_ARG_CNT];
  364. int ret;
  365. ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0,
  366. 0, 0, ret_payload);
  367. *state = ret_payload[1];
  368. return ret;
  369. }
  370. EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
  371. /**
  372. * zynqmp_pm_clock_setdivider() - Set the clock divider for given id
  373. * @clock_id: ID of the clock
  374. * @divider: divider value
  375. *
  376. * This function is used by master to set divider for any clock
  377. * to achieve desired rate.
  378. *
  379. * Return: Returns status, either success or error+reason
  380. */
  381. int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
  382. {
  383. return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider,
  384. 0, 0, NULL);
  385. }
  386. EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
  387. /**
  388. * zynqmp_pm_clock_getdivider() - Get the clock divider for given id
  389. * @clock_id: ID of the clock
  390. * @divider: divider value
  391. *
  392. * This function is used by master to get divider values
  393. * for any clock.
  394. *
  395. * Return: Returns status, either success or error+reason
  396. */
  397. int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
  398. {
  399. u32 ret_payload[PAYLOAD_ARG_CNT];
  400. int ret;
  401. ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0,
  402. 0, 0, ret_payload);
  403. *divider = ret_payload[1];
  404. return ret;
  405. }
  406. EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
  407. /**
  408. * zynqmp_pm_clock_setrate() - Set the clock rate for given id
  409. * @clock_id: ID of the clock
  410. * @rate: rate value in hz
  411. *
  412. * This function is used by master to set rate for any clock.
  413. *
  414. * Return: Returns status, either success or error+reason
  415. */
  416. int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
  417. {
  418. return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id,
  419. lower_32_bits(rate),
  420. upper_32_bits(rate),
  421. 0, NULL);
  422. }
  423. EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate);
  424. /**
  425. * zynqmp_pm_clock_getrate() - Get the clock rate for given id
  426. * @clock_id: ID of the clock
  427. * @rate: rate value in hz
  428. *
  429. * This function is used by master to get rate
  430. * for any clock.
  431. *
  432. * Return: Returns status, either success or error+reason
  433. */
  434. int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
  435. {
  436. u32 ret_payload[PAYLOAD_ARG_CNT];
  437. int ret;
  438. ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0,
  439. 0, 0, ret_payload);
  440. *rate = ((u64)ret_payload[2] << 32) | ret_payload[1];
  441. return ret;
  442. }
  443. EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate);
  444. /**
  445. * zynqmp_pm_clock_setparent() - Set the clock parent for given id
  446. * @clock_id: ID of the clock
  447. * @parent_id: parent id
  448. *
  449. * This function is used by master to set parent for any clock.
  450. *
  451. * Return: Returns status, either success or error+reason
  452. */
  453. int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
  454. {
  455. return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id,
  456. parent_id, 0, 0, NULL);
  457. }
  458. EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
  459. /**
  460. * zynqmp_pm_clock_getparent() - Get the clock parent for given id
  461. * @clock_id: ID of the clock
  462. * @parent_id: parent id
  463. *
  464. * This function is used by master to get parent index
  465. * for any clock.
  466. *
  467. * Return: Returns status, either success or error+reason
  468. */
  469. int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
  470. {
  471. u32 ret_payload[PAYLOAD_ARG_CNT];
  472. int ret;
  473. ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0,
  474. 0, 0, ret_payload);
  475. *parent_id = ret_payload[1];
  476. return ret;
  477. }
  478. EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
  479. /**
  480. * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode
  481. *
  482. * @clk_id: PLL clock ID
  483. * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT)
  484. *
  485. * This function sets PLL mode
  486. *
  487. * Return: Returns status, either success or error+reason
  488. */
  489. int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
  490. {
  491. return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE,
  492. clk_id, mode, NULL);
  493. }
  494. EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
  495. /**
  496. * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode
  497. *
  498. * @clk_id: PLL clock ID
  499. * @mode: PLL mode
  500. *
  501. * This function return current PLL mode
  502. *
  503. * Return: Returns status, either success or error+reason
  504. */
  505. int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
  506. {
  507. return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE,
  508. clk_id, 0, mode);
  509. }
  510. EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
  511. /**
  512. * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data
  513. *
  514. * @clk_id: PLL clock ID
  515. * @data: fraction data
  516. *
  517. * This function sets fraction data.
  518. * It is valid for fraction mode only.
  519. *
  520. * Return: Returns status, either success or error+reason
  521. */
  522. int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
  523. {
  524. return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA,
  525. clk_id, data, NULL);
  526. }
  527. EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
  528. /**
  529. * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data
  530. *
  531. * @clk_id: PLL clock ID
  532. * @data: fraction data
  533. *
  534. * This function returns fraction data value.
  535. *
  536. * Return: Returns status, either success or error+reason
  537. */
  538. int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
  539. {
  540. return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA,
  541. clk_id, 0, data);
  542. }
  543. EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
  544. /**
  545. * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device
  546. *
  547. * @node_id Node ID of the device
  548. * @type Type of tap delay to set (input/output)
  549. * @value Value to set fot the tap delay
  550. *
  551. * This function sets input/output tap delay for the SD device.
  552. *
  553. * @return Returns status, either success or error+reason
  554. */
  555. int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
  556. {
  557. return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY,
  558. type, value, NULL);
  559. }
  560. EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
  561. /**
  562. * zynqmp_pm_sd_dll_reset() - Reset DLL logic
  563. *
  564. * @node_id Node ID of the device
  565. * @type Reset type
  566. *
  567. * This function resets DLL logic for the SD device.
  568. *
  569. * @return Returns status, either success or error+reason
  570. */
  571. int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
  572. {
  573. return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET,
  574. type, 0, NULL);
  575. }
  576. EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
  577. /**
  578. * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs)
  579. * @index GGS register index
  580. * @value Register value to be written
  581. *
  582. * This function writes value to GGS register.
  583. *
  584. * @return Returns status, either success or error+reason
  585. */
  586. int zynqmp_pm_write_ggs(u32 index, u32 value)
  587. {
  588. return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS,
  589. index, value, NULL);
  590. }
  591. EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
  592. /**
  593. * zynqmp_pm_write_ggs() - PM API for reading global general storage (ggs)
  594. * @index GGS register index
  595. * @value Register value to be written
  596. *
  597. * This function returns GGS register value.
  598. *
  599. * @return Returns status, either success or error+reason
  600. */
  601. int zynqmp_pm_read_ggs(u32 index, u32 *value)
  602. {
  603. return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS,
  604. index, 0, value);
  605. }
  606. EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
  607. /**
  608. * zynqmp_pm_write_pggs() - PM API for writing persistent global general
  609. * storage (pggs)
  610. * @index PGGS register index
  611. * @value Register value to be written
  612. *
  613. * This function writes value to PGGS register.
  614. *
  615. * @return Returns status, either success or error+reason
  616. */
  617. int zynqmp_pm_write_pggs(u32 index, u32 value)
  618. {
  619. return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value,
  620. NULL);
  621. }
  622. EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
  623. /**
  624. * zynqmp_pm_write_pggs() - PM API for reading persistent global general
  625. * storage (pggs)
  626. * @index PGGS register index
  627. * @value Register value to be written
  628. *
  629. * This function returns PGGS register value.
  630. *
  631. * @return Returns status, either success or error+reason
  632. */
  633. int zynqmp_pm_read_pggs(u32 index, u32 *value)
  634. {
  635. return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0,
  636. value);
  637. }
  638. EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
  639. /**
  640. * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
  641. * @value Status value to be written
  642. *
  643. * This function sets healthy bit value to indicate boot health status
  644. * to firmware.
  645. *
  646. * @return Returns status, either success or error+reason
  647. */
  648. int zynqmp_pm_set_boot_health_status(u32 value)
  649. {
  650. return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS,
  651. value, 0, NULL);
  652. }
  653. /**
  654. * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release)
  655. * @reset: Reset to be configured
  656. * @assert_flag: Flag stating should reset be asserted (1) or
  657. * released (0)
  658. *
  659. * Return: Returns status, either success or error+reason
  660. */
  661. int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
  662. const enum zynqmp_pm_reset_action assert_flag)
  663. {
  664. return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag,
  665. 0, 0, NULL);
  666. }
  667. EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
  668. /**
  669. * zynqmp_pm_reset_get_status - Get status of the reset
  670. * @reset: Reset whose status should be returned
  671. * @status: Returned status
  672. *
  673. * Return: Returns status, either success or error+reason
  674. */
  675. int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status)
  676. {
  677. u32 ret_payload[PAYLOAD_ARG_CNT];
  678. int ret;
  679. if (!status)
  680. return -EINVAL;
  681. ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0,
  682. 0, 0, ret_payload);
  683. *status = ret_payload[1];
  684. return ret;
  685. }
  686. EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
  687. /**
  688. * zynqmp_pm_fpga_load - Perform the fpga load
  689. * @address: Address to write to
  690. * @size: pl bitstream size
  691. * @flags: Bitstream type
  692. * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration
  693. * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration
  694. *
  695. * This function provides access to pmufw. To transfer
  696. * the required bitstream into PL.
  697. *
  698. * Return: Returns status, either success or error+reason
  699. */
  700. int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
  701. {
  702. return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
  703. upper_32_bits(address), size, flags, NULL);
  704. }
  705. EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
  706. /**
  707. * zynqmp_pm_fpga_get_status - Read value from PCAP status register
  708. * @value: Value to read
  709. *
  710. * This function provides access to the pmufw to get the PCAP
  711. * status
  712. *
  713. * Return: Returns status, either success or error+reason
  714. */
  715. int zynqmp_pm_fpga_get_status(u32 *value)
  716. {
  717. u32 ret_payload[PAYLOAD_ARG_CNT];
  718. int ret;
  719. if (!value)
  720. return -EINVAL;
  721. ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload);
  722. *value = ret_payload[1];
  723. return ret;
  724. }
  725. EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
  726. /**
  727. * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller
  728. * master has initialized its own power management
  729. *
  730. * This API function is to be used for notify the power management controller
  731. * about the completed power management initialization.
  732. *
  733. * Return: Returns status, either success or error+reason
  734. */
  735. int zynqmp_pm_init_finalize(void)
  736. {
  737. return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL);
  738. }
  739. EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
  740. /**
  741. * zynqmp_pm_set_suspend_mode() - Set system suspend mode
  742. * @mode: Mode to set for system suspend
  743. *
  744. * This API function is used to set mode of system suspend.
  745. *
  746. * Return: Returns status, either success or error+reason
  747. */
  748. int zynqmp_pm_set_suspend_mode(u32 mode)
  749. {
  750. return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL);
  751. }
  752. EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
  753. /**
  754. * zynqmp_pm_request_node() - Request a node with specific capabilities
  755. * @node: Node ID of the slave
  756. * @capabilities: Requested capabilities of the slave
  757. * @qos: Quality of service (not supported)
  758. * @ack: Flag to specify whether acknowledge is requested
  759. *
  760. * This function is used by master to request particular node from firmware.
  761. * Every master must request node before using it.
  762. *
  763. * Return: Returns status, either success or error+reason
  764. */
  765. int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
  766. const u32 qos, const enum zynqmp_pm_request_ack ack)
  767. {
  768. return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities,
  769. qos, ack, NULL);
  770. }
  771. EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
  772. /**
  773. * zynqmp_pm_release_node() - Release a node
  774. * @node: Node ID of the slave
  775. *
  776. * This function is used by master to inform firmware that master
  777. * has released node. Once released, master must not use that node
  778. * without re-request.
  779. *
  780. * Return: Returns status, either success or error+reason
  781. */
  782. int zynqmp_pm_release_node(const u32 node)
  783. {
  784. return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL);
  785. }
  786. EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
  787. /**
  788. * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves
  789. * @node: Node ID of the slave
  790. * @capabilities: Requested capabilities of the slave
  791. * @qos: Quality of service (not supported)
  792. * @ack: Flag to specify whether acknowledge is requested
  793. *
  794. * This API function is to be used for slaves a PU already has requested
  795. * to change its capabilities.
  796. *
  797. * Return: Returns status, either success or error+reason
  798. */
  799. int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
  800. const u32 qos,
  801. const enum zynqmp_pm_request_ack ack)
  802. {
  803. return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities,
  804. qos, ack, NULL);
  805. }
  806. EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
  807. /**
  808. * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using
  809. * AES-GCM core.
  810. * @address: Address of the AesParams structure.
  811. * @out: Returned output value
  812. *
  813. * Return: Returns status, either success or error code.
  814. */
  815. int zynqmp_pm_aes_engine(const u64 address, u32 *out)
  816. {
  817. u32 ret_payload[PAYLOAD_ARG_CNT];
  818. int ret;
  819. if (!out)
  820. return -EINVAL;
  821. ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
  822. lower_32_bits(address),
  823. 0, 0, ret_payload);
  824. *out = ret_payload[1];
  825. return ret;
  826. }
  827. EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
  828. /**
  829. * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart
  830. * @type: Shutdown or restart? 0 for shutdown, 1 for restart
  831. * @subtype: Specifies which system should be restarted or shut down
  832. *
  833. * Return: Returns status, either success or error+reason
  834. */
  835. int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
  836. {
  837. return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype,
  838. 0, 0, NULL);
  839. }
  840. /**
  841. * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
  842. * @subtype: Shutdown subtype
  843. * @name: Matching string for scope argument
  844. *
  845. * This struct encapsulates mapping between shutdown scope ID and string.
  846. */
  847. struct zynqmp_pm_shutdown_scope {
  848. const enum zynqmp_pm_shutdown_subtype subtype;
  849. const char *name;
  850. };
  851. static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = {
  852. [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = {
  853. .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM,
  854. .name = "subsystem",
  855. },
  856. [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = {
  857. .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY,
  858. .name = "ps_only",
  859. },
  860. [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = {
  861. .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM,
  862. .name = "system",
  863. },
  864. };
  865. static struct zynqmp_pm_shutdown_scope *selected_scope =
  866. &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM];
  867. /**
  868. * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid
  869. * @scope_string: Shutdown scope string
  870. *
  871. * Return: Return pointer to matching shutdown scope struct from
  872. * array of available options in system if string is valid,
  873. * otherwise returns NULL.
  874. */
  875. static struct zynqmp_pm_shutdown_scope*
  876. zynqmp_pm_is_shutdown_scope_valid(const char *scope_string)
  877. {
  878. int count;
  879. for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++)
  880. if (sysfs_streq(scope_string, shutdown_scopes[count].name))
  881. return &shutdown_scopes[count];
  882. return NULL;
  883. }
  884. static ssize_t shutdown_scope_show(struct device *device,
  885. struct device_attribute *attr,
  886. char *buf)
  887. {
  888. int i;
  889. for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) {
  890. if (&shutdown_scopes[i] == selected_scope) {
  891. strcat(buf, "[");
  892. strcat(buf, shutdown_scopes[i].name);
  893. strcat(buf, "]");
  894. } else {
  895. strcat(buf, shutdown_scopes[i].name);
  896. }
  897. strcat(buf, " ");
  898. }
  899. strcat(buf, "\n");
  900. return strlen(buf);
  901. }
  902. static ssize_t shutdown_scope_store(struct device *device,
  903. struct device_attribute *attr,
  904. const char *buf, size_t count)
  905. {
  906. int ret;
  907. struct zynqmp_pm_shutdown_scope *scope;
  908. scope = zynqmp_pm_is_shutdown_scope_valid(buf);
  909. if (!scope)
  910. return -EINVAL;
  911. ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
  912. scope->subtype);
  913. if (ret) {
  914. pr_err("unable to set shutdown scope %s\n", buf);
  915. return ret;
  916. }
  917. selected_scope = scope;
  918. return count;
  919. }
  920. static DEVICE_ATTR_RW(shutdown_scope);
  921. static ssize_t health_status_store(struct device *device,
  922. struct device_attribute *attr,
  923. const char *buf, size_t count)
  924. {
  925. int ret;
  926. unsigned int value;
  927. ret = kstrtouint(buf, 10, &value);
  928. if (ret)
  929. return ret;
  930. ret = zynqmp_pm_set_boot_health_status(value);
  931. if (ret) {
  932. dev_err(device, "unable to set healthy bit value to %u\n",
  933. value);
  934. return ret;
  935. }
  936. return count;
  937. }
  938. static DEVICE_ATTR_WO(health_status);
  939. static ssize_t ggs_show(struct device *device,
  940. struct device_attribute *attr,
  941. char *buf,
  942. u32 reg)
  943. {
  944. int ret;
  945. u32 ret_payload[PAYLOAD_ARG_CNT];
  946. ret = zynqmp_pm_read_ggs(reg, ret_payload);
  947. if (ret)
  948. return ret;
  949. return sprintf(buf, "0x%x\n", ret_payload[1]);
  950. }
  951. static ssize_t ggs_store(struct device *device,
  952. struct device_attribute *attr,
  953. const char *buf, size_t count,
  954. u32 reg)
  955. {
  956. long value;
  957. int ret;
  958. if (reg >= GSS_NUM_REGS)
  959. return -EINVAL;
  960. ret = kstrtol(buf, 16, &value);
  961. if (ret) {
  962. count = -EFAULT;
  963. goto err;
  964. }
  965. ret = zynqmp_pm_write_ggs(reg, value);
  966. if (ret)
  967. count = -EFAULT;
  968. err:
  969. return count;
  970. }
  971. /* GGS register show functions */
  972. #define GGS0_SHOW(N) \
  973. ssize_t ggs##N##_show(struct device *device, \
  974. struct device_attribute *attr, \
  975. char *buf) \
  976. { \
  977. return ggs_show(device, attr, buf, N); \
  978. }
  979. static GGS0_SHOW(0);
  980. static GGS0_SHOW(1);
  981. static GGS0_SHOW(2);
  982. static GGS0_SHOW(3);
  983. /* GGS register store function */
  984. #define GGS0_STORE(N) \
  985. ssize_t ggs##N##_store(struct device *device, \
  986. struct device_attribute *attr, \
  987. const char *buf, \
  988. size_t count) \
  989. { \
  990. return ggs_store(device, attr, buf, count, N); \
  991. }
  992. static GGS0_STORE(0);
  993. static GGS0_STORE(1);
  994. static GGS0_STORE(2);
  995. static GGS0_STORE(3);
  996. static ssize_t pggs_show(struct device *device,
  997. struct device_attribute *attr,
  998. char *buf,
  999. u32 reg)
  1000. {
  1001. int ret;
  1002. u32 ret_payload[PAYLOAD_ARG_CNT];
  1003. ret = zynqmp_pm_read_pggs(reg, ret_payload);
  1004. if (ret)
  1005. return ret;
  1006. return sprintf(buf, "0x%x\n", ret_payload[1]);
  1007. }
  1008. static ssize_t pggs_store(struct device *device,
  1009. struct device_attribute *attr,
  1010. const char *buf, size_t count,
  1011. u32 reg)
  1012. {
  1013. long value;
  1014. int ret;
  1015. if (reg >= GSS_NUM_REGS)
  1016. return -EINVAL;
  1017. ret = kstrtol(buf, 16, &value);
  1018. if (ret) {
  1019. count = -EFAULT;
  1020. goto err;
  1021. }
  1022. ret = zynqmp_pm_write_pggs(reg, value);
  1023. if (ret)
  1024. count = -EFAULT;
  1025. err:
  1026. return count;
  1027. }
  1028. #define PGGS0_SHOW(N) \
  1029. ssize_t pggs##N##_show(struct device *device, \
  1030. struct device_attribute *attr, \
  1031. char *buf) \
  1032. { \
  1033. return pggs_show(device, attr, buf, N); \
  1034. }
  1035. #define PGGS0_STORE(N) \
  1036. ssize_t pggs##N##_store(struct device *device, \
  1037. struct device_attribute *attr, \
  1038. const char *buf, \
  1039. size_t count) \
  1040. { \
  1041. return pggs_store(device, attr, buf, count, N); \
  1042. }
  1043. /* PGGS register show functions */
  1044. static PGGS0_SHOW(0);
  1045. static PGGS0_SHOW(1);
  1046. static PGGS0_SHOW(2);
  1047. static PGGS0_SHOW(3);
  1048. /* PGGS register store functions */
  1049. static PGGS0_STORE(0);
  1050. static PGGS0_STORE(1);
  1051. static PGGS0_STORE(2);
  1052. static PGGS0_STORE(3);
  1053. /* GGS register attributes */
  1054. static DEVICE_ATTR_RW(ggs0);
  1055. static DEVICE_ATTR_RW(ggs1);
  1056. static DEVICE_ATTR_RW(ggs2);
  1057. static DEVICE_ATTR_RW(ggs3);
  1058. /* PGGS register attributes */
  1059. static DEVICE_ATTR_RW(pggs0);
  1060. static DEVICE_ATTR_RW(pggs1);
  1061. static DEVICE_ATTR_RW(pggs2);
  1062. static DEVICE_ATTR_RW(pggs3);
  1063. static struct attribute *zynqmp_firmware_attrs[] = {
  1064. &dev_attr_ggs0.attr,
  1065. &dev_attr_ggs1.attr,
  1066. &dev_attr_ggs2.attr,
  1067. &dev_attr_ggs3.attr,
  1068. &dev_attr_pggs0.attr,
  1069. &dev_attr_pggs1.attr,
  1070. &dev_attr_pggs2.attr,
  1071. &dev_attr_pggs3.attr,
  1072. &dev_attr_shutdown_scope.attr,
  1073. &dev_attr_health_status.attr,
  1074. NULL,
  1075. };
  1076. ATTRIBUTE_GROUPS(zynqmp_firmware);
  1077. static int zynqmp_firmware_probe(struct platform_device *pdev)
  1078. {
  1079. struct device *dev = &pdev->dev;
  1080. struct device_node *np;
  1081. int ret;
  1082. np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp");
  1083. if (!np) {
  1084. np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
  1085. if (!np)
  1086. return 0;
  1087. feature_check_enabled = true;
  1088. }
  1089. of_node_put(np);
  1090. ret = get_set_conduit_method(dev->of_node);
  1091. if (ret)
  1092. return ret;
  1093. /* Check PM API version number */
  1094. zynqmp_pm_get_api_version(&pm_api_version);
  1095. if (pm_api_version < ZYNQMP_PM_VERSION) {
  1096. panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
  1097. __func__,
  1098. ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
  1099. pm_api_version >> 16, pm_api_version & 0xFFFF);
  1100. }
  1101. pr_info("%s Platform Management API v%d.%d\n", __func__,
  1102. pm_api_version >> 16, pm_api_version & 0xFFFF);
  1103. /* Check trustzone version number */
  1104. ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
  1105. if (ret)
  1106. panic("Legacy trustzone found without version support\n");
  1107. if (pm_tz_version < ZYNQMP_TZ_VERSION)
  1108. panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
  1109. __func__,
  1110. ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
  1111. pm_tz_version >> 16, pm_tz_version & 0xFFFF);
  1112. pr_info("%s Trustzone version v%d.%d\n", __func__,
  1113. pm_tz_version >> 16, pm_tz_version & 0xFFFF);
  1114. ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
  1115. ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
  1116. if (ret) {
  1117. dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
  1118. return ret;
  1119. }
  1120. zynqmp_pm_api_debugfs_init();
  1121. return of_platform_populate(dev->of_node, NULL, NULL, dev);
  1122. }
  1123. static int zynqmp_firmware_remove(struct platform_device *pdev)
  1124. {
  1125. struct pm_api_feature_data *feature_data;
  1126. struct hlist_node *tmp;
  1127. int i;
  1128. mfd_remove_devices(&pdev->dev);
  1129. zynqmp_pm_api_debugfs_exit();
  1130. hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) {
  1131. hash_del(&feature_data->hentry);
  1132. kfree(feature_data);
  1133. }
  1134. return 0;
  1135. }
  1136. static const struct of_device_id zynqmp_firmware_of_match[] = {
  1137. {.compatible = "xlnx,zynqmp-firmware"},
  1138. {.compatible = "xlnx,versal-firmware"},
  1139. {},
  1140. };
  1141. MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
  1142. static struct platform_driver zynqmp_firmware_driver = {
  1143. .driver = {
  1144. .name = "zynqmp_firmware",
  1145. .of_match_table = zynqmp_firmware_of_match,
  1146. .dev_groups = zynqmp_firmware_groups,
  1147. },
  1148. .probe = zynqmp_firmware_probe,
  1149. .remove = zynqmp_firmware_remove,
  1150. };
  1151. module_platform_driver(zynqmp_firmware_driver);