qcom_scm.h 3.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /* Copyright (c) 2010-2015,2019 The Linux Foundation. All rights reserved.
  3. */
  4. #ifndef __QCOM_SCM_INT_H
  5. #define __QCOM_SCM_INT_H
  6. enum qcom_scm_convention {
  7. SMC_CONVENTION_UNKNOWN,
  8. SMC_CONVENTION_LEGACY,
  9. SMC_CONVENTION_ARM_32,
  10. SMC_CONVENTION_ARM_64,
  11. };
  12. extern enum qcom_scm_convention qcom_scm_convention;
  13. #define MAX_QCOM_SCM_ARGS 10
  14. #define MAX_QCOM_SCM_RETS 3
  15. enum qcom_scm_arg_types {
  16. QCOM_SCM_VAL,
  17. QCOM_SCM_RO,
  18. QCOM_SCM_RW,
  19. QCOM_SCM_BUFVAL,
  20. };
  21. #define QCOM_SCM_ARGS_IMPL(num, a, b, c, d, e, f, g, h, i, j, ...) (\
  22. (((a) & 0x3) << 4) | \
  23. (((b) & 0x3) << 6) | \
  24. (((c) & 0x3) << 8) | \
  25. (((d) & 0x3) << 10) | \
  26. (((e) & 0x3) << 12) | \
  27. (((f) & 0x3) << 14) | \
  28. (((g) & 0x3) << 16) | \
  29. (((h) & 0x3) << 18) | \
  30. (((i) & 0x3) << 20) | \
  31. (((j) & 0x3) << 22) | \
  32. ((num) & 0xf))
  33. #define QCOM_SCM_ARGS(...) QCOM_SCM_ARGS_IMPL(__VA_ARGS__, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)
  34. /**
  35. * struct qcom_scm_desc
  36. * @arginfo: Metadata describing the arguments in args[]
  37. * @args: The array of arguments for the secure syscall
  38. */
  39. struct qcom_scm_desc {
  40. u32 svc;
  41. u32 cmd;
  42. u32 arginfo;
  43. u64 args[MAX_QCOM_SCM_ARGS];
  44. u32 owner;
  45. };
  46. /**
  47. * struct qcom_scm_res
  48. * @result: The values returned by the secure syscall
  49. */
  50. struct qcom_scm_res {
  51. u64 result[MAX_QCOM_SCM_RETS];
  52. };
  53. #define SCM_SMC_FNID(s, c) ((((s) & 0xFF) << 8) | ((c) & 0xFF))
  54. extern int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc,
  55. enum qcom_scm_convention qcom_convention,
  56. struct qcom_scm_res *res, bool atomic);
  57. #define scm_smc_call(dev, desc, res, atomic) \
  58. __scm_smc_call((dev), (desc), qcom_scm_convention, (res), (atomic))
  59. #define SCM_LEGACY_FNID(s, c) (((s) << 10) | ((c) & 0x3ff))
  60. extern int scm_legacy_call_atomic(struct device *dev,
  61. const struct qcom_scm_desc *desc,
  62. struct qcom_scm_res *res);
  63. extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
  64. struct qcom_scm_res *res);
  65. #define QCOM_SCM_SVC_BOOT 0x01
  66. #define QCOM_SCM_BOOT_SET_ADDR 0x01
  67. #define QCOM_SCM_BOOT_TERMINATE_PC 0x02
  68. #define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10
  69. #define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a
  70. #define QCOM_SCM_FLUSH_FLAG_MASK 0x3
  71. #define QCOM_SCM_SVC_PIL 0x02
  72. #define QCOM_SCM_PIL_PAS_INIT_IMAGE 0x01
  73. #define QCOM_SCM_PIL_PAS_MEM_SETUP 0x02
  74. #define QCOM_SCM_PIL_PAS_AUTH_AND_RESET 0x05
  75. #define QCOM_SCM_PIL_PAS_SHUTDOWN 0x06
  76. #define QCOM_SCM_PIL_PAS_IS_SUPPORTED 0x07
  77. #define QCOM_SCM_PIL_PAS_MSS_RESET 0x0a
  78. #define QCOM_SCM_SVC_IO 0x05
  79. #define QCOM_SCM_IO_READ 0x01
  80. #define QCOM_SCM_IO_WRITE 0x02
  81. #define QCOM_SCM_SVC_INFO 0x06
  82. #define QCOM_SCM_INFO_IS_CALL_AVAIL 0x01
  83. #define QCOM_SCM_SVC_MP 0x0c
  84. #define QCOM_SCM_MP_RESTORE_SEC_CFG 0x02
  85. #define QCOM_SCM_MP_IOMMU_SECURE_PTBL_SIZE 0x03
  86. #define QCOM_SCM_MP_IOMMU_SECURE_PTBL_INIT 0x04
  87. #define QCOM_SCM_MP_VIDEO_VAR 0x08
  88. #define QCOM_SCM_MP_ASSIGN 0x16
  89. #define QCOM_SCM_SVC_OCMEM 0x0f
  90. #define QCOM_SCM_OCMEM_LOCK_CMD 0x01
  91. #define QCOM_SCM_OCMEM_UNLOCK_CMD 0x02
  92. #define QCOM_SCM_SVC_ES 0x10 /* Enterprise Security */
  93. #define QCOM_SCM_ES_INVALIDATE_ICE_KEY 0x03
  94. #define QCOM_SCM_ES_CONFIG_SET_ICE_KEY 0x04
  95. #define QCOM_SCM_SVC_HDCP 0x11
  96. #define QCOM_SCM_HDCP_INVOKE 0x01
  97. #define QCOM_SCM_SVC_SMMU_PROGRAM 0x15
  98. #define QCOM_SCM_SMMU_CONFIG_ERRATA1 0x03
  99. #define QCOM_SCM_SMMU_CONFIG_ERRATA1_CLIENT_ALL 0x02
  100. extern void __qcom_scm_init(void);
  101. /* common error codes */
  102. #define QCOM_SCM_V2_EBUSY -12
  103. #define QCOM_SCM_ENOMEM -5
  104. #define QCOM_SCM_EOPNOTSUPP -4
  105. #define QCOM_SCM_EINVAL_ADDR -3
  106. #define QCOM_SCM_EINVAL_ARG -2
  107. #define QCOM_SCM_ERROR -1
  108. #define QCOM_SCM_INTERRUPTED 1
  109. static inline int qcom_scm_remap_error(int err)
  110. {
  111. switch (err) {
  112. case QCOM_SCM_ERROR:
  113. return -EIO;
  114. case QCOM_SCM_EINVAL_ADDR:
  115. case QCOM_SCM_EINVAL_ARG:
  116. return -EINVAL;
  117. case QCOM_SCM_EOPNOTSUPP:
  118. return -EOPNOTSUPP;
  119. case QCOM_SCM_ENOMEM:
  120. return -ENOMEM;
  121. case QCOM_SCM_V2_EBUSY:
  122. return -EBUSY;
  123. }
  124. return -EINVAL;
  125. }
  126. #endif