qcom_scm-legacy.c 6.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright (c) 2010,2015,2019 The Linux Foundation. All rights reserved.
  3. * Copyright (C) 2015 Linaro Ltd.
  4. */
  5. #include <linux/slab.h>
  6. #include <linux/io.h>
  7. #include <linux/module.h>
  8. #include <linux/mutex.h>
  9. #include <linux/errno.h>
  10. #include <linux/err.h>
  11. #include <linux/qcom_scm.h>
  12. #include <linux/arm-smccc.h>
  13. #include <linux/dma-mapping.h>
  14. #include "qcom_scm.h"
  15. static DEFINE_MUTEX(qcom_scm_lock);
  16. /**
  17. * struct arm_smccc_args
  18. * @args: The array of values used in registers in smc instruction
  19. */
  20. struct arm_smccc_args {
  21. unsigned long args[8];
  22. };
  23. /**
  24. * struct scm_legacy_command - one SCM command buffer
  25. * @len: total available memory for command and response
  26. * @buf_offset: start of command buffer
  27. * @resp_hdr_offset: start of response buffer
  28. * @id: command to be executed
  29. * @buf: buffer returned from scm_legacy_get_command_buffer()
  30. *
  31. * An SCM command is laid out in memory as follows:
  32. *
  33. * ------------------- <--- struct scm_legacy_command
  34. * | command header |
  35. * ------------------- <--- scm_legacy_get_command_buffer()
  36. * | command buffer |
  37. * ------------------- <--- struct scm_legacy_response and
  38. * | response header | scm_legacy_command_to_response()
  39. * ------------------- <--- scm_legacy_get_response_buffer()
  40. * | response buffer |
  41. * -------------------
  42. *
  43. * There can be arbitrary padding between the headers and buffers so
  44. * you should always use the appropriate scm_legacy_get_*_buffer() routines
  45. * to access the buffers in a safe manner.
  46. */
  47. struct scm_legacy_command {
  48. __le32 len;
  49. __le32 buf_offset;
  50. __le32 resp_hdr_offset;
  51. __le32 id;
  52. __le32 buf[];
  53. };
  54. /**
  55. * struct scm_legacy_response - one SCM response buffer
  56. * @len: total available memory for response
  57. * @buf_offset: start of response data relative to start of scm_legacy_response
  58. * @is_complete: indicates if the command has finished processing
  59. */
  60. struct scm_legacy_response {
  61. __le32 len;
  62. __le32 buf_offset;
  63. __le32 is_complete;
  64. };
  65. /**
  66. * scm_legacy_command_to_response() - Get a pointer to a scm_legacy_response
  67. * @cmd: command
  68. *
  69. * Returns a pointer to a response for a command.
  70. */
  71. static inline struct scm_legacy_response *scm_legacy_command_to_response(
  72. const struct scm_legacy_command *cmd)
  73. {
  74. return (void *)cmd + le32_to_cpu(cmd->resp_hdr_offset);
  75. }
  76. /**
  77. * scm_legacy_get_command_buffer() - Get a pointer to a command buffer
  78. * @cmd: command
  79. *
  80. * Returns a pointer to the command buffer of a command.
  81. */
  82. static inline void *scm_legacy_get_command_buffer(
  83. const struct scm_legacy_command *cmd)
  84. {
  85. return (void *)cmd->buf;
  86. }
  87. /**
  88. * scm_legacy_get_response_buffer() - Get a pointer to a response buffer
  89. * @rsp: response
  90. *
  91. * Returns a pointer to a response buffer of a response.
  92. */
  93. static inline void *scm_legacy_get_response_buffer(
  94. const struct scm_legacy_response *rsp)
  95. {
  96. return (void *)rsp + le32_to_cpu(rsp->buf_offset);
  97. }
  98. static void __scm_legacy_do(const struct arm_smccc_args *smc,
  99. struct arm_smccc_res *res)
  100. {
  101. do {
  102. arm_smccc_smc(smc->args[0], smc->args[1], smc->args[2],
  103. smc->args[3], smc->args[4], smc->args[5],
  104. smc->args[6], smc->args[7], res);
  105. } while (res->a0 == QCOM_SCM_INTERRUPTED);
  106. }
  107. /**
  108. * qcom_scm_call() - Sends a command to the SCM and waits for the command to
  109. * finish processing.
  110. *
  111. * A note on cache maintenance:
  112. * Note that any buffers that are expected to be accessed by the secure world
  113. * must be flushed before invoking qcom_scm_call and invalidated in the cache
  114. * immediately after qcom_scm_call returns. Cache maintenance on the command
  115. * and response buffers is taken care of by qcom_scm_call; however, callers are
  116. * responsible for any other cached buffers passed over to the secure world.
  117. */
  118. int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
  119. struct qcom_scm_res *res)
  120. {
  121. u8 arglen = desc->arginfo & 0xf;
  122. int ret = 0, context_id;
  123. unsigned int i;
  124. struct scm_legacy_command *cmd;
  125. struct scm_legacy_response *rsp;
  126. struct arm_smccc_args smc = {0};
  127. struct arm_smccc_res smc_res;
  128. const size_t cmd_len = arglen * sizeof(__le32);
  129. const size_t resp_len = MAX_QCOM_SCM_RETS * sizeof(__le32);
  130. size_t alloc_len = sizeof(*cmd) + cmd_len + sizeof(*rsp) + resp_len;
  131. dma_addr_t cmd_phys;
  132. __le32 *arg_buf;
  133. const __le32 *res_buf;
  134. cmd = kzalloc(PAGE_ALIGN(alloc_len), GFP_KERNEL);
  135. if (!cmd)
  136. return -ENOMEM;
  137. cmd->len = cpu_to_le32(alloc_len);
  138. cmd->buf_offset = cpu_to_le32(sizeof(*cmd));
  139. cmd->resp_hdr_offset = cpu_to_le32(sizeof(*cmd) + cmd_len);
  140. cmd->id = cpu_to_le32(SCM_LEGACY_FNID(desc->svc, desc->cmd));
  141. arg_buf = scm_legacy_get_command_buffer(cmd);
  142. for (i = 0; i < arglen; i++)
  143. arg_buf[i] = cpu_to_le32(desc->args[i]);
  144. rsp = scm_legacy_command_to_response(cmd);
  145. cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE);
  146. if (dma_mapping_error(dev, cmd_phys)) {
  147. kfree(cmd);
  148. return -ENOMEM;
  149. }
  150. smc.args[0] = 1;
  151. smc.args[1] = (unsigned long)&context_id;
  152. smc.args[2] = cmd_phys;
  153. mutex_lock(&qcom_scm_lock);
  154. __scm_legacy_do(&smc, &smc_res);
  155. if (smc_res.a0)
  156. ret = qcom_scm_remap_error(smc_res.a0);
  157. mutex_unlock(&qcom_scm_lock);
  158. if (ret)
  159. goto out;
  160. do {
  161. dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len,
  162. sizeof(*rsp), DMA_FROM_DEVICE);
  163. } while (!rsp->is_complete);
  164. dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len +
  165. le32_to_cpu(rsp->buf_offset),
  166. resp_len, DMA_FROM_DEVICE);
  167. if (res) {
  168. res_buf = scm_legacy_get_response_buffer(rsp);
  169. for (i = 0; i < MAX_QCOM_SCM_RETS; i++)
  170. res->result[i] = le32_to_cpu(res_buf[i]);
  171. }
  172. out:
  173. dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE);
  174. kfree(cmd);
  175. return ret;
  176. }
  177. #define SCM_LEGACY_ATOMIC_N_REG_ARGS 5
  178. #define SCM_LEGACY_ATOMIC_FIRST_REG_IDX 2
  179. #define SCM_LEGACY_CLASS_REGISTER (0x2 << 8)
  180. #define SCM_LEGACY_MASK_IRQS BIT(5)
  181. #define SCM_LEGACY_ATOMIC_ID(svc, cmd, n) \
  182. ((SCM_LEGACY_FNID(svc, cmd) << 12) | \
  183. SCM_LEGACY_CLASS_REGISTER | \
  184. SCM_LEGACY_MASK_IRQS | \
  185. (n & 0xf))
  186. /**
  187. * qcom_scm_call_atomic() - Send an atomic SCM command with up to 5 arguments
  188. * and 3 return values
  189. * @desc: SCM call descriptor containing arguments
  190. * @res: SCM call return values
  191. *
  192. * This shall only be used with commands that are guaranteed to be
  193. * uninterruptable, atomic and SMP safe.
  194. */
  195. int scm_legacy_call_atomic(struct device *unused,
  196. const struct qcom_scm_desc *desc,
  197. struct qcom_scm_res *res)
  198. {
  199. int context_id;
  200. struct arm_smccc_res smc_res;
  201. size_t arglen = desc->arginfo & 0xf;
  202. BUG_ON(arglen > SCM_LEGACY_ATOMIC_N_REG_ARGS);
  203. arm_smccc_smc(SCM_LEGACY_ATOMIC_ID(desc->svc, desc->cmd, arglen),
  204. (unsigned long)&context_id,
  205. desc->args[0], desc->args[1], desc->args[2],
  206. desc->args[3], desc->args[4], 0, &smc_res);
  207. if (res) {
  208. res->result[0] = smc_res.a1;
  209. res->result[1] = smc_res.a2;
  210. res->result[2] = smc_res.a3;
  211. }
  212. return smc_res.a0;
  213. }