cper-x86.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (C) 2018, Advanced Micro Devices, Inc.
  3. #include <linux/cper.h>
  4. /*
  5. * We don't need a "CPER_IA" prefix since these are all locally defined.
  6. * This will save us a lot of line space.
  7. */
  8. #define VALID_LAPIC_ID BIT_ULL(0)
  9. #define VALID_CPUID_INFO BIT_ULL(1)
  10. #define VALID_PROC_ERR_INFO_NUM(bits) (((bits) & GENMASK_ULL(7, 2)) >> 2)
  11. #define VALID_PROC_CXT_INFO_NUM(bits) (((bits) & GENMASK_ULL(13, 8)) >> 8)
  12. #define INFO_ERR_STRUCT_TYPE_CACHE \
  13. GUID_INIT(0xA55701F5, 0xE3EF, 0x43DE, 0xAC, 0x72, 0x24, 0x9B, \
  14. 0x57, 0x3F, 0xAD, 0x2C)
  15. #define INFO_ERR_STRUCT_TYPE_TLB \
  16. GUID_INIT(0xFC06B535, 0x5E1F, 0x4562, 0x9F, 0x25, 0x0A, 0x3B, \
  17. 0x9A, 0xDB, 0x63, 0xC3)
  18. #define INFO_ERR_STRUCT_TYPE_BUS \
  19. GUID_INIT(0x1CF3F8B3, 0xC5B1, 0x49a2, 0xAA, 0x59, 0x5E, 0xEF, \
  20. 0x92, 0xFF, 0xA6, 0x3C)
  21. #define INFO_ERR_STRUCT_TYPE_MS \
  22. GUID_INIT(0x48AB7F57, 0xDC34, 0x4f6c, 0xA7, 0xD3, 0xB0, 0xB5, \
  23. 0xB0, 0xA7, 0x43, 0x14)
  24. #define INFO_VALID_CHECK_INFO BIT_ULL(0)
  25. #define INFO_VALID_TARGET_ID BIT_ULL(1)
  26. #define INFO_VALID_REQUESTOR_ID BIT_ULL(2)
  27. #define INFO_VALID_RESPONDER_ID BIT_ULL(3)
  28. #define INFO_VALID_IP BIT_ULL(4)
  29. #define CHECK_VALID_TRANS_TYPE BIT_ULL(0)
  30. #define CHECK_VALID_OPERATION BIT_ULL(1)
  31. #define CHECK_VALID_LEVEL BIT_ULL(2)
  32. #define CHECK_VALID_PCC BIT_ULL(3)
  33. #define CHECK_VALID_UNCORRECTED BIT_ULL(4)
  34. #define CHECK_VALID_PRECISE_IP BIT_ULL(5)
  35. #define CHECK_VALID_RESTARTABLE_IP BIT_ULL(6)
  36. #define CHECK_VALID_OVERFLOW BIT_ULL(7)
  37. #define CHECK_VALID_BUS_PART_TYPE BIT_ULL(8)
  38. #define CHECK_VALID_BUS_TIME_OUT BIT_ULL(9)
  39. #define CHECK_VALID_BUS_ADDR_SPACE BIT_ULL(10)
  40. #define CHECK_VALID_BITS(check) (((check) & GENMASK_ULL(15, 0)))
  41. #define CHECK_TRANS_TYPE(check) (((check) & GENMASK_ULL(17, 16)) >> 16)
  42. #define CHECK_OPERATION(check) (((check) & GENMASK_ULL(21, 18)) >> 18)
  43. #define CHECK_LEVEL(check) (((check) & GENMASK_ULL(24, 22)) >> 22)
  44. #define CHECK_PCC BIT_ULL(25)
  45. #define CHECK_UNCORRECTED BIT_ULL(26)
  46. #define CHECK_PRECISE_IP BIT_ULL(27)
  47. #define CHECK_RESTARTABLE_IP BIT_ULL(28)
  48. #define CHECK_OVERFLOW BIT_ULL(29)
  49. #define CHECK_BUS_PART_TYPE(check) (((check) & GENMASK_ULL(31, 30)) >> 30)
  50. #define CHECK_BUS_TIME_OUT BIT_ULL(32)
  51. #define CHECK_BUS_ADDR_SPACE(check) (((check) & GENMASK_ULL(34, 33)) >> 33)
  52. #define CHECK_VALID_MS_ERR_TYPE BIT_ULL(0)
  53. #define CHECK_VALID_MS_PCC BIT_ULL(1)
  54. #define CHECK_VALID_MS_UNCORRECTED BIT_ULL(2)
  55. #define CHECK_VALID_MS_PRECISE_IP BIT_ULL(3)
  56. #define CHECK_VALID_MS_RESTARTABLE_IP BIT_ULL(4)
  57. #define CHECK_VALID_MS_OVERFLOW BIT_ULL(5)
  58. #define CHECK_MS_ERR_TYPE(check) (((check) & GENMASK_ULL(18, 16)) >> 16)
  59. #define CHECK_MS_PCC BIT_ULL(19)
  60. #define CHECK_MS_UNCORRECTED BIT_ULL(20)
  61. #define CHECK_MS_PRECISE_IP BIT_ULL(21)
  62. #define CHECK_MS_RESTARTABLE_IP BIT_ULL(22)
  63. #define CHECK_MS_OVERFLOW BIT_ULL(23)
  64. #define CTX_TYPE_MSR 1
  65. #define CTX_TYPE_MMREG 7
  66. enum err_types {
  67. ERR_TYPE_CACHE = 0,
  68. ERR_TYPE_TLB,
  69. ERR_TYPE_BUS,
  70. ERR_TYPE_MS,
  71. N_ERR_TYPES
  72. };
  73. static enum err_types cper_get_err_type(const guid_t *err_type)
  74. {
  75. if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_CACHE))
  76. return ERR_TYPE_CACHE;
  77. else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_TLB))
  78. return ERR_TYPE_TLB;
  79. else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_BUS))
  80. return ERR_TYPE_BUS;
  81. else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_MS))
  82. return ERR_TYPE_MS;
  83. else
  84. return N_ERR_TYPES;
  85. }
  86. static const char * const ia_check_trans_type_strs[] = {
  87. "Instruction",
  88. "Data Access",
  89. "Generic",
  90. };
  91. static const char * const ia_check_op_strs[] = {
  92. "generic error",
  93. "generic read",
  94. "generic write",
  95. "data read",
  96. "data write",
  97. "instruction fetch",
  98. "prefetch",
  99. "eviction",
  100. "snoop",
  101. };
  102. static const char * const ia_check_bus_part_type_strs[] = {
  103. "Local Processor originated request",
  104. "Local Processor responded to request",
  105. "Local Processor observed",
  106. "Generic",
  107. };
  108. static const char * const ia_check_bus_addr_space_strs[] = {
  109. "Memory Access",
  110. "Reserved",
  111. "I/O",
  112. "Other Transaction",
  113. };
  114. static const char * const ia_check_ms_error_type_strs[] = {
  115. "No Error",
  116. "Unclassified",
  117. "Microcode ROM Parity Error",
  118. "External Error",
  119. "FRC Error",
  120. "Internal Unclassified",
  121. };
  122. static const char * const ia_reg_ctx_strs[] = {
  123. "Unclassified Data",
  124. "MSR Registers (Machine Check and other MSRs)",
  125. "32-bit Mode Execution Context",
  126. "64-bit Mode Execution Context",
  127. "FXSAVE Context",
  128. "32-bit Mode Debug Registers (DR0-DR7)",
  129. "64-bit Mode Debug Registers (DR0-DR7)",
  130. "Memory Mapped Registers",
  131. };
  132. static inline void print_bool(char *str, const char *pfx, u64 check, u64 bit)
  133. {
  134. printk("%s%s: %s\n", pfx, str, (check & bit) ? "true" : "false");
  135. }
  136. static void print_err_info_ms(const char *pfx, u16 validation_bits, u64 check)
  137. {
  138. if (validation_bits & CHECK_VALID_MS_ERR_TYPE) {
  139. u8 err_type = CHECK_MS_ERR_TYPE(check);
  140. printk("%sError Type: %u, %s\n", pfx, err_type,
  141. err_type < ARRAY_SIZE(ia_check_ms_error_type_strs) ?
  142. ia_check_ms_error_type_strs[err_type] : "unknown");
  143. }
  144. if (validation_bits & CHECK_VALID_MS_PCC)
  145. print_bool("Processor Context Corrupt", pfx, check, CHECK_MS_PCC);
  146. if (validation_bits & CHECK_VALID_MS_UNCORRECTED)
  147. print_bool("Uncorrected", pfx, check, CHECK_MS_UNCORRECTED);
  148. if (validation_bits & CHECK_VALID_MS_PRECISE_IP)
  149. print_bool("Precise IP", pfx, check, CHECK_MS_PRECISE_IP);
  150. if (validation_bits & CHECK_VALID_MS_RESTARTABLE_IP)
  151. print_bool("Restartable IP", pfx, check, CHECK_MS_RESTARTABLE_IP);
  152. if (validation_bits & CHECK_VALID_MS_OVERFLOW)
  153. print_bool("Overflow", pfx, check, CHECK_MS_OVERFLOW);
  154. }
  155. static void print_err_info(const char *pfx, u8 err_type, u64 check)
  156. {
  157. u16 validation_bits = CHECK_VALID_BITS(check);
  158. /*
  159. * The MS Check structure varies a lot from the others, so use a
  160. * separate function for decoding.
  161. */
  162. if (err_type == ERR_TYPE_MS)
  163. return print_err_info_ms(pfx, validation_bits, check);
  164. if (validation_bits & CHECK_VALID_TRANS_TYPE) {
  165. u8 trans_type = CHECK_TRANS_TYPE(check);
  166. printk("%sTransaction Type: %u, %s\n", pfx, trans_type,
  167. trans_type < ARRAY_SIZE(ia_check_trans_type_strs) ?
  168. ia_check_trans_type_strs[trans_type] : "unknown");
  169. }
  170. if (validation_bits & CHECK_VALID_OPERATION) {
  171. u8 op = CHECK_OPERATION(check);
  172. /*
  173. * CACHE has more operation types than TLB or BUS, though the
  174. * name and the order are the same.
  175. */
  176. u8 max_ops = (err_type == ERR_TYPE_CACHE) ? 9 : 7;
  177. printk("%sOperation: %u, %s\n", pfx, op,
  178. op < max_ops ? ia_check_op_strs[op] : "unknown");
  179. }
  180. if (validation_bits & CHECK_VALID_LEVEL)
  181. printk("%sLevel: %llu\n", pfx, CHECK_LEVEL(check));
  182. if (validation_bits & CHECK_VALID_PCC)
  183. print_bool("Processor Context Corrupt", pfx, check, CHECK_PCC);
  184. if (validation_bits & CHECK_VALID_UNCORRECTED)
  185. print_bool("Uncorrected", pfx, check, CHECK_UNCORRECTED);
  186. if (validation_bits & CHECK_VALID_PRECISE_IP)
  187. print_bool("Precise IP", pfx, check, CHECK_PRECISE_IP);
  188. if (validation_bits & CHECK_VALID_RESTARTABLE_IP)
  189. print_bool("Restartable IP", pfx, check, CHECK_RESTARTABLE_IP);
  190. if (validation_bits & CHECK_VALID_OVERFLOW)
  191. print_bool("Overflow", pfx, check, CHECK_OVERFLOW);
  192. if (err_type != ERR_TYPE_BUS)
  193. return;
  194. if (validation_bits & CHECK_VALID_BUS_PART_TYPE) {
  195. u8 part_type = CHECK_BUS_PART_TYPE(check);
  196. printk("%sParticipation Type: %u, %s\n", pfx, part_type,
  197. part_type < ARRAY_SIZE(ia_check_bus_part_type_strs) ?
  198. ia_check_bus_part_type_strs[part_type] : "unknown");
  199. }
  200. if (validation_bits & CHECK_VALID_BUS_TIME_OUT)
  201. print_bool("Time Out", pfx, check, CHECK_BUS_TIME_OUT);
  202. if (validation_bits & CHECK_VALID_BUS_ADDR_SPACE) {
  203. u8 addr_space = CHECK_BUS_ADDR_SPACE(check);
  204. printk("%sAddress Space: %u, %s\n", pfx, addr_space,
  205. addr_space < ARRAY_SIZE(ia_check_bus_addr_space_strs) ?
  206. ia_check_bus_addr_space_strs[addr_space] : "unknown");
  207. }
  208. }
  209. void cper_print_proc_ia(const char *pfx, const struct cper_sec_proc_ia *proc)
  210. {
  211. int i;
  212. struct cper_ia_err_info *err_info;
  213. struct cper_ia_proc_ctx *ctx_info;
  214. char newpfx[64], infopfx[64];
  215. u8 err_type;
  216. if (proc->validation_bits & VALID_LAPIC_ID)
  217. printk("%sLocal APIC_ID: 0x%llx\n", pfx, proc->lapic_id);
  218. if (proc->validation_bits & VALID_CPUID_INFO) {
  219. printk("%sCPUID Info:\n", pfx);
  220. print_hex_dump(pfx, "", DUMP_PREFIX_OFFSET, 16, 4, proc->cpuid,
  221. sizeof(proc->cpuid), 0);
  222. }
  223. snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
  224. err_info = (struct cper_ia_err_info *)(proc + 1);
  225. for (i = 0; i < VALID_PROC_ERR_INFO_NUM(proc->validation_bits); i++) {
  226. printk("%sError Information Structure %d:\n", pfx, i);
  227. err_type = cper_get_err_type(&err_info->err_type);
  228. printk("%sError Structure Type: %s\n", newpfx,
  229. err_type < ARRAY_SIZE(cper_proc_error_type_strs) ?
  230. cper_proc_error_type_strs[err_type] : "unknown");
  231. if (err_type >= N_ERR_TYPES) {
  232. printk("%sError Structure Type: %pUl\n", newpfx,
  233. &err_info->err_type);
  234. }
  235. if (err_info->validation_bits & INFO_VALID_CHECK_INFO) {
  236. printk("%sCheck Information: 0x%016llx\n", newpfx,
  237. err_info->check_info);
  238. if (err_type < N_ERR_TYPES) {
  239. snprintf(infopfx, sizeof(infopfx), "%s ",
  240. newpfx);
  241. print_err_info(infopfx, err_type,
  242. err_info->check_info);
  243. }
  244. }
  245. if (err_info->validation_bits & INFO_VALID_TARGET_ID) {
  246. printk("%sTarget Identifier: 0x%016llx\n",
  247. newpfx, err_info->target_id);
  248. }
  249. if (err_info->validation_bits & INFO_VALID_REQUESTOR_ID) {
  250. printk("%sRequestor Identifier: 0x%016llx\n",
  251. newpfx, err_info->requestor_id);
  252. }
  253. if (err_info->validation_bits & INFO_VALID_RESPONDER_ID) {
  254. printk("%sResponder Identifier: 0x%016llx\n",
  255. newpfx, err_info->responder_id);
  256. }
  257. if (err_info->validation_bits & INFO_VALID_IP) {
  258. printk("%sInstruction Pointer: 0x%016llx\n",
  259. newpfx, err_info->ip);
  260. }
  261. err_info++;
  262. }
  263. ctx_info = (struct cper_ia_proc_ctx *)err_info;
  264. for (i = 0; i < VALID_PROC_CXT_INFO_NUM(proc->validation_bits); i++) {
  265. int size = sizeof(*ctx_info) + ctx_info->reg_arr_size;
  266. int groupsize = 4;
  267. printk("%sContext Information Structure %d:\n", pfx, i);
  268. printk("%sRegister Context Type: %s\n", newpfx,
  269. ctx_info->reg_ctx_type < ARRAY_SIZE(ia_reg_ctx_strs) ?
  270. ia_reg_ctx_strs[ctx_info->reg_ctx_type] : "unknown");
  271. printk("%sRegister Array Size: 0x%04x\n", newpfx,
  272. ctx_info->reg_arr_size);
  273. if (ctx_info->reg_ctx_type == CTX_TYPE_MSR) {
  274. groupsize = 8; /* MSRs are 8 bytes wide. */
  275. printk("%sMSR Address: 0x%08x\n", newpfx,
  276. ctx_info->msr_addr);
  277. }
  278. if (ctx_info->reg_ctx_type == CTX_TYPE_MMREG) {
  279. printk("%sMM Register Address: 0x%016llx\n", newpfx,
  280. ctx_info->mm_reg_addr);
  281. }
  282. printk("%sRegister Array:\n", newpfx);
  283. print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, groupsize,
  284. (ctx_info + 1), ctx_info->reg_arr_size, 0);
  285. ctx_info = (struct cper_ia_proc_ctx *)((long)ctx_info + size);
  286. }
  287. }