shdma.h 1.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Renesas SuperH DMA Engine support
  4. *
  5. * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
  6. * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
  7. *
  8. */
  9. #ifndef __DMA_SHDMA_H
  10. #define __DMA_SHDMA_H
  11. #include <linux/sh_dma.h>
  12. #include <linux/shdma-base.h>
  13. #include <linux/dmaengine.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #define SH_DMAE_MAX_CHANNELS 20
  17. #define SH_DMAE_TCR_MAX 0x00FFFFFF /* 16MB */
  18. struct device;
  19. struct sh_dmae_chan {
  20. struct shdma_chan shdma_chan;
  21. const struct sh_dmae_slave_config *config; /* Slave DMA configuration */
  22. int xmit_shift; /* log_2(bytes_per_xfer) */
  23. void __iomem *base;
  24. char dev_id[16]; /* unique name per DMAC of channel */
  25. int pm_error;
  26. dma_addr_t slave_addr;
  27. };
  28. struct sh_dmae_device {
  29. struct shdma_dev shdma_dev;
  30. struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS];
  31. const struct sh_dmae_pdata *pdata;
  32. struct list_head node;
  33. void __iomem *chan_reg;
  34. void __iomem *dmars;
  35. unsigned int chcr_offset;
  36. u32 chcr_ie_bit;
  37. };
  38. struct sh_dmae_regs {
  39. u32 sar; /* SAR / source address */
  40. u32 dar; /* DAR / destination address */
  41. u32 tcr; /* TCR / transfer count */
  42. };
  43. struct sh_dmae_desc {
  44. struct sh_dmae_regs hw;
  45. struct shdma_desc shdma_desc;
  46. };
  47. #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, shdma_chan)
  48. #define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
  49. #define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)
  50. #define to_sh_dev(chan) container_of(chan->shdma_chan.dma_chan.device,\
  51. struct sh_dmae_device, shdma_dev.dma_dev)
  52. #endif /* __DMA_SHDMA_H */