Kconfig 21 KB

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  1. # SPDX-License-Identifier: GPL-2.0-only
  2. #
  3. # DMA engine configuration
  4. #
  5. menuconfig DMADEVICES
  6. bool "DMA Engine support"
  7. depends on HAS_DMA
  8. help
  9. DMA engines can do asynchronous data transfers without
  10. involving the host CPU. Currently, this framework can be
  11. used to offload memory copies in the network stack and
  12. RAID operations in the MD driver. This menu only presents
  13. DMA Device drivers supported by the configured arch, it may
  14. be empty in some cases.
  15. config DMADEVICES_DEBUG
  16. bool "DMA Engine debugging"
  17. depends on DMADEVICES != n
  18. help
  19. This is an option for use by developers; most people should
  20. say N here. This enables DMA engine core and driver debugging.
  21. config DMADEVICES_VDEBUG
  22. bool "DMA Engine verbose debugging"
  23. depends on DMADEVICES_DEBUG != n
  24. help
  25. This is an option for use by developers; most people should
  26. say N here. This enables deeper (more verbose) debugging of
  27. the DMA engine core and drivers.
  28. if DMADEVICES
  29. comment "DMA Devices"
  30. #core
  31. config ASYNC_TX_ENABLE_CHANNEL_SWITCH
  32. bool
  33. config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  34. bool
  35. config DMA_ENGINE
  36. bool
  37. config DMA_VIRTUAL_CHANNELS
  38. tristate
  39. config DMA_ACPI
  40. def_bool y
  41. depends on ACPI
  42. config DMA_OF
  43. def_bool y
  44. depends on OF
  45. select DMA_ENGINE
  46. #devices
  47. config ALTERA_MSGDMA
  48. tristate "Altera / Intel mSGDMA Engine"
  49. depends on HAS_IOMEM
  50. select DMA_ENGINE
  51. help
  52. Enable support for Altera / Intel mSGDMA controller.
  53. config AMBA_PL08X
  54. bool "ARM PrimeCell PL080 or PL081 support"
  55. depends on ARM_AMBA
  56. select DMA_ENGINE
  57. select DMA_VIRTUAL_CHANNELS
  58. help
  59. Say yes if your platform has a PL08x DMAC device which can
  60. provide DMA engine support. This includes the original ARM
  61. PL080 and PL081, Samsungs PL080 derivative and Faraday
  62. Technology's FTDMAC020 PL080 derivative.
  63. config AMCC_PPC440SPE_ADMA
  64. tristate "AMCC PPC440SPe ADMA support"
  65. depends on 440SPe || 440SP
  66. select DMA_ENGINE
  67. select DMA_ENGINE_RAID
  68. select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  69. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  70. help
  71. Enable support for the AMCC PPC440SPe RAID engines.
  72. config AT_HDMAC
  73. tristate "Atmel AHB DMA support"
  74. depends on ARCH_AT91
  75. select DMA_ENGINE
  76. help
  77. Support the Atmel AHB DMA controller.
  78. config AT_XDMAC
  79. tristate "Atmel XDMA support"
  80. depends on ARCH_AT91
  81. select DMA_ENGINE
  82. help
  83. Support the Atmel XDMA controller.
  84. config AXI_DMAC
  85. tristate "Analog Devices AXI-DMAC DMA support"
  86. depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST
  87. select DMA_ENGINE
  88. select DMA_VIRTUAL_CHANNELS
  89. select REGMAP_MMIO
  90. help
  91. Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
  92. controller is often used in Analog Devices' reference designs for FPGA
  93. platforms.
  94. config BCM_SBA_RAID
  95. tristate "Broadcom SBA RAID engine support"
  96. depends on ARM64 || COMPILE_TEST
  97. depends on MAILBOX && RAID6_PQ
  98. select DMA_ENGINE
  99. select DMA_ENGINE_RAID
  100. select ASYNC_TX_DISABLE_XOR_VAL_DMA
  101. select ASYNC_TX_DISABLE_PQ_VAL_DMA
  102. default m if ARCH_BCM_IPROC
  103. help
  104. Enable support for Broadcom SBA RAID Engine. The SBA RAID
  105. engine is available on most of the Broadcom iProc SoCs. It
  106. has the capability to offload memcpy, xor and pq computation
  107. for raid5/6.
  108. config COH901318
  109. bool "ST-Ericsson COH901318 DMA support"
  110. select DMA_ENGINE
  111. depends on ARCH_U300 || COMPILE_TEST
  112. help
  113. Enable support for ST-Ericsson COH 901 318 DMA.
  114. config DMA_BCM2835
  115. tristate "BCM2835 DMA engine support"
  116. depends on ARCH_BCM2835
  117. select DMA_ENGINE
  118. select DMA_VIRTUAL_CHANNELS
  119. config DMA_JZ4780
  120. tristate "JZ4780 DMA support"
  121. depends on MIPS || COMPILE_TEST
  122. select DMA_ENGINE
  123. select DMA_VIRTUAL_CHANNELS
  124. help
  125. This selects support for the DMA controller in Ingenic JZ4780 SoCs.
  126. If you have a board based on such a SoC and wish to use DMA for
  127. devices which can use the DMA controller, say Y or M here.
  128. config DMA_SA11X0
  129. tristate "SA-11x0 DMA support"
  130. depends on ARCH_SA1100 || COMPILE_TEST
  131. select DMA_ENGINE
  132. select DMA_VIRTUAL_CHANNELS
  133. help
  134. Support the DMA engine found on Intel StrongARM SA-1100 and
  135. SA-1110 SoCs. This DMA engine can only be used with on-chip
  136. devices.
  137. config DMA_SUN4I
  138. tristate "Allwinner A10 DMA SoCs support"
  139. depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
  140. default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
  141. select DMA_ENGINE
  142. select DMA_VIRTUAL_CHANNELS
  143. help
  144. Enable support for the DMA controller present in the sun4i,
  145. sun5i and sun7i Allwinner ARM SoCs.
  146. config DMA_SUN6I
  147. tristate "Allwinner A31 SoCs DMA support"
  148. depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
  149. depends on RESET_CONTROLLER
  150. select DMA_ENGINE
  151. select DMA_VIRTUAL_CHANNELS
  152. help
  153. Support for the DMA engine first found in Allwinner A31 SoCs.
  154. config DW_AXI_DMAC
  155. tristate "Synopsys DesignWare AXI DMA support"
  156. depends on OF || COMPILE_TEST
  157. select DMA_ENGINE
  158. select DMA_VIRTUAL_CHANNELS
  159. help
  160. Enable support for Synopsys DesignWare AXI DMA controller.
  161. NOTE: This driver wasn't tested on 64 bit platform because
  162. of lack 64 bit platform with Synopsys DW AXI DMAC.
  163. config EP93XX_DMA
  164. bool "Cirrus Logic EP93xx DMA support"
  165. depends on ARCH_EP93XX || COMPILE_TEST
  166. select DMA_ENGINE
  167. help
  168. Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
  169. config FSL_DMA
  170. tristate "Freescale Elo series DMA support"
  171. depends on FSL_SOC
  172. select DMA_ENGINE
  173. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  174. help
  175. Enable support for the Freescale Elo series DMA controllers.
  176. The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
  177. EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
  178. some Txxx and Bxxx parts.
  179. config FSL_EDMA
  180. tristate "Freescale eDMA engine support"
  181. depends on OF
  182. select DMA_ENGINE
  183. select DMA_VIRTUAL_CHANNELS
  184. help
  185. Support the Freescale eDMA engine with programmable channel
  186. multiplexing capability for DMA request sources(slot).
  187. This module can be found on Freescale Vybrid and LS-1 SoCs.
  188. config FSL_QDMA
  189. tristate "NXP Layerscape qDMA engine support"
  190. depends on ARM || ARM64
  191. select DMA_ENGINE
  192. select DMA_VIRTUAL_CHANNELS
  193. select DMA_ENGINE_RAID
  194. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  195. help
  196. Support the NXP Layerscape qDMA engine with command queue and legacy mode.
  197. Channel virtualization is supported through enqueuing of DMA jobs to,
  198. or dequeuing DMA jobs from, different work queues.
  199. This module can be found on NXP Layerscape SoCs.
  200. The qdma driver only work on SoCs with a DPAA hardware block.
  201. config FSL_RAID
  202. tristate "Freescale RAID engine Support"
  203. depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
  204. select DMA_ENGINE
  205. select DMA_ENGINE_RAID
  206. help
  207. Enable support for Freescale RAID Engine. RAID Engine is
  208. available on some QorIQ SoCs (like P5020/P5040). It has
  209. the capability to offload memcpy, xor and pq computation
  210. for raid5/6.
  211. config HISI_DMA
  212. tristate "HiSilicon DMA Engine support"
  213. depends on ARM64 || COMPILE_TEST
  214. depends on PCI_MSI
  215. select DMA_ENGINE
  216. select DMA_VIRTUAL_CHANNELS
  217. help
  218. Support HiSilicon Kunpeng DMA engine.
  219. config IMG_MDC_DMA
  220. tristate "IMG MDC support"
  221. depends on MIPS || COMPILE_TEST
  222. depends on MFD_SYSCON
  223. select DMA_ENGINE
  224. select DMA_VIRTUAL_CHANNELS
  225. help
  226. Enable support for the IMG multi-threaded DMA controller (MDC).
  227. config IMX_DMA
  228. tristate "i.MX DMA support"
  229. depends on ARCH_MXC
  230. select DMA_ENGINE
  231. help
  232. Support the i.MX DMA engine. This engine is integrated into
  233. Freescale i.MX1/21/27 chips.
  234. config IMX_SDMA
  235. tristate "i.MX SDMA support"
  236. depends on ARCH_MXC
  237. select DMA_ENGINE
  238. select DMA_VIRTUAL_CHANNELS
  239. help
  240. Support the i.MX SDMA engine. This engine is integrated into
  241. Freescale i.MX25/31/35/51/53/6 chips.
  242. config INTEL_IDMA64
  243. tristate "Intel integrated DMA 64-bit support"
  244. select DMA_ENGINE
  245. select DMA_VIRTUAL_CHANNELS
  246. help
  247. Enable DMA support for Intel Low Power Subsystem such as found on
  248. Intel Skylake PCH.
  249. config INTEL_IDXD
  250. tristate "Intel Data Accelerators support"
  251. depends on PCI && X86_64 && !UML
  252. depends on PCI_MSI
  253. depends on SBITMAP
  254. select DMA_ENGINE
  255. help
  256. Enable support for the Intel(R) data accelerators present
  257. in Intel Xeon CPU.
  258. Say Y if you have such a platform.
  259. If unsure, say N.
  260. config INTEL_IOATDMA
  261. tristate "Intel I/OAT DMA support"
  262. depends on PCI && X86_64 && !UML
  263. select DMA_ENGINE
  264. select DMA_ENGINE_RAID
  265. select DCA
  266. help
  267. Enable support for the Intel(R) I/OAT DMA engine present
  268. in recent Intel Xeon chipsets.
  269. Say Y here if you have such a chipset.
  270. If unsure, say N.
  271. config INTEL_IOP_ADMA
  272. tristate "Intel IOP32x ADMA support"
  273. depends on ARCH_IOP32X || COMPILE_TEST
  274. select DMA_ENGINE
  275. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  276. help
  277. Enable support for the Intel(R) IOP Series RAID engines.
  278. config K3_DMA
  279. tristate "Hisilicon K3 DMA support"
  280. depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
  281. select DMA_ENGINE
  282. select DMA_VIRTUAL_CHANNELS
  283. help
  284. Support the DMA engine for Hisilicon K3 platform
  285. devices.
  286. config LPC18XX_DMAMUX
  287. bool "NXP LPC18xx/43xx DMA MUX for PL080"
  288. depends on ARCH_LPC18XX || COMPILE_TEST
  289. depends on OF && AMBA_PL08X
  290. select MFD_SYSCON
  291. help
  292. Enable support for DMA on NXP LPC18xx/43xx platforms
  293. with PL080 and multiplexed DMA request lines.
  294. config MCF_EDMA
  295. tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
  296. depends on M5441x || COMPILE_TEST
  297. select DMA_ENGINE
  298. select DMA_VIRTUAL_CHANNELS
  299. help
  300. Support the Freescale ColdFire eDMA engine, 64-channel
  301. implementation that performs complex data transfers with
  302. minimal intervention from a host processor.
  303. This module can be found on Freescale ColdFire mcf5441x SoCs.
  304. config MILBEAUT_HDMAC
  305. tristate "Milbeaut AHB DMA support"
  306. depends on ARCH_MILBEAUT || COMPILE_TEST
  307. depends on OF
  308. select DMA_ENGINE
  309. select DMA_VIRTUAL_CHANNELS
  310. help
  311. Say yes here to support the Socionext Milbeaut
  312. HDMAC device.
  313. config MILBEAUT_XDMAC
  314. tristate "Milbeaut AXI DMA support"
  315. depends on ARCH_MILBEAUT || COMPILE_TEST
  316. depends on OF
  317. select DMA_ENGINE
  318. select DMA_VIRTUAL_CHANNELS
  319. help
  320. Say yes here to support the Socionext Milbeaut
  321. XDMAC device.
  322. config MMP_PDMA
  323. bool "MMP PDMA support"
  324. depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
  325. select DMA_ENGINE
  326. help
  327. Support the MMP PDMA engine for PXA and MMP platform.
  328. config MMP_TDMA
  329. bool "MMP Two-Channel DMA support"
  330. depends on ARCH_MMP || COMPILE_TEST
  331. select DMA_ENGINE
  332. select GENERIC_ALLOCATOR
  333. help
  334. Support the MMP Two-Channel DMA engine.
  335. This engine used for MMP Audio DMA and pxa910 SQU.
  336. config MOXART_DMA
  337. tristate "MOXART DMA support"
  338. depends on ARCH_MOXART
  339. select DMA_ENGINE
  340. select DMA_VIRTUAL_CHANNELS
  341. help
  342. Enable support for the MOXA ART SoC DMA controller.
  343. Say Y here if you enabled MMP ADMA, otherwise say N.
  344. config MPC512X_DMA
  345. tristate "Freescale MPC512x built-in DMA engine support"
  346. depends on PPC_MPC512x || PPC_MPC831x
  347. select DMA_ENGINE
  348. help
  349. Enable support for the Freescale MPC512x built-in DMA engine.
  350. config MV_XOR
  351. bool "Marvell XOR engine support"
  352. depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
  353. select DMA_ENGINE
  354. select DMA_ENGINE_RAID
  355. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  356. help
  357. Enable support for the Marvell XOR engine.
  358. config MV_XOR_V2
  359. bool "Marvell XOR engine version 2 support "
  360. depends on ARM64
  361. select DMA_ENGINE
  362. select DMA_ENGINE_RAID
  363. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  364. select GENERIC_MSI_IRQ_DOMAIN
  365. help
  366. Enable support for the Marvell version 2 XOR engine.
  367. This engine provides acceleration for copy, XOR and RAID6
  368. operations, and is available on Marvell Armada 7K and 8K
  369. platforms.
  370. config MXS_DMA
  371. bool "MXS DMA support"
  372. depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
  373. select STMP_DEVICE
  374. select DMA_ENGINE
  375. help
  376. Support the MXS DMA engine. This engine including APBH-DMA
  377. and APBX-DMA is integrated into some Freescale chips.
  378. config MX3_IPU
  379. bool "MX3x Image Processing Unit support"
  380. depends on ARCH_MXC
  381. select DMA_ENGINE
  382. default y
  383. help
  384. If you plan to use the Image Processing unit in the i.MX3x, say
  385. Y here. If unsure, select Y.
  386. config MX3_IPU_IRQS
  387. int "Number of dynamically mapped interrupts for IPU"
  388. depends on MX3_IPU
  389. range 2 137
  390. default 4
  391. help
  392. Out of 137 interrupt sources on i.MX31 IPU only very few are used.
  393. To avoid bloating the irq_desc[] array we allocate a sufficient
  394. number of IRQ slots and map them dynamically to specific sources.
  395. config NBPFAXI_DMA
  396. tristate "Renesas Type-AXI NBPF DMA support"
  397. select DMA_ENGINE
  398. depends on ARM || COMPILE_TEST
  399. help
  400. Support for "Type-AXI" NBPF DMA IPs from Renesas
  401. config OWL_DMA
  402. tristate "Actions Semi Owl SoCs DMA support"
  403. depends on ARCH_ACTIONS
  404. select DMA_ENGINE
  405. select DMA_VIRTUAL_CHANNELS
  406. help
  407. Enable support for the Actions Semi Owl SoCs DMA controller.
  408. config PCH_DMA
  409. tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
  410. depends on PCI && (X86_32 || COMPILE_TEST)
  411. select DMA_ENGINE
  412. help
  413. Enable support for Intel EG20T PCH DMA engine.
  414. This driver also can be used for LAPIS Semiconductor IOH(Input/
  415. Output Hub), ML7213, ML7223 and ML7831.
  416. ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
  417. for MP(Media Phone) use and ML7831 IOH is for general purpose use.
  418. ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
  419. ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
  420. config PL330_DMA
  421. tristate "DMA API Driver for PL330"
  422. select DMA_ENGINE
  423. depends on ARM_AMBA
  424. help
  425. Select if your platform has one or more PL330 DMACs.
  426. You need to provide platform specific settings via
  427. platform_data for a dma-pl330 device.
  428. config PXA_DMA
  429. bool "PXA DMA support"
  430. depends on (ARCH_MMP || ARCH_PXA)
  431. select DMA_ENGINE
  432. select DMA_VIRTUAL_CHANNELS
  433. help
  434. Support the DMA engine for PXA. It is also compatible with MMP PDMA
  435. platform. The internal DMA IP of all PXA variants is supported, with
  436. 16 to 32 channels for peripheral to memory or memory to memory
  437. transfers.
  438. config PLX_DMA
  439. tristate "PLX ExpressLane PEX Switch DMA Engine Support"
  440. depends on PCI
  441. select DMA_ENGINE
  442. help
  443. Some PLX ExpressLane PCI Switches support additional DMA engines.
  444. These are exposed via extra functions on the switch's
  445. upstream port. Each function exposes one DMA channel.
  446. config SIRF_DMA
  447. tristate "CSR SiRFprimaII/SiRFmarco DMA support"
  448. depends on ARCH_SIRF
  449. select DMA_ENGINE
  450. help
  451. Enable support for the CSR SiRFprimaII DMA engine.
  452. config STE_DMA40
  453. bool "ST-Ericsson DMA40 support"
  454. depends on ARCH_U8500
  455. select DMA_ENGINE
  456. help
  457. Support for ST-Ericsson DMA40 controller
  458. config ST_FDMA
  459. tristate "ST FDMA dmaengine support"
  460. depends on ARCH_STI
  461. depends on REMOTEPROC
  462. select ST_SLIM_REMOTEPROC
  463. select DMA_ENGINE
  464. select DMA_VIRTUAL_CHANNELS
  465. help
  466. Enable support for ST FDMA controller.
  467. It supports 16 independent DMA channels, accepts up to 32 DMA requests
  468. Say Y here if you have such a chipset.
  469. If unsure, say N.
  470. config STM32_DMA
  471. bool "STMicroelectronics STM32 DMA support"
  472. depends on ARCH_STM32 || COMPILE_TEST
  473. select DMA_ENGINE
  474. select DMA_VIRTUAL_CHANNELS
  475. help
  476. Enable support for the on-chip DMA controller on STMicroelectronics
  477. STM32 MCUs.
  478. If you have a board based on such a MCU and wish to use DMA say Y
  479. here.
  480. config STM32_DMAMUX
  481. bool "STMicroelectronics STM32 dma multiplexer support"
  482. depends on STM32_DMA || COMPILE_TEST
  483. help
  484. Enable support for the on-chip DMA multiplexer on STMicroelectronics
  485. STM32 MCUs.
  486. If you have a board based on such a MCU and wish to use DMAMUX say Y
  487. here.
  488. config STM32_MDMA
  489. bool "STMicroelectronics STM32 master dma support"
  490. depends on ARCH_STM32 || COMPILE_TEST
  491. depends on OF
  492. select DMA_ENGINE
  493. select DMA_VIRTUAL_CHANNELS
  494. help
  495. Enable support for the on-chip MDMA controller on STMicroelectronics
  496. STM32 platforms.
  497. If you have a board based on STM32 SoC and wish to use the master DMA
  498. say Y here.
  499. config SPRD_DMA
  500. tristate "Spreadtrum DMA support"
  501. depends on ARCH_SPRD || COMPILE_TEST
  502. select DMA_ENGINE
  503. select DMA_VIRTUAL_CHANNELS
  504. help
  505. Enable support for the on-chip DMA controller on Spreadtrum platform.
  506. config S3C24XX_DMAC
  507. bool "Samsung S3C24XX DMA support"
  508. depends on ARCH_S3C24XX || COMPILE_TEST
  509. select DMA_ENGINE
  510. select DMA_VIRTUAL_CHANNELS
  511. help
  512. Support for the Samsung S3C24XX DMA controller driver. The
  513. DMA controller is having multiple DMA channels which can be
  514. configured for different peripherals like audio, UART, SPI.
  515. The DMA controller can transfer data from memory to peripheral,
  516. periphal to memory, periphal to periphal and memory to memory.
  517. config TXX9_DMAC
  518. tristate "Toshiba TXx9 SoC DMA support"
  519. depends on MACH_TX49XX || MACH_TX39XX
  520. select DMA_ENGINE
  521. help
  522. Support the TXx9 SoC internal DMA controller. This can be
  523. integrated in chips such as the Toshiba TX4927/38/39.
  524. config TEGRA20_APB_DMA
  525. tristate "NVIDIA Tegra20 APB DMA support"
  526. depends on ARCH_TEGRA || COMPILE_TEST
  527. select DMA_ENGINE
  528. help
  529. Support for the NVIDIA Tegra20 APB DMA controller driver. The
  530. DMA controller is having multiple DMA channel which can be
  531. configured for different peripherals like audio, UART, SPI,
  532. I2C etc which is in APB bus.
  533. This DMA controller transfers data from memory to peripheral fifo
  534. or vice versa. It does not support memory to memory data transfer.
  535. config TEGRA210_ADMA
  536. tristate "NVIDIA Tegra210 ADMA support"
  537. depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
  538. select DMA_ENGINE
  539. select DMA_VIRTUAL_CHANNELS
  540. help
  541. Support for the NVIDIA Tegra210 ADMA controller driver. The
  542. DMA controller has multiple DMA channels and is used to service
  543. various audio clients in the Tegra210 audio processing engine
  544. (APE). This DMA controller transfers data from memory to
  545. peripheral and vice versa. It does not support memory to
  546. memory data transfer.
  547. config TIMB_DMA
  548. tristate "Timberdale FPGA DMA support"
  549. depends on MFD_TIMBERDALE || COMPILE_TEST
  550. select DMA_ENGINE
  551. help
  552. Enable support for the Timberdale FPGA DMA engine.
  553. config UNIPHIER_MDMAC
  554. tristate "UniPhier MIO DMAC"
  555. depends on ARCH_UNIPHIER || COMPILE_TEST
  556. depends on OF
  557. select DMA_ENGINE
  558. select DMA_VIRTUAL_CHANNELS
  559. help
  560. Enable support for the MIO DMAC (Media I/O DMA controller) on the
  561. UniPhier platform. This DMA controller is used as the external
  562. DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
  563. config UNIPHIER_XDMAC
  564. tristate "UniPhier XDMAC support"
  565. depends on ARCH_UNIPHIER || COMPILE_TEST
  566. depends on OF
  567. select DMA_ENGINE
  568. select DMA_VIRTUAL_CHANNELS
  569. help
  570. Enable support for the XDMAC (external DMA controller) on the
  571. UniPhier platform. This DMA controller can transfer data from
  572. memory to memory, memory to peripheral and peripheral to memory.
  573. config XGENE_DMA
  574. tristate "APM X-Gene DMA support"
  575. depends on ARCH_XGENE || COMPILE_TEST
  576. select DMA_ENGINE
  577. select DMA_ENGINE_RAID
  578. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  579. help
  580. Enable support for the APM X-Gene SoC DMA engine.
  581. config XILINX_DMA
  582. tristate "Xilinx AXI DMAS Engine"
  583. depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
  584. select DMA_ENGINE
  585. help
  586. Enable support for Xilinx AXI VDMA Soft IP.
  587. AXI VDMA engine provides high-bandwidth direct memory access
  588. between memory and AXI4-Stream video type target
  589. peripherals including peripherals which support AXI4-
  590. Stream Video Protocol. It has two stream interfaces/
  591. channels, Memory Mapped to Stream (MM2S) and Stream to
  592. Memory Mapped (S2MM) for the data transfers.
  593. AXI CDMA engine provides high-bandwidth direct memory access
  594. between a memory-mapped source address and a memory-mapped
  595. destination address.
  596. AXI DMA engine provides high-bandwidth one dimensional direct
  597. memory access between memory and AXI4-Stream target peripherals.
  598. AXI MCDMA engine provides high-bandwidth direct memory access
  599. between memory and AXI4-Stream target peripherals. It provides
  600. the scatter gather interface with multiple channels independent
  601. configuration support.
  602. config XILINX_ZYNQMP_DMA
  603. tristate "Xilinx ZynqMP DMA Engine"
  604. depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
  605. select DMA_ENGINE
  606. help
  607. Enable support for Xilinx ZynqMP DMA controller.
  608. config XILINX_ZYNQMP_DPDMA
  609. tristate "Xilinx DPDMA Engine"
  610. depends on HAS_IOMEM && OF
  611. select DMA_ENGINE
  612. select DMA_VIRTUAL_CHANNELS
  613. help
  614. Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option
  615. if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The
  616. driver provides the dmaengine required by the DisplayPort subsystem
  617. display driver.
  618. config ZX_DMA
  619. tristate "ZTE ZX DMA support"
  620. depends on ARCH_ZX || COMPILE_TEST
  621. select DMA_ENGINE
  622. select DMA_VIRTUAL_CHANNELS
  623. help
  624. Support the DMA engine for ZTE ZX family platform devices.
  625. # driver files
  626. source "drivers/dma/bestcomm/Kconfig"
  627. source "drivers/dma/mediatek/Kconfig"
  628. source "drivers/dma/qcom/Kconfig"
  629. source "drivers/dma/dw/Kconfig"
  630. source "drivers/dma/dw-edma/Kconfig"
  631. source "drivers/dma/hsu/Kconfig"
  632. source "drivers/dma/sf-pdma/Kconfig"
  633. source "drivers/dma/sh/Kconfig"
  634. source "drivers/dma/ti/Kconfig"
  635. source "drivers/dma/fsl-dpaa2-qdma/Kconfig"
  636. # clients
  637. comment "DMA Clients"
  638. depends on DMA_ENGINE
  639. config ASYNC_TX_DMA
  640. bool "Async_tx: Offload support for the async_tx api"
  641. depends on DMA_ENGINE
  642. help
  643. This allows the async_tx api to take advantage of offload engines for
  644. memcpy, memset, xor, and raid6 p+q operations. If your platform has
  645. a dma engine that can perform raid operations and you have enabled
  646. MD_RAID456 say Y.
  647. If unsure, say N.
  648. config DMATEST
  649. tristate "DMA Test client"
  650. depends on DMA_ENGINE
  651. select DMA_ENGINE_RAID
  652. help
  653. Simple DMA test client. Say N unless you're debugging a
  654. DMA Device driver.
  655. config DMA_ENGINE_RAID
  656. bool
  657. endif