Kconfig 5.4 KB

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  1. # SPDX-License-Identifier: GPL-2.0-only
  2. menuconfig PM_DEVFREQ
  3. bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
  4. select SRCU
  5. select PM_OPP
  6. help
  7. A device may have a list of frequencies and voltages available.
  8. devfreq, a generic DVFS framework can be registered for a device
  9. in order to let the governor provided to devfreq choose an
  10. operating frequency based on the device driver's policy.
  11. Each device may have its own governor and policy. Devfreq can
  12. reevaluate the device state periodically and/or based on the
  13. notification to "nb", a notifier block, of devfreq.
  14. Like some CPUs with CPUfreq, a device may have multiple clocks.
  15. However, because the clock frequencies of a single device are
  16. determined by the single device's state, an instance of devfreq
  17. is attached to a single device and returns a "representative"
  18. clock frequency of the device, which is also attached
  19. to a device by 1-to-1. The device registering devfreq takes the
  20. responsibility to "interpret" the representative frequency and
  21. to set its every clock accordingly with the "target" callback
  22. given to devfreq.
  23. When OPP is used with the devfreq device, it is recommended to
  24. register devfreq's nb to the OPP's notifier head. If OPP is
  25. used with the devfreq device, you may use OPP helper
  26. functions defined in devfreq.h.
  27. if PM_DEVFREQ
  28. comment "DEVFREQ Governors"
  29. config DEVFREQ_GOV_SIMPLE_ONDEMAND
  30. tristate "Simple Ondemand"
  31. help
  32. Chooses frequency based on the recent load on the device. Works
  33. similar as ONDEMAND governor of CPUFREQ does. A device with
  34. Simple-Ondemand should be able to provide busy/total counter
  35. values that imply the usage rate. A device may provide tuned
  36. values to the governor with data field at devfreq_add_device().
  37. config DEVFREQ_GOV_PERFORMANCE
  38. tristate "Performance"
  39. help
  40. Sets the frequency at the maximum available frequency.
  41. This governor always returns UINT_MAX as frequency so that
  42. the DEVFREQ framework returns the highest frequency available
  43. at any time.
  44. config DEVFREQ_GOV_POWERSAVE
  45. tristate "Powersave"
  46. help
  47. Sets the frequency at the minimum available frequency.
  48. This governor always returns 0 as frequency so that
  49. the DEVFREQ framework returns the lowest frequency available
  50. at any time.
  51. config DEVFREQ_GOV_USERSPACE
  52. tristate "Userspace"
  53. help
  54. Sets the frequency at the user specified one.
  55. This governor returns the user configured frequency if there
  56. has been an input to /sys/devices/.../power/devfreq_set_freq.
  57. Otherwise, the governor does not change the frequency
  58. given at the initialization.
  59. config DEVFREQ_GOV_PASSIVE
  60. tristate "Passive"
  61. help
  62. Sets the frequency based on the frequency of its parent devfreq
  63. device. This governor does not change the frequency by itself
  64. through sysfs entries. The passive governor recommends that
  65. devfreq device uses the OPP table to get the frequency/voltage.
  66. comment "DEVFREQ Drivers"
  67. config ARM_EXYNOS_BUS_DEVFREQ
  68. tristate "ARM Exynos Generic Memory Bus DEVFREQ Driver"
  69. depends on ARCH_EXYNOS || COMPILE_TEST
  70. select DEVFREQ_GOV_SIMPLE_ONDEMAND
  71. select DEVFREQ_GOV_PASSIVE
  72. select DEVFREQ_EVENT_EXYNOS_PPMU
  73. select PM_DEVFREQ_EVENT
  74. help
  75. This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
  76. Memory bus has one more group of memory bus (e.g, MIF and INT block).
  77. Each memory bus group could contain many memoby bus block. It reads
  78. PPMU counters of memory controllers by using DEVFREQ-event device
  79. and adjusts the operating frequencies and voltages with OPP support.
  80. This does not yet operate with optimal voltages.
  81. config ARM_IMX_BUS_DEVFREQ
  82. tristate "i.MX Generic Bus DEVFREQ Driver"
  83. depends on ARCH_MXC || COMPILE_TEST
  84. select DEVFREQ_GOV_USERSPACE
  85. help
  86. This adds the generic DEVFREQ driver for i.MX interconnects. It
  87. allows adjusting NIC/NOC frequency.
  88. config ARM_IMX8M_DDRC_DEVFREQ
  89. tristate "i.MX8M DDRC DEVFREQ Driver"
  90. depends on (ARCH_MXC && HAVE_ARM_SMCCC) || \
  91. (COMPILE_TEST && HAVE_ARM_SMCCC)
  92. select DEVFREQ_GOV_SIMPLE_ONDEMAND
  93. select DEVFREQ_GOV_USERSPACE
  94. help
  95. This adds the DEVFREQ driver for the i.MX8M DDR Controller. It allows
  96. adjusting DRAM frequency.
  97. config ARM_TEGRA_DEVFREQ
  98. tristate "NVIDIA Tegra30/114/124/210 DEVFREQ Driver"
  99. depends on ARCH_TEGRA_3x_SOC || ARCH_TEGRA_114_SOC || \
  100. ARCH_TEGRA_132_SOC || ARCH_TEGRA_124_SOC || \
  101. ARCH_TEGRA_210_SOC || \
  102. COMPILE_TEST
  103. depends on COMMON_CLK
  104. help
  105. This adds the DEVFREQ driver for the Tegra family of SoCs.
  106. It reads ACTMON counters of memory controllers and adjusts the
  107. operating frequencies and voltages with OPP support.
  108. config ARM_TEGRA20_DEVFREQ
  109. tristate "NVIDIA Tegra20 DEVFREQ Driver"
  110. depends on (TEGRA_MC && TEGRA20_EMC) || COMPILE_TEST
  111. depends on COMMON_CLK
  112. select DEVFREQ_GOV_SIMPLE_ONDEMAND
  113. help
  114. This adds the DEVFREQ driver for the Tegra20 family of SoCs.
  115. It reads Memory Controller counters and adjusts the operating
  116. frequencies and voltages with OPP support.
  117. config ARM_RK3399_DMC_DEVFREQ
  118. tristate "ARM RK3399 DMC DEVFREQ Driver"
  119. depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \
  120. (COMPILE_TEST && HAVE_ARM_SMCCC)
  121. select DEVFREQ_EVENT_ROCKCHIP_DFI
  122. select DEVFREQ_GOV_SIMPLE_ONDEMAND
  123. select PM_DEVFREQ_EVENT
  124. help
  125. This adds the DEVFREQ driver for the RK3399 DMC(Dynamic Memory Controller).
  126. It sets the frequency for the memory controller and reads the usage counts
  127. from hardware.
  128. source "drivers/devfreq/event/Kconfig"
  129. endif # PM_DEVFREQ