mvebu-cpufreq.c 2.6 KB

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  1. /*
  2. * CPUFreq support for Armada 370/XP platforms.
  3. *
  4. * Copyright (C) 2012-2016 Marvell
  5. *
  6. * Yehuda Yitschak <yehuday@marvell.com>
  7. * Gregory Clement <gregory.clement@free-electrons.com>
  8. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  9. *
  10. * This file is licensed under the terms of the GNU General Public
  11. * License version 2. This program is licensed "as is" without any
  12. * warranty of any kind, whether express or implied.
  13. */
  14. #define pr_fmt(fmt) "mvebu-pmsu: " fmt
  15. #include <linux/clk.h>
  16. #include <linux/cpu.h>
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/of_address.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/pm_opp.h>
  22. #include <linux/resource.h>
  23. static int __init armada_xp_pmsu_cpufreq_init(void)
  24. {
  25. struct device_node *np;
  26. struct resource res;
  27. int ret, cpu;
  28. if (!of_machine_is_compatible("marvell,armadaxp"))
  29. return 0;
  30. /*
  31. * In order to have proper cpufreq handling, we need to ensure
  32. * that the Device Tree description of the CPU clock includes
  33. * the definition of the PMU DFS registers. If not, we do not
  34. * register the clock notifier and the cpufreq driver. This
  35. * piece of code is only for compatibility with old Device
  36. * Trees.
  37. */
  38. np = of_find_compatible_node(NULL, NULL, "marvell,armada-xp-cpu-clock");
  39. if (!np)
  40. return 0;
  41. ret = of_address_to_resource(np, 1, &res);
  42. if (ret) {
  43. pr_warn(FW_WARN "not enabling cpufreq, deprecated armada-xp-cpu-clock binding\n");
  44. of_node_put(np);
  45. return 0;
  46. }
  47. of_node_put(np);
  48. /*
  49. * For each CPU, this loop registers the operating points
  50. * supported (which are the nominal CPU frequency and half of
  51. * it), and registers the clock notifier that will take care
  52. * of doing the PMSU part of a frequency transition.
  53. */
  54. for_each_possible_cpu(cpu) {
  55. struct device *cpu_dev;
  56. struct clk *clk;
  57. int ret;
  58. cpu_dev = get_cpu_device(cpu);
  59. if (!cpu_dev) {
  60. pr_err("Cannot get CPU %d\n", cpu);
  61. continue;
  62. }
  63. clk = clk_get(cpu_dev, NULL);
  64. if (IS_ERR(clk)) {
  65. pr_err("Cannot get clock for CPU %d\n", cpu);
  66. return PTR_ERR(clk);
  67. }
  68. ret = dev_pm_opp_add(cpu_dev, clk_get_rate(clk), 0);
  69. if (ret) {
  70. clk_put(clk);
  71. return ret;
  72. }
  73. ret = dev_pm_opp_add(cpu_dev, clk_get_rate(clk) / 2, 0);
  74. if (ret) {
  75. dev_pm_opp_remove(cpu_dev, clk_get_rate(clk));
  76. clk_put(clk);
  77. dev_err(cpu_dev, "Failed to register OPPs\n");
  78. return ret;
  79. }
  80. ret = dev_pm_opp_set_sharing_cpus(cpu_dev,
  81. cpumask_of(cpu_dev->id));
  82. if (ret)
  83. dev_err(cpu_dev, "%s: failed to mark OPPs as shared: %d\n",
  84. __func__, ret);
  85. clk_put(clk);
  86. }
  87. platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
  88. return 0;
  89. }
  90. device_initcall(armada_xp_pmsu_cpufreq_init);