cpufreq-dt-platdev.c 5.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2016 Linaro.
  4. * Viresh Kumar <viresh.kumar@linaro.org>
  5. */
  6. #include <linux/err.h>
  7. #include <linux/of.h>
  8. #include <linux/of_device.h>
  9. #include <linux/platform_device.h>
  10. #include "cpufreq-dt.h"
  11. /*
  12. * Machines for which the cpufreq device is *always* created, mostly used for
  13. * platforms using "operating-points" (V1) property.
  14. */
  15. static const struct of_device_id whitelist[] __initconst = {
  16. { .compatible = "allwinner,sun4i-a10", },
  17. { .compatible = "allwinner,sun5i-a10s", },
  18. { .compatible = "allwinner,sun5i-a13", },
  19. { .compatible = "allwinner,sun5i-r8", },
  20. { .compatible = "allwinner,sun6i-a31", },
  21. { .compatible = "allwinner,sun6i-a31s", },
  22. { .compatible = "allwinner,sun7i-a20", },
  23. { .compatible = "allwinner,sun8i-a23", },
  24. { .compatible = "allwinner,sun8i-a83t", },
  25. { .compatible = "allwinner,sun8i-h3", },
  26. { .compatible = "apm,xgene-shadowcat", },
  27. { .compatible = "arm,integrator-ap", },
  28. { .compatible = "arm,integrator-cp", },
  29. { .compatible = "hisilicon,hi3660", },
  30. { .compatible = "fsl,imx27", },
  31. { .compatible = "fsl,imx51", },
  32. { .compatible = "fsl,imx53", },
  33. { .compatible = "marvell,berlin", },
  34. { .compatible = "marvell,pxa250", },
  35. { .compatible = "marvell,pxa270", },
  36. { .compatible = "samsung,exynos3250", },
  37. { .compatible = "samsung,exynos4210", },
  38. { .compatible = "samsung,exynos5250", },
  39. #ifndef CONFIG_BL_SWITCHER
  40. { .compatible = "samsung,exynos5800", },
  41. #endif
  42. { .compatible = "renesas,emev2", },
  43. { .compatible = "renesas,r7s72100", },
  44. { .compatible = "renesas,r8a73a4", },
  45. { .compatible = "renesas,r8a7740", },
  46. { .compatible = "renesas,r8a7742", },
  47. { .compatible = "renesas,r8a7743", },
  48. { .compatible = "renesas,r8a7744", },
  49. { .compatible = "renesas,r8a7745", },
  50. { .compatible = "renesas,r8a7778", },
  51. { .compatible = "renesas,r8a7779", },
  52. { .compatible = "renesas,r8a7790", },
  53. { .compatible = "renesas,r8a7791", },
  54. { .compatible = "renesas,r8a7792", },
  55. { .compatible = "renesas,r8a7793", },
  56. { .compatible = "renesas,r8a7794", },
  57. { .compatible = "renesas,sh73a0", },
  58. { .compatible = "rockchip,rk2928", },
  59. { .compatible = "rockchip,rk3036", },
  60. { .compatible = "rockchip,rk3066a", },
  61. { .compatible = "rockchip,rk3066b", },
  62. { .compatible = "rockchip,rk3188", },
  63. { .compatible = "rockchip,rk3228", },
  64. { .compatible = "rockchip,rk3288", },
  65. { .compatible = "rockchip,rk3328", },
  66. { .compatible = "rockchip,rk3366", },
  67. { .compatible = "rockchip,rk3368", },
  68. { .compatible = "rockchip,rk3399",
  69. .data = &(struct cpufreq_dt_platform_data)
  70. { .have_governor_per_policy = true, },
  71. },
  72. { .compatible = "st-ericsson,u8500", },
  73. { .compatible = "st-ericsson,u8540", },
  74. { .compatible = "st-ericsson,u9500", },
  75. { .compatible = "st-ericsson,u9540", },
  76. { .compatible = "ti,omap2", },
  77. { .compatible = "ti,omap4", },
  78. { .compatible = "ti,omap5", },
  79. { .compatible = "xlnx,zynq-7000", },
  80. { .compatible = "xlnx,zynqmp", },
  81. { }
  82. };
  83. /*
  84. * Machines for which the cpufreq device is *not* created, mostly used for
  85. * platforms using "operating-points-v2" property.
  86. */
  87. static const struct of_device_id blacklist[] __initconst = {
  88. { .compatible = "allwinner,sun50i-h6", },
  89. { .compatible = "arm,vexpress", },
  90. { .compatible = "calxeda,highbank", },
  91. { .compatible = "calxeda,ecx-2000", },
  92. { .compatible = "fsl,imx7ulp", },
  93. { .compatible = "fsl,imx7d", },
  94. { .compatible = "fsl,imx8mq", },
  95. { .compatible = "fsl,imx8mm", },
  96. { .compatible = "fsl,imx8mn", },
  97. { .compatible = "fsl,imx8mp", },
  98. { .compatible = "marvell,armadaxp", },
  99. { .compatible = "mediatek,mt2701", },
  100. { .compatible = "mediatek,mt2712", },
  101. { .compatible = "mediatek,mt7622", },
  102. { .compatible = "mediatek,mt7623", },
  103. { .compatible = "mediatek,mt817x", },
  104. { .compatible = "mediatek,mt8173", },
  105. { .compatible = "mediatek,mt8176", },
  106. { .compatible = "mediatek,mt8183", },
  107. { .compatible = "nvidia,tegra20", },
  108. { .compatible = "nvidia,tegra30", },
  109. { .compatible = "nvidia,tegra124", },
  110. { .compatible = "nvidia,tegra210", },
  111. { .compatible = "qcom,apq8096", },
  112. { .compatible = "qcom,msm8996", },
  113. { .compatible = "qcom,qcs404", },
  114. { .compatible = "qcom,sc7180", },
  115. { .compatible = "qcom,sdm845", },
  116. { .compatible = "qcom,sm8150", },
  117. { .compatible = "st,stih407", },
  118. { .compatible = "st,stih410", },
  119. { .compatible = "st,stih418", },
  120. { .compatible = "sigma,tango4", },
  121. { .compatible = "ti,am33xx", },
  122. { .compatible = "ti,am43", },
  123. { .compatible = "ti,dra7", },
  124. { .compatible = "ti,omap3", },
  125. { .compatible = "qcom,ipq8064", },
  126. { .compatible = "qcom,apq8064", },
  127. { .compatible = "qcom,msm8974", },
  128. { .compatible = "qcom,msm8960", },
  129. { }
  130. };
  131. static bool __init cpu0_node_has_opp_v2_prop(void)
  132. {
  133. struct device_node *np = of_cpu_device_node_get(0);
  134. bool ret = false;
  135. if (of_get_property(np, "operating-points-v2", NULL))
  136. ret = true;
  137. of_node_put(np);
  138. return ret;
  139. }
  140. static int __init cpufreq_dt_platdev_init(void)
  141. {
  142. struct device_node *np = of_find_node_by_path("/");
  143. const struct of_device_id *match;
  144. const void *data = NULL;
  145. if (!np)
  146. return -ENODEV;
  147. match = of_match_node(whitelist, np);
  148. if (match) {
  149. data = match->data;
  150. goto create_pdev;
  151. }
  152. if (cpu0_node_has_opp_v2_prop() && !of_match_node(blacklist, np))
  153. goto create_pdev;
  154. of_node_put(np);
  155. return -ENODEV;
  156. create_pdev:
  157. of_node_put(np);
  158. return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
  159. -1, data,
  160. sizeof(struct cpufreq_dt_platform_data)));
  161. }
  162. core_initcall(cpufreq_dt_platdev_init);