clk-prcmu.c 8.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * PRCMU clock implementation for ux500 platform.
  4. *
  5. * Copyright (C) 2012 ST-Ericsson SA
  6. * Author: Ulf Hansson <ulf.hansson@linaro.org>
  7. */
  8. #include <linux/clk-provider.h>
  9. #include <linux/mfd/dbx500-prcmu.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/err.h>
  13. #include "clk.h"
  14. #define to_clk_prcmu(_hw) container_of(_hw, struct clk_prcmu, hw)
  15. struct clk_prcmu {
  16. struct clk_hw hw;
  17. u8 cg_sel;
  18. int is_prepared;
  19. int is_enabled;
  20. int opp_requested;
  21. };
  22. /* PRCMU clock operations. */
  23. static int clk_prcmu_prepare(struct clk_hw *hw)
  24. {
  25. int ret;
  26. struct clk_prcmu *clk = to_clk_prcmu(hw);
  27. ret = prcmu_request_clock(clk->cg_sel, true);
  28. if (!ret)
  29. clk->is_prepared = 1;
  30. return ret;
  31. }
  32. static void clk_prcmu_unprepare(struct clk_hw *hw)
  33. {
  34. struct clk_prcmu *clk = to_clk_prcmu(hw);
  35. if (prcmu_request_clock(clk->cg_sel, false))
  36. pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
  37. clk_hw_get_name(hw));
  38. else
  39. clk->is_prepared = 0;
  40. }
  41. static int clk_prcmu_is_prepared(struct clk_hw *hw)
  42. {
  43. struct clk_prcmu *clk = to_clk_prcmu(hw);
  44. return clk->is_prepared;
  45. }
  46. static int clk_prcmu_enable(struct clk_hw *hw)
  47. {
  48. struct clk_prcmu *clk = to_clk_prcmu(hw);
  49. clk->is_enabled = 1;
  50. return 0;
  51. }
  52. static void clk_prcmu_disable(struct clk_hw *hw)
  53. {
  54. struct clk_prcmu *clk = to_clk_prcmu(hw);
  55. clk->is_enabled = 0;
  56. }
  57. static int clk_prcmu_is_enabled(struct clk_hw *hw)
  58. {
  59. struct clk_prcmu *clk = to_clk_prcmu(hw);
  60. return clk->is_enabled;
  61. }
  62. static unsigned long clk_prcmu_recalc_rate(struct clk_hw *hw,
  63. unsigned long parent_rate)
  64. {
  65. struct clk_prcmu *clk = to_clk_prcmu(hw);
  66. return prcmu_clock_rate(clk->cg_sel);
  67. }
  68. static long clk_prcmu_round_rate(struct clk_hw *hw, unsigned long rate,
  69. unsigned long *parent_rate)
  70. {
  71. struct clk_prcmu *clk = to_clk_prcmu(hw);
  72. return prcmu_round_clock_rate(clk->cg_sel, rate);
  73. }
  74. static int clk_prcmu_set_rate(struct clk_hw *hw, unsigned long rate,
  75. unsigned long parent_rate)
  76. {
  77. struct clk_prcmu *clk = to_clk_prcmu(hw);
  78. return prcmu_set_clock_rate(clk->cg_sel, rate);
  79. }
  80. static int clk_prcmu_opp_prepare(struct clk_hw *hw)
  81. {
  82. int err;
  83. struct clk_prcmu *clk = to_clk_prcmu(hw);
  84. if (!clk->opp_requested) {
  85. err = prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP,
  86. (char *)clk_hw_get_name(hw),
  87. 100);
  88. if (err) {
  89. pr_err("clk_prcmu: %s fail req APE OPP for %s.\n",
  90. __func__, clk_hw_get_name(hw));
  91. return err;
  92. }
  93. clk->opp_requested = 1;
  94. }
  95. err = prcmu_request_clock(clk->cg_sel, true);
  96. if (err) {
  97. prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
  98. (char *)clk_hw_get_name(hw));
  99. clk->opp_requested = 0;
  100. return err;
  101. }
  102. clk->is_prepared = 1;
  103. return 0;
  104. }
  105. static void clk_prcmu_opp_unprepare(struct clk_hw *hw)
  106. {
  107. struct clk_prcmu *clk = to_clk_prcmu(hw);
  108. if (prcmu_request_clock(clk->cg_sel, false)) {
  109. pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
  110. clk_hw_get_name(hw));
  111. return;
  112. }
  113. if (clk->opp_requested) {
  114. prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
  115. (char *)clk_hw_get_name(hw));
  116. clk->opp_requested = 0;
  117. }
  118. clk->is_prepared = 0;
  119. }
  120. static int clk_prcmu_opp_volt_prepare(struct clk_hw *hw)
  121. {
  122. int err;
  123. struct clk_prcmu *clk = to_clk_prcmu(hw);
  124. if (!clk->opp_requested) {
  125. err = prcmu_request_ape_opp_100_voltage(true);
  126. if (err) {
  127. pr_err("clk_prcmu: %s fail req APE OPP VOLT for %s.\n",
  128. __func__, clk_hw_get_name(hw));
  129. return err;
  130. }
  131. clk->opp_requested = 1;
  132. }
  133. err = prcmu_request_clock(clk->cg_sel, true);
  134. if (err) {
  135. prcmu_request_ape_opp_100_voltage(false);
  136. clk->opp_requested = 0;
  137. return err;
  138. }
  139. clk->is_prepared = 1;
  140. return 0;
  141. }
  142. static void clk_prcmu_opp_volt_unprepare(struct clk_hw *hw)
  143. {
  144. struct clk_prcmu *clk = to_clk_prcmu(hw);
  145. if (prcmu_request_clock(clk->cg_sel, false)) {
  146. pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
  147. clk_hw_get_name(hw));
  148. return;
  149. }
  150. if (clk->opp_requested) {
  151. prcmu_request_ape_opp_100_voltage(false);
  152. clk->opp_requested = 0;
  153. }
  154. clk->is_prepared = 0;
  155. }
  156. static const struct clk_ops clk_prcmu_scalable_ops = {
  157. .prepare = clk_prcmu_prepare,
  158. .unprepare = clk_prcmu_unprepare,
  159. .is_prepared = clk_prcmu_is_prepared,
  160. .enable = clk_prcmu_enable,
  161. .disable = clk_prcmu_disable,
  162. .is_enabled = clk_prcmu_is_enabled,
  163. .recalc_rate = clk_prcmu_recalc_rate,
  164. .round_rate = clk_prcmu_round_rate,
  165. .set_rate = clk_prcmu_set_rate,
  166. };
  167. static const struct clk_ops clk_prcmu_gate_ops = {
  168. .prepare = clk_prcmu_prepare,
  169. .unprepare = clk_prcmu_unprepare,
  170. .is_prepared = clk_prcmu_is_prepared,
  171. .enable = clk_prcmu_enable,
  172. .disable = clk_prcmu_disable,
  173. .is_enabled = clk_prcmu_is_enabled,
  174. .recalc_rate = clk_prcmu_recalc_rate,
  175. };
  176. static const struct clk_ops clk_prcmu_scalable_rate_ops = {
  177. .is_enabled = clk_prcmu_is_enabled,
  178. .recalc_rate = clk_prcmu_recalc_rate,
  179. .round_rate = clk_prcmu_round_rate,
  180. .set_rate = clk_prcmu_set_rate,
  181. };
  182. static const struct clk_ops clk_prcmu_rate_ops = {
  183. .is_enabled = clk_prcmu_is_enabled,
  184. .recalc_rate = clk_prcmu_recalc_rate,
  185. };
  186. static const struct clk_ops clk_prcmu_opp_gate_ops = {
  187. .prepare = clk_prcmu_opp_prepare,
  188. .unprepare = clk_prcmu_opp_unprepare,
  189. .is_prepared = clk_prcmu_is_prepared,
  190. .enable = clk_prcmu_enable,
  191. .disable = clk_prcmu_disable,
  192. .is_enabled = clk_prcmu_is_enabled,
  193. .recalc_rate = clk_prcmu_recalc_rate,
  194. };
  195. static const struct clk_ops clk_prcmu_opp_volt_scalable_ops = {
  196. .prepare = clk_prcmu_opp_volt_prepare,
  197. .unprepare = clk_prcmu_opp_volt_unprepare,
  198. .is_prepared = clk_prcmu_is_prepared,
  199. .enable = clk_prcmu_enable,
  200. .disable = clk_prcmu_disable,
  201. .is_enabled = clk_prcmu_is_enabled,
  202. .recalc_rate = clk_prcmu_recalc_rate,
  203. .round_rate = clk_prcmu_round_rate,
  204. .set_rate = clk_prcmu_set_rate,
  205. };
  206. static struct clk *clk_reg_prcmu(const char *name,
  207. const char *parent_name,
  208. u8 cg_sel,
  209. unsigned long rate,
  210. unsigned long flags,
  211. const struct clk_ops *clk_prcmu_ops)
  212. {
  213. struct clk_prcmu *clk;
  214. struct clk_init_data clk_prcmu_init;
  215. struct clk *clk_reg;
  216. if (!name) {
  217. pr_err("clk_prcmu: %s invalid arguments passed\n", __func__);
  218. return ERR_PTR(-EINVAL);
  219. }
  220. clk = kzalloc(sizeof(*clk), GFP_KERNEL);
  221. if (!clk)
  222. return ERR_PTR(-ENOMEM);
  223. clk->cg_sel = cg_sel;
  224. clk->is_prepared = 1;
  225. clk->is_enabled = 1;
  226. clk->opp_requested = 0;
  227. /* "rate" can be used for changing the initial frequency */
  228. if (rate)
  229. prcmu_set_clock_rate(cg_sel, rate);
  230. clk_prcmu_init.name = name;
  231. clk_prcmu_init.ops = clk_prcmu_ops;
  232. clk_prcmu_init.flags = flags;
  233. clk_prcmu_init.parent_names = (parent_name ? &parent_name : NULL);
  234. clk_prcmu_init.num_parents = (parent_name ? 1 : 0);
  235. clk->hw.init = &clk_prcmu_init;
  236. clk_reg = clk_register(NULL, &clk->hw);
  237. if (IS_ERR_OR_NULL(clk_reg))
  238. goto free_clk;
  239. return clk_reg;
  240. free_clk:
  241. kfree(clk);
  242. pr_err("clk_prcmu: %s failed to register clk\n", __func__);
  243. return ERR_PTR(-ENOMEM);
  244. }
  245. struct clk *clk_reg_prcmu_scalable(const char *name,
  246. const char *parent_name,
  247. u8 cg_sel,
  248. unsigned long rate,
  249. unsigned long flags)
  250. {
  251. return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
  252. &clk_prcmu_scalable_ops);
  253. }
  254. struct clk *clk_reg_prcmu_gate(const char *name,
  255. const char *parent_name,
  256. u8 cg_sel,
  257. unsigned long flags)
  258. {
  259. return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
  260. &clk_prcmu_gate_ops);
  261. }
  262. struct clk *clk_reg_prcmu_scalable_rate(const char *name,
  263. const char *parent_name,
  264. u8 cg_sel,
  265. unsigned long rate,
  266. unsigned long flags)
  267. {
  268. return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
  269. &clk_prcmu_scalable_rate_ops);
  270. }
  271. struct clk *clk_reg_prcmu_rate(const char *name,
  272. const char *parent_name,
  273. u8 cg_sel,
  274. unsigned long flags)
  275. {
  276. return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
  277. &clk_prcmu_rate_ops);
  278. }
  279. struct clk *clk_reg_prcmu_opp_gate(const char *name,
  280. const char *parent_name,
  281. u8 cg_sel,
  282. unsigned long flags)
  283. {
  284. return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
  285. &clk_prcmu_opp_gate_ops);
  286. }
  287. struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name,
  288. const char *parent_name,
  289. u8 cg_sel,
  290. unsigned long rate,
  291. unsigned long flags)
  292. {
  293. return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
  294. &clk_prcmu_opp_volt_scalable_ops);
  295. }