clk-prcc.c 3.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * PRCC clock implementation for ux500 platform.
  4. *
  5. * Copyright (C) 2012 ST-Ericsson SA
  6. * Author: Ulf Hansson <ulf.hansson@linaro.org>
  7. */
  8. #include <linux/clk-provider.h>
  9. #include <linux/slab.h>
  10. #include <linux/io.h>
  11. #include <linux/err.h>
  12. #include <linux/types.h>
  13. #include "clk.h"
  14. #define PRCC_PCKEN 0x000
  15. #define PRCC_PCKDIS 0x004
  16. #define PRCC_KCKEN 0x008
  17. #define PRCC_KCKDIS 0x00C
  18. #define PRCC_PCKSR 0x010
  19. #define PRCC_KCKSR 0x014
  20. #define to_clk_prcc(_hw) container_of(_hw, struct clk_prcc, hw)
  21. struct clk_prcc {
  22. struct clk_hw hw;
  23. void __iomem *base;
  24. u32 cg_sel;
  25. int is_enabled;
  26. };
  27. /* PRCC clock operations. */
  28. static int clk_prcc_pclk_enable(struct clk_hw *hw)
  29. {
  30. struct clk_prcc *clk = to_clk_prcc(hw);
  31. writel(clk->cg_sel, (clk->base + PRCC_PCKEN));
  32. while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel))
  33. cpu_relax();
  34. clk->is_enabled = 1;
  35. return 0;
  36. }
  37. static void clk_prcc_pclk_disable(struct clk_hw *hw)
  38. {
  39. struct clk_prcc *clk = to_clk_prcc(hw);
  40. writel(clk->cg_sel, (clk->base + PRCC_PCKDIS));
  41. clk->is_enabled = 0;
  42. }
  43. static int clk_prcc_kclk_enable(struct clk_hw *hw)
  44. {
  45. struct clk_prcc *clk = to_clk_prcc(hw);
  46. writel(clk->cg_sel, (clk->base + PRCC_KCKEN));
  47. while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel))
  48. cpu_relax();
  49. clk->is_enabled = 1;
  50. return 0;
  51. }
  52. static void clk_prcc_kclk_disable(struct clk_hw *hw)
  53. {
  54. struct clk_prcc *clk = to_clk_prcc(hw);
  55. writel(clk->cg_sel, (clk->base + PRCC_KCKDIS));
  56. clk->is_enabled = 0;
  57. }
  58. static int clk_prcc_is_enabled(struct clk_hw *hw)
  59. {
  60. struct clk_prcc *clk = to_clk_prcc(hw);
  61. return clk->is_enabled;
  62. }
  63. static const struct clk_ops clk_prcc_pclk_ops = {
  64. .enable = clk_prcc_pclk_enable,
  65. .disable = clk_prcc_pclk_disable,
  66. .is_enabled = clk_prcc_is_enabled,
  67. };
  68. static const struct clk_ops clk_prcc_kclk_ops = {
  69. .enable = clk_prcc_kclk_enable,
  70. .disable = clk_prcc_kclk_disable,
  71. .is_enabled = clk_prcc_is_enabled,
  72. };
  73. static struct clk *clk_reg_prcc(const char *name,
  74. const char *parent_name,
  75. resource_size_t phy_base,
  76. u32 cg_sel,
  77. unsigned long flags,
  78. const struct clk_ops *clk_prcc_ops)
  79. {
  80. struct clk_prcc *clk;
  81. struct clk_init_data clk_prcc_init;
  82. struct clk *clk_reg;
  83. if (!name) {
  84. pr_err("clk_prcc: %s invalid arguments passed\n", __func__);
  85. return ERR_PTR(-EINVAL);
  86. }
  87. clk = kzalloc(sizeof(*clk), GFP_KERNEL);
  88. if (!clk)
  89. return ERR_PTR(-ENOMEM);
  90. clk->base = ioremap(phy_base, SZ_4K);
  91. if (!clk->base)
  92. goto free_clk;
  93. clk->cg_sel = cg_sel;
  94. clk->is_enabled = 1;
  95. clk_prcc_init.name = name;
  96. clk_prcc_init.ops = clk_prcc_ops;
  97. clk_prcc_init.flags = flags;
  98. clk_prcc_init.parent_names = (parent_name ? &parent_name : NULL);
  99. clk_prcc_init.num_parents = (parent_name ? 1 : 0);
  100. clk->hw.init = &clk_prcc_init;
  101. clk_reg = clk_register(NULL, &clk->hw);
  102. if (IS_ERR_OR_NULL(clk_reg))
  103. goto unmap_clk;
  104. return clk_reg;
  105. unmap_clk:
  106. iounmap(clk->base);
  107. free_clk:
  108. kfree(clk);
  109. pr_err("clk_prcc: %s failed to register clk\n", __func__);
  110. return ERR_PTR(-ENOMEM);
  111. }
  112. struct clk *clk_reg_prcc_pclk(const char *name,
  113. const char *parent_name,
  114. resource_size_t phy_base,
  115. u32 cg_sel,
  116. unsigned long flags)
  117. {
  118. return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
  119. &clk_prcc_pclk_ops);
  120. }
  121. struct clk *clk_reg_prcc_kclk(const char *name,
  122. const char *parent_name,
  123. resource_size_t phy_base,
  124. u32 cg_sel,
  125. unsigned long flags)
  126. {
  127. return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
  128. &clk_prcc_kclk_ops);
  129. }