clk-mt6779-mfg.c 1.3 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2019 MediaTek Inc.
  4. * Author: Wendell Lin <wendell.lin@mediatek.com>
  5. */
  6. #include <linux/clk-provider.h>
  7. #include <linux/platform_device.h>
  8. #include "clk-mtk.h"
  9. #include "clk-gate.h"
  10. #include <dt-bindings/clock/mt6779-clk.h>
  11. static const struct mtk_gate_regs mfg_cg_regs = {
  12. .set_ofs = 0x4,
  13. .clr_ofs = 0x8,
  14. .sta_ofs = 0x0,
  15. };
  16. #define GATE_MFG(_id, _name, _parent, _shift) \
  17. GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, \
  18. &mtk_clk_gate_ops_setclr)
  19. static const struct mtk_gate mfg_clks[] = {
  20. GATE_MFG(CLK_MFGCFG_BG3D, "mfg_bg3d", "mfg_sel", 0),
  21. };
  22. static int clk_mt6779_mfg_probe(struct platform_device *pdev)
  23. {
  24. struct clk_onecell_data *clk_data;
  25. struct device_node *node = pdev->dev.of_node;
  26. clk_data = mtk_alloc_clk_data(CLK_MFGCFG_NR_CLK);
  27. mtk_clk_register_gates(node, mfg_clks, ARRAY_SIZE(mfg_clks),
  28. clk_data);
  29. return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
  30. }
  31. static const struct of_device_id of_match_clk_mt6779_mfg[] = {
  32. { .compatible = "mediatek,mt6779-mfgcfg", },
  33. {}
  34. };
  35. static struct platform_driver clk_mt6779_mfg_drv = {
  36. .probe = clk_mt6779_mfg_probe,
  37. .driver = {
  38. .name = "clk-mt6779-mfg",
  39. .of_match_table = of_match_clk_mt6779_mfg,
  40. },
  41. };
  42. builtin_platform_driver(clk_mt6779_mfg_drv);