clk-mt6765-audio.c 2.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2018 MediaTek Inc.
  4. * Author: Owen Chen <owen.chen@mediatek.com>
  5. */
  6. #include <linux/clk-provider.h>
  7. #include <linux/platform_device.h>
  8. #include "clk-mtk.h"
  9. #include "clk-gate.h"
  10. #include <dt-bindings/clock/mt6765-clk.h>
  11. static const struct mtk_gate_regs audio0_cg_regs = {
  12. .set_ofs = 0x0,
  13. .clr_ofs = 0x0,
  14. .sta_ofs = 0x0,
  15. };
  16. static const struct mtk_gate_regs audio1_cg_regs = {
  17. .set_ofs = 0x4,
  18. .clr_ofs = 0x4,
  19. .sta_ofs = 0x4,
  20. };
  21. #define GATE_AUDIO0(_id, _name, _parent, _shift) { \
  22. .id = _id, \
  23. .name = _name, \
  24. .parent_name = _parent, \
  25. .regs = &audio0_cg_regs, \
  26. .shift = _shift, \
  27. .ops = &mtk_clk_gate_ops_no_setclr, \
  28. }
  29. #define GATE_AUDIO1(_id, _name, _parent, _shift) { \
  30. .id = _id, \
  31. .name = _name, \
  32. .parent_name = _parent, \
  33. .regs = &audio1_cg_regs, \
  34. .shift = _shift, \
  35. .ops = &mtk_clk_gate_ops_no_setclr, \
  36. }
  37. static const struct mtk_gate audio_clks[] = {
  38. /* AUDIO0 */
  39. GATE_AUDIO0(CLK_AUDIO_AFE, "aud_afe", "audio_ck", 2),
  40. GATE_AUDIO0(CLK_AUDIO_22M, "aud_22m", "aud_engen1_ck", 8),
  41. GATE_AUDIO0(CLK_AUDIO_APLL_TUNER, "aud_apll_tuner",
  42. "aud_engen1_ck", 19),
  43. GATE_AUDIO0(CLK_AUDIO_ADC, "aud_adc", "audio_ck", 24),
  44. GATE_AUDIO0(CLK_AUDIO_DAC, "aud_dac", "audio_ck", 25),
  45. GATE_AUDIO0(CLK_AUDIO_DAC_PREDIS, "aud_dac_predis",
  46. "audio_ck", 26),
  47. GATE_AUDIO0(CLK_AUDIO_TML, "aud_tml", "audio_ck", 27),
  48. /* AUDIO1 */
  49. GATE_AUDIO1(CLK_AUDIO_I2S1_BCLK, "aud_i2s1_bclk",
  50. "audio_ck", 4),
  51. GATE_AUDIO1(CLK_AUDIO_I2S2_BCLK, "aud_i2s2_bclk",
  52. "audio_ck", 5),
  53. GATE_AUDIO1(CLK_AUDIO_I2S3_BCLK, "aud_i2s3_bclk",
  54. "audio_ck", 6),
  55. GATE_AUDIO1(CLK_AUDIO_I2S4_BCLK, "aud_i2s4_bclk",
  56. "audio_ck", 7),
  57. };
  58. static int clk_mt6765_audio_probe(struct platform_device *pdev)
  59. {
  60. struct clk_onecell_data *clk_data;
  61. int r;
  62. struct device_node *node = pdev->dev.of_node;
  63. clk_data = mtk_alloc_clk_data(CLK_AUDIO_NR_CLK);
  64. mtk_clk_register_gates(node, audio_clks,
  65. ARRAY_SIZE(audio_clks), clk_data);
  66. r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
  67. if (r)
  68. pr_err("%s(): could not register clock provider: %d\n",
  69. __func__, r);
  70. return r;
  71. }
  72. static const struct of_device_id of_match_clk_mt6765_audio[] = {
  73. { .compatible = "mediatek,mt6765-audsys", },
  74. {}
  75. };
  76. static struct platform_driver clk_mt6765_audio_drv = {
  77. .probe = clk_mt6765_audio_probe,
  78. .driver = {
  79. .name = "clk-mt6765-audio",
  80. .of_match_table = of_match_clk_mt6765_audio,
  81. },
  82. };
  83. builtin_platform_driver(clk_mt6765_audio_drv);