psc-dm646x.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PSC clock descriptions for TI DaVinci DM646x
  4. *
  5. * Copyright (C) 2018 David Lechner <david@lechnology.com>
  6. */
  7. #include <linux/clk-provider.h>
  8. #include <linux/clk/davinci.h>
  9. #include <linux/clk.h>
  10. #include <linux/clkdev.h>
  11. #include <linux/init.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include "psc.h"
  15. LPSC_CLKDEV1(ide_clkdev, NULL, "palm_bk3710");
  16. LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1",
  17. "fck", "davinci_mdio.0");
  18. LPSC_CLKDEV2(aemif_clkdev, "aemif", NULL,
  19. NULL, "ti-aemif");
  20. LPSC_CLKDEV1(mcasp0_clkdev, NULL, "davinci-mcasp.0");
  21. LPSC_CLKDEV1(mcasp1_clkdev, NULL, "davinci-mcasp.1");
  22. LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0");
  23. LPSC_CLKDEV1(uart1_clkdev, NULL, "serial8250.1");
  24. LPSC_CLKDEV1(uart2_clkdev, NULL, "serial8250.2");
  25. LPSC_CLKDEV1(i2c_clkdev, NULL, "i2c_davinci.1");
  26. /* REVISIT: gpio-davinci.c should be modified to drop con_id */
  27. LPSC_CLKDEV1(gpio_clkdev, "gpio", NULL);
  28. LPSC_CLKDEV1(timer0_clkdev, "timer0", NULL);
  29. static const struct davinci_lpsc_clk_info dm646x_psc_info[] = {
  30. LPSC(0, 0, arm, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
  31. /* REVISIT how to disable? */
  32. LPSC(1, 0, dsp, pll1_sysclk1, NULL, LPSC_ALWAYS_ENABLED),
  33. LPSC(4, 0, edma_cc, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
  34. LPSC(5, 0, edma_tc0, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
  35. LPSC(6, 0, edma_tc1, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
  36. LPSC(7, 0, edma_tc2, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
  37. LPSC(8, 0, edma_tc3, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
  38. LPSC(10, 0, ide, pll1_sysclk4, ide_clkdev, 0),
  39. LPSC(14, 0, emac, pll1_sysclk3, emac_clkdev, 0),
  40. LPSC(16, 0, vpif0, ref_clk, NULL, LPSC_ALWAYS_ENABLED),
  41. LPSC(17, 0, vpif1, ref_clk, NULL, LPSC_ALWAYS_ENABLED),
  42. LPSC(21, 0, aemif, pll1_sysclk3, aemif_clkdev, LPSC_ALWAYS_ENABLED),
  43. LPSC(22, 0, mcasp0, pll1_sysclk3, mcasp0_clkdev, 0),
  44. LPSC(23, 0, mcasp1, pll1_sysclk3, mcasp1_clkdev, 0),
  45. LPSC(26, 0, uart0, aux_clkin, uart0_clkdev, 0),
  46. LPSC(27, 0, uart1, aux_clkin, uart1_clkdev, 0),
  47. LPSC(28, 0, uart2, aux_clkin, uart2_clkdev, 0),
  48. /* REVIST: disabling hangs system */
  49. LPSC(29, 0, pwm0, pll1_sysclk3, NULL, LPSC_ALWAYS_ENABLED),
  50. /* REVIST: disabling hangs system */
  51. LPSC(30, 0, pwm1, pll1_sysclk3, NULL, LPSC_ALWAYS_ENABLED),
  52. LPSC(31, 0, i2c, pll1_sysclk3, i2c_clkdev, 0),
  53. LPSC(33, 0, gpio, pll1_sysclk3, gpio_clkdev, 0),
  54. LPSC(34, 0, timer0, pll1_sysclk3, timer0_clkdev, LPSC_ALWAYS_ENABLED),
  55. LPSC(35, 0, timer1, pll1_sysclk3, NULL, 0),
  56. { }
  57. };
  58. int dm646x_psc_init(struct device *dev, void __iomem *base)
  59. {
  60. return davinci_psc_register_clocks(dev, dm646x_psc_info, 46, base);
  61. }
  62. static struct clk_bulk_data dm646x_psc_parent_clks[] = {
  63. { .id = "ref_clk" },
  64. { .id = "aux_clkin" },
  65. { .id = "pll1_sysclk1" },
  66. { .id = "pll1_sysclk2" },
  67. { .id = "pll1_sysclk3" },
  68. { .id = "pll1_sysclk4" },
  69. { .id = "pll1_sysclk5" },
  70. };
  71. const struct davinci_psc_init_data dm646x_psc_init_data = {
  72. .parent_clks = dm646x_psc_parent_clks,
  73. .num_parent_clks = ARRAY_SIZE(dm646x_psc_parent_clks),
  74. .psc_init = &dm646x_psc_init,
  75. };