clk-scpi.c 7.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * System Control and Power Interface (SCPI) Protocol based clock driver
  4. *
  5. * Copyright (C) 2015 ARM Ltd.
  6. */
  7. #include <linux/clk-provider.h>
  8. #include <linux/device.h>
  9. #include <linux/err.h>
  10. #include <linux/of.h>
  11. #include <linux/module.h>
  12. #include <linux/of_platform.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/scpi_protocol.h>
  15. struct scpi_clk {
  16. u32 id;
  17. struct clk_hw hw;
  18. struct scpi_dvfs_info *info;
  19. struct scpi_ops *scpi_ops;
  20. };
  21. #define to_scpi_clk(clk) container_of(clk, struct scpi_clk, hw)
  22. static struct platform_device *cpufreq_dev;
  23. static unsigned long scpi_clk_recalc_rate(struct clk_hw *hw,
  24. unsigned long parent_rate)
  25. {
  26. struct scpi_clk *clk = to_scpi_clk(hw);
  27. return clk->scpi_ops->clk_get_val(clk->id);
  28. }
  29. static long scpi_clk_round_rate(struct clk_hw *hw, unsigned long rate,
  30. unsigned long *parent_rate)
  31. {
  32. /*
  33. * We can't figure out what rate it will be, so just return the
  34. * rate back to the caller. scpi_clk_recalc_rate() will be called
  35. * after the rate is set and we'll know what rate the clock is
  36. * running at then.
  37. */
  38. return rate;
  39. }
  40. static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate,
  41. unsigned long parent_rate)
  42. {
  43. struct scpi_clk *clk = to_scpi_clk(hw);
  44. return clk->scpi_ops->clk_set_val(clk->id, rate);
  45. }
  46. static const struct clk_ops scpi_clk_ops = {
  47. .recalc_rate = scpi_clk_recalc_rate,
  48. .round_rate = scpi_clk_round_rate,
  49. .set_rate = scpi_clk_set_rate,
  50. };
  51. /* find closest match to given frequency in OPP table */
  52. static long __scpi_dvfs_round_rate(struct scpi_clk *clk, unsigned long rate)
  53. {
  54. int idx;
  55. unsigned long fmin = 0, fmax = ~0, ftmp;
  56. const struct scpi_opp *opp = clk->info->opps;
  57. for (idx = 0; idx < clk->info->count; idx++, opp++) {
  58. ftmp = opp->freq;
  59. if (ftmp >= rate) {
  60. if (ftmp <= fmax)
  61. fmax = ftmp;
  62. break;
  63. } else if (ftmp >= fmin) {
  64. fmin = ftmp;
  65. }
  66. }
  67. return fmax != ~0 ? fmax : fmin;
  68. }
  69. static unsigned long scpi_dvfs_recalc_rate(struct clk_hw *hw,
  70. unsigned long parent_rate)
  71. {
  72. struct scpi_clk *clk = to_scpi_clk(hw);
  73. int idx = clk->scpi_ops->dvfs_get_idx(clk->id);
  74. const struct scpi_opp *opp;
  75. if (idx < 0)
  76. return 0;
  77. opp = clk->info->opps + idx;
  78. return opp->freq;
  79. }
  80. static long scpi_dvfs_round_rate(struct clk_hw *hw, unsigned long rate,
  81. unsigned long *parent_rate)
  82. {
  83. struct scpi_clk *clk = to_scpi_clk(hw);
  84. return __scpi_dvfs_round_rate(clk, rate);
  85. }
  86. static int __scpi_find_dvfs_index(struct scpi_clk *clk, unsigned long rate)
  87. {
  88. int idx, max_opp = clk->info->count;
  89. const struct scpi_opp *opp = clk->info->opps;
  90. for (idx = 0; idx < max_opp; idx++, opp++)
  91. if (opp->freq == rate)
  92. return idx;
  93. return -EINVAL;
  94. }
  95. static int scpi_dvfs_set_rate(struct clk_hw *hw, unsigned long rate,
  96. unsigned long parent_rate)
  97. {
  98. struct scpi_clk *clk = to_scpi_clk(hw);
  99. int ret = __scpi_find_dvfs_index(clk, rate);
  100. if (ret < 0)
  101. return ret;
  102. return clk->scpi_ops->dvfs_set_idx(clk->id, (u8)ret);
  103. }
  104. static const struct clk_ops scpi_dvfs_ops = {
  105. .recalc_rate = scpi_dvfs_recalc_rate,
  106. .round_rate = scpi_dvfs_round_rate,
  107. .set_rate = scpi_dvfs_set_rate,
  108. };
  109. static const struct of_device_id scpi_clk_match[] = {
  110. { .compatible = "arm,scpi-dvfs-clocks", .data = &scpi_dvfs_ops, },
  111. { .compatible = "arm,scpi-variable-clocks", .data = &scpi_clk_ops, },
  112. {}
  113. };
  114. static int
  115. scpi_clk_ops_init(struct device *dev, const struct of_device_id *match,
  116. struct scpi_clk *sclk, const char *name)
  117. {
  118. struct clk_init_data init;
  119. unsigned long min = 0, max = 0;
  120. int ret;
  121. init.name = name;
  122. init.flags = 0;
  123. init.num_parents = 0;
  124. init.ops = match->data;
  125. sclk->hw.init = &init;
  126. sclk->scpi_ops = get_scpi_ops();
  127. if (init.ops == &scpi_dvfs_ops) {
  128. sclk->info = sclk->scpi_ops->dvfs_get_info(sclk->id);
  129. if (IS_ERR(sclk->info))
  130. return PTR_ERR(sclk->info);
  131. } else if (init.ops == &scpi_clk_ops) {
  132. if (sclk->scpi_ops->clk_get_range(sclk->id, &min, &max) || !max)
  133. return -EINVAL;
  134. } else {
  135. return -EINVAL;
  136. }
  137. ret = devm_clk_hw_register(dev, &sclk->hw);
  138. if (!ret && max)
  139. clk_hw_set_rate_range(&sclk->hw, min, max);
  140. return ret;
  141. }
  142. struct scpi_clk_data {
  143. struct scpi_clk **clk;
  144. unsigned int clk_num;
  145. };
  146. static struct clk_hw *
  147. scpi_of_clk_src_get(struct of_phandle_args *clkspec, void *data)
  148. {
  149. struct scpi_clk *sclk;
  150. struct scpi_clk_data *clk_data = data;
  151. unsigned int idx = clkspec->args[0], count;
  152. for (count = 0; count < clk_data->clk_num; count++) {
  153. sclk = clk_data->clk[count];
  154. if (idx == sclk->id)
  155. return &sclk->hw;
  156. }
  157. return ERR_PTR(-EINVAL);
  158. }
  159. static int scpi_clk_add(struct device *dev, struct device_node *np,
  160. const struct of_device_id *match)
  161. {
  162. int idx, count, err;
  163. struct scpi_clk_data *clk_data;
  164. count = of_property_count_strings(np, "clock-output-names");
  165. if (count < 0) {
  166. dev_err(dev, "%pOFn: invalid clock output count\n", np);
  167. return -EINVAL;
  168. }
  169. clk_data = devm_kmalloc(dev, sizeof(*clk_data), GFP_KERNEL);
  170. if (!clk_data)
  171. return -ENOMEM;
  172. clk_data->clk_num = count;
  173. clk_data->clk = devm_kcalloc(dev, count, sizeof(*clk_data->clk),
  174. GFP_KERNEL);
  175. if (!clk_data->clk)
  176. return -ENOMEM;
  177. for (idx = 0; idx < count; idx++) {
  178. struct scpi_clk *sclk;
  179. const char *name;
  180. u32 val;
  181. sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL);
  182. if (!sclk)
  183. return -ENOMEM;
  184. if (of_property_read_string_index(np, "clock-output-names",
  185. idx, &name)) {
  186. dev_err(dev, "invalid clock name @ %pOFn\n", np);
  187. return -EINVAL;
  188. }
  189. if (of_property_read_u32_index(np, "clock-indices",
  190. idx, &val)) {
  191. dev_err(dev, "invalid clock index @ %pOFn\n", np);
  192. return -EINVAL;
  193. }
  194. sclk->id = val;
  195. err = scpi_clk_ops_init(dev, match, sclk, name);
  196. if (err) {
  197. dev_err(dev, "failed to register clock '%s'\n", name);
  198. return err;
  199. }
  200. dev_dbg(dev, "Registered clock '%s'\n", name);
  201. clk_data->clk[idx] = sclk;
  202. }
  203. return of_clk_add_hw_provider(np, scpi_of_clk_src_get, clk_data);
  204. }
  205. static int scpi_clocks_remove(struct platform_device *pdev)
  206. {
  207. struct device *dev = &pdev->dev;
  208. struct device_node *child, *np = dev->of_node;
  209. if (cpufreq_dev) {
  210. platform_device_unregister(cpufreq_dev);
  211. cpufreq_dev = NULL;
  212. }
  213. for_each_available_child_of_node(np, child)
  214. of_clk_del_provider(np);
  215. return 0;
  216. }
  217. static int scpi_clocks_probe(struct platform_device *pdev)
  218. {
  219. int ret;
  220. struct device *dev = &pdev->dev;
  221. struct device_node *child, *np = dev->of_node;
  222. const struct of_device_id *match;
  223. if (!get_scpi_ops())
  224. return -ENXIO;
  225. for_each_available_child_of_node(np, child) {
  226. match = of_match_node(scpi_clk_match, child);
  227. if (!match)
  228. continue;
  229. ret = scpi_clk_add(dev, child, match);
  230. if (ret) {
  231. scpi_clocks_remove(pdev);
  232. of_node_put(child);
  233. return ret;
  234. }
  235. if (match->data != &scpi_dvfs_ops)
  236. continue;
  237. /* Add the virtual cpufreq device if it's DVFS clock provider */
  238. cpufreq_dev = platform_device_register_simple("scpi-cpufreq",
  239. -1, NULL, 0);
  240. if (IS_ERR(cpufreq_dev))
  241. pr_warn("unable to register cpufreq device");
  242. }
  243. return 0;
  244. }
  245. static const struct of_device_id scpi_clocks_ids[] = {
  246. { .compatible = "arm,scpi-clocks", },
  247. {}
  248. };
  249. MODULE_DEVICE_TABLE(of, scpi_clocks_ids);
  250. static struct platform_driver scpi_clocks_driver = {
  251. .driver = {
  252. .name = "scpi_clocks",
  253. .of_match_table = scpi_clocks_ids,
  254. },
  255. .probe = scpi_clocks_probe,
  256. .remove = scpi_clocks_remove,
  257. };
  258. module_platform_driver(scpi_clocks_driver);
  259. MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
  260. MODULE_DESCRIPTION("ARM SCPI clock driver");
  261. MODULE_LICENSE("GPL v2");