clk-mux.c 5.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
  4. * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
  5. * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
  6. *
  7. * Simple multiplexer clock implementation
  8. */
  9. #include <linux/clk-provider.h>
  10. #include <linux/module.h>
  11. #include <linux/slab.h>
  12. #include <linux/io.h>
  13. #include <linux/err.h>
  14. /*
  15. * DOC: basic adjustable multiplexer clock that cannot gate
  16. *
  17. * Traits of this clock:
  18. * prepare - clk_prepare only ensures that parents are prepared
  19. * enable - clk_enable only ensures that parents are enabled
  20. * rate - rate is only affected by parent switching. No clk_set_rate support
  21. * parent - parent is adjustable through clk_set_parent
  22. */
  23. static inline u32 clk_mux_readl(struct clk_mux *mux)
  24. {
  25. if (mux->flags & CLK_MUX_BIG_ENDIAN)
  26. return ioread32be(mux->reg);
  27. return readl(mux->reg);
  28. }
  29. static inline void clk_mux_writel(struct clk_mux *mux, u32 val)
  30. {
  31. if (mux->flags & CLK_MUX_BIG_ENDIAN)
  32. iowrite32be(val, mux->reg);
  33. else
  34. writel(val, mux->reg);
  35. }
  36. int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags,
  37. unsigned int val)
  38. {
  39. int num_parents = clk_hw_get_num_parents(hw);
  40. if (table) {
  41. int i;
  42. for (i = 0; i < num_parents; i++)
  43. if (table[i] == val)
  44. return i;
  45. return -EINVAL;
  46. }
  47. if (val && (flags & CLK_MUX_INDEX_BIT))
  48. val = ffs(val) - 1;
  49. if (val && (flags & CLK_MUX_INDEX_ONE))
  50. val--;
  51. if (val >= num_parents)
  52. return -EINVAL;
  53. return val;
  54. }
  55. EXPORT_SYMBOL_GPL(clk_mux_val_to_index);
  56. unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index)
  57. {
  58. unsigned int val = index;
  59. if (table) {
  60. val = table[index];
  61. } else {
  62. if (flags & CLK_MUX_INDEX_BIT)
  63. val = 1 << index;
  64. if (flags & CLK_MUX_INDEX_ONE)
  65. val++;
  66. }
  67. return val;
  68. }
  69. EXPORT_SYMBOL_GPL(clk_mux_index_to_val);
  70. static u8 clk_mux_get_parent(struct clk_hw *hw)
  71. {
  72. struct clk_mux *mux = to_clk_mux(hw);
  73. u32 val;
  74. val = clk_mux_readl(mux) >> mux->shift;
  75. val &= mux->mask;
  76. return clk_mux_val_to_index(hw, mux->table, mux->flags, val);
  77. }
  78. static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
  79. {
  80. struct clk_mux *mux = to_clk_mux(hw);
  81. u32 val = clk_mux_index_to_val(mux->table, mux->flags, index);
  82. unsigned long flags = 0;
  83. u32 reg;
  84. if (mux->lock)
  85. spin_lock_irqsave(mux->lock, flags);
  86. else
  87. __acquire(mux->lock);
  88. if (mux->flags & CLK_MUX_HIWORD_MASK) {
  89. reg = mux->mask << (mux->shift + 16);
  90. } else {
  91. reg = clk_mux_readl(mux);
  92. reg &= ~(mux->mask << mux->shift);
  93. }
  94. val = val << mux->shift;
  95. reg |= val;
  96. clk_mux_writel(mux, reg);
  97. if (mux->lock)
  98. spin_unlock_irqrestore(mux->lock, flags);
  99. else
  100. __release(mux->lock);
  101. return 0;
  102. }
  103. static int clk_mux_determine_rate(struct clk_hw *hw,
  104. struct clk_rate_request *req)
  105. {
  106. struct clk_mux *mux = to_clk_mux(hw);
  107. return clk_mux_determine_rate_flags(hw, req, mux->flags);
  108. }
  109. const struct clk_ops clk_mux_ops = {
  110. .get_parent = clk_mux_get_parent,
  111. .set_parent = clk_mux_set_parent,
  112. .determine_rate = clk_mux_determine_rate,
  113. };
  114. EXPORT_SYMBOL_GPL(clk_mux_ops);
  115. const struct clk_ops clk_mux_ro_ops = {
  116. .get_parent = clk_mux_get_parent,
  117. };
  118. EXPORT_SYMBOL_GPL(clk_mux_ro_ops);
  119. struct clk_hw *__clk_hw_register_mux(struct device *dev, struct device_node *np,
  120. const char *name, u8 num_parents,
  121. const char * const *parent_names,
  122. const struct clk_hw **parent_hws,
  123. const struct clk_parent_data *parent_data,
  124. unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
  125. u8 clk_mux_flags, u32 *table, spinlock_t *lock)
  126. {
  127. struct clk_mux *mux;
  128. struct clk_hw *hw;
  129. struct clk_init_data init = {};
  130. u8 width = 0;
  131. int ret = -EINVAL;
  132. if (clk_mux_flags & CLK_MUX_HIWORD_MASK) {
  133. width = fls(mask) - ffs(mask) + 1;
  134. if (width + shift > 16) {
  135. pr_err("mux value exceeds LOWORD field\n");
  136. return ERR_PTR(-EINVAL);
  137. }
  138. }
  139. /* allocate the mux */
  140. mux = kzalloc(sizeof(*mux), GFP_KERNEL);
  141. if (!mux)
  142. return ERR_PTR(-ENOMEM);
  143. init.name = name;
  144. if (clk_mux_flags & CLK_MUX_READ_ONLY)
  145. init.ops = &clk_mux_ro_ops;
  146. else
  147. init.ops = &clk_mux_ops;
  148. init.flags = flags;
  149. init.parent_names = parent_names;
  150. init.parent_data = parent_data;
  151. init.parent_hws = parent_hws;
  152. init.num_parents = num_parents;
  153. /* struct clk_mux assignments */
  154. mux->reg = reg;
  155. mux->shift = shift;
  156. mux->mask = mask;
  157. mux->flags = clk_mux_flags;
  158. mux->lock = lock;
  159. mux->table = table;
  160. mux->hw.init = &init;
  161. hw = &mux->hw;
  162. if (dev || !np)
  163. ret = clk_hw_register(dev, hw);
  164. else if (np)
  165. ret = of_clk_hw_register(np, hw);
  166. if (ret) {
  167. kfree(mux);
  168. hw = ERR_PTR(ret);
  169. }
  170. return hw;
  171. }
  172. EXPORT_SYMBOL_GPL(__clk_hw_register_mux);
  173. struct clk *clk_register_mux_table(struct device *dev, const char *name,
  174. const char * const *parent_names, u8 num_parents,
  175. unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
  176. u8 clk_mux_flags, u32 *table, spinlock_t *lock)
  177. {
  178. struct clk_hw *hw;
  179. hw = clk_hw_register_mux_table(dev, name, parent_names,
  180. num_parents, flags, reg, shift, mask,
  181. clk_mux_flags, table, lock);
  182. if (IS_ERR(hw))
  183. return ERR_CAST(hw);
  184. return hw->clk;
  185. }
  186. EXPORT_SYMBOL_GPL(clk_register_mux_table);
  187. void clk_unregister_mux(struct clk *clk)
  188. {
  189. struct clk_mux *mux;
  190. struct clk_hw *hw;
  191. hw = __clk_get_hw(clk);
  192. if (!hw)
  193. return;
  194. mux = to_clk_mux(hw);
  195. clk_unregister(clk);
  196. kfree(mux);
  197. }
  198. EXPORT_SYMBOL_GPL(clk_unregister_mux);
  199. void clk_hw_unregister_mux(struct clk_hw *hw)
  200. {
  201. struct clk_mux *mux;
  202. mux = to_clk_mux(hw);
  203. clk_hw_unregister(hw);
  204. kfree(mux);
  205. }
  206. EXPORT_SYMBOL_GPL(clk_hw_unregister_mux);