clk-conf.c 3.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2014 Samsung Electronics Co., Ltd.
  4. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/clk-provider.h>
  8. #include <linux/clk/clk-conf.h>
  9. #include <linux/device.h>
  10. #include <linux/of.h>
  11. #include <linux/printk.h>
  12. static int __set_clk_parents(struct device_node *node, bool clk_supplier)
  13. {
  14. struct of_phandle_args clkspec;
  15. int index, rc, num_parents;
  16. struct clk *clk, *pclk;
  17. num_parents = of_count_phandle_with_args(node, "assigned-clock-parents",
  18. "#clock-cells");
  19. if (num_parents == -EINVAL)
  20. pr_err("clk: invalid value of clock-parents property at %pOF\n",
  21. node);
  22. for (index = 0; index < num_parents; index++) {
  23. rc = of_parse_phandle_with_args(node, "assigned-clock-parents",
  24. "#clock-cells", index, &clkspec);
  25. if (rc < 0) {
  26. /* skip empty (null) phandles */
  27. if (rc == -ENOENT)
  28. continue;
  29. else
  30. return rc;
  31. }
  32. if (clkspec.np == node && !clk_supplier)
  33. return 0;
  34. pclk = of_clk_get_from_provider(&clkspec);
  35. if (IS_ERR(pclk)) {
  36. if (PTR_ERR(pclk) != -EPROBE_DEFER)
  37. pr_warn("clk: couldn't get parent clock %d for %pOF\n",
  38. index, node);
  39. return PTR_ERR(pclk);
  40. }
  41. rc = of_parse_phandle_with_args(node, "assigned-clocks",
  42. "#clock-cells", index, &clkspec);
  43. if (rc < 0)
  44. goto err;
  45. if (clkspec.np == node && !clk_supplier) {
  46. rc = 0;
  47. goto err;
  48. }
  49. clk = of_clk_get_from_provider(&clkspec);
  50. if (IS_ERR(clk)) {
  51. if (PTR_ERR(clk) != -EPROBE_DEFER)
  52. pr_warn("clk: couldn't get assigned clock %d for %pOF\n",
  53. index, node);
  54. rc = PTR_ERR(clk);
  55. goto err;
  56. }
  57. rc = clk_set_parent(clk, pclk);
  58. if (rc < 0)
  59. pr_err("clk: failed to reparent %s to %s: %d\n",
  60. __clk_get_name(clk), __clk_get_name(pclk), rc);
  61. clk_put(clk);
  62. clk_put(pclk);
  63. }
  64. return 0;
  65. err:
  66. clk_put(pclk);
  67. return rc;
  68. }
  69. static int __set_clk_rates(struct device_node *node, bool clk_supplier)
  70. {
  71. struct of_phandle_args clkspec;
  72. struct property *prop;
  73. const __be32 *cur;
  74. int rc, index = 0;
  75. struct clk *clk;
  76. u32 rate;
  77. of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) {
  78. if (rate) {
  79. rc = of_parse_phandle_with_args(node, "assigned-clocks",
  80. "#clock-cells", index, &clkspec);
  81. if (rc < 0) {
  82. /* skip empty (null) phandles */
  83. if (rc == -ENOENT)
  84. continue;
  85. else
  86. return rc;
  87. }
  88. if (clkspec.np == node && !clk_supplier)
  89. return 0;
  90. clk = of_clk_get_from_provider(&clkspec);
  91. if (IS_ERR(clk)) {
  92. if (PTR_ERR(clk) != -EPROBE_DEFER)
  93. pr_warn("clk: couldn't get clock %d for %pOF\n",
  94. index, node);
  95. return PTR_ERR(clk);
  96. }
  97. rc = clk_set_rate(clk, rate);
  98. if (rc < 0)
  99. pr_err("clk: couldn't set %s clk rate to %u (%d), current rate: %lu\n",
  100. __clk_get_name(clk), rate, rc,
  101. clk_get_rate(clk));
  102. clk_put(clk);
  103. }
  104. index++;
  105. }
  106. return 0;
  107. }
  108. /**
  109. * of_clk_set_defaults() - parse and set assigned clocks configuration
  110. * @node: device node to apply clock settings for
  111. * @clk_supplier: true if clocks supplied by @node should also be considered
  112. *
  113. * This function parses 'assigned-{clocks/clock-parents/clock-rates}' properties
  114. * and sets any specified clock parents and rates. The @clk_supplier argument
  115. * should be set to true if @node may be also a clock supplier of any clock
  116. * listed in its 'assigned-clocks' or 'assigned-clock-parents' properties.
  117. * If @clk_supplier is false the function exits returning 0 as soon as it
  118. * determines the @node is also a supplier of any of the clocks.
  119. */
  120. int of_clk_set_defaults(struct device_node *node, bool clk_supplier)
  121. {
  122. int rc;
  123. if (!node)
  124. return 0;
  125. rc = __set_clk_parents(node, clk_supplier);
  126. if (rc < 0)
  127. return rc;
  128. return __set_clk_rates(node, clk_supplier);
  129. }
  130. EXPORT_SYMBOL_GPL(of_clk_set_defaults);