hpet.c 24 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Intel & MS High Precision Event Timer Implementation.
  4. *
  5. * Copyright (C) 2003 Intel Corporation
  6. * Venki Pallipadi
  7. * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
  8. * Bob Picco <robert.picco@hp.com>
  9. */
  10. #include <linux/interrupt.h>
  11. #include <linux/kernel.h>
  12. #include <linux/types.h>
  13. #include <linux/miscdevice.h>
  14. #include <linux/major.h>
  15. #include <linux/ioport.h>
  16. #include <linux/fcntl.h>
  17. #include <linux/init.h>
  18. #include <linux/poll.h>
  19. #include <linux/mm.h>
  20. #include <linux/proc_fs.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/sysctl.h>
  23. #include <linux/wait.h>
  24. #include <linux/sched/signal.h>
  25. #include <linux/bcd.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/bitops.h>
  28. #include <linux/compat.h>
  29. #include <linux/clocksource.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/slab.h>
  32. #include <linux/io.h>
  33. #include <linux/acpi.h>
  34. #include <linux/hpet.h>
  35. #include <asm/current.h>
  36. #include <asm/irq.h>
  37. #include <asm/div64.h>
  38. /*
  39. * The High Precision Event Timer driver.
  40. * This driver is closely modelled after the rtc.c driver.
  41. * See HPET spec revision 1.
  42. */
  43. #define HPET_USER_FREQ (64)
  44. #define HPET_DRIFT (500)
  45. #define HPET_RANGE_SIZE 1024 /* from HPET spec */
  46. /* WARNING -- don't get confused. These macros are never used
  47. * to write the (single) counter, and rarely to read it.
  48. * They're badly named; to fix, someday.
  49. */
  50. #if BITS_PER_LONG == 64
  51. #define write_counter(V, MC) writeq(V, MC)
  52. #define read_counter(MC) readq(MC)
  53. #else
  54. #define write_counter(V, MC) writel(V, MC)
  55. #define read_counter(MC) readl(MC)
  56. #endif
  57. static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
  58. static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
  59. /* This clocksource driver currently only works on ia64 */
  60. #ifdef CONFIG_IA64
  61. static void __iomem *hpet_mctr;
  62. static u64 read_hpet(struct clocksource *cs)
  63. {
  64. return (u64)read_counter((void __iomem *)hpet_mctr);
  65. }
  66. static struct clocksource clocksource_hpet = {
  67. .name = "hpet",
  68. .rating = 250,
  69. .read = read_hpet,
  70. .mask = CLOCKSOURCE_MASK(64),
  71. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  72. };
  73. static struct clocksource *hpet_clocksource;
  74. #endif
  75. /* A lock for concurrent access by app and isr hpet activity. */
  76. static DEFINE_SPINLOCK(hpet_lock);
  77. #define HPET_DEV_NAME (7)
  78. struct hpet_dev {
  79. struct hpets *hd_hpets;
  80. struct hpet __iomem *hd_hpet;
  81. struct hpet_timer __iomem *hd_timer;
  82. unsigned long hd_ireqfreq;
  83. unsigned long hd_irqdata;
  84. wait_queue_head_t hd_waitqueue;
  85. struct fasync_struct *hd_async_queue;
  86. unsigned int hd_flags;
  87. unsigned int hd_irq;
  88. unsigned int hd_hdwirq;
  89. char hd_name[HPET_DEV_NAME];
  90. };
  91. struct hpets {
  92. struct hpets *hp_next;
  93. struct hpet __iomem *hp_hpet;
  94. unsigned long hp_hpet_phys;
  95. struct clocksource *hp_clocksource;
  96. unsigned long long hp_tick_freq;
  97. unsigned long hp_delta;
  98. unsigned int hp_ntimer;
  99. unsigned int hp_which;
  100. struct hpet_dev hp_dev[];
  101. };
  102. static struct hpets *hpets;
  103. #define HPET_OPEN 0x0001
  104. #define HPET_IE 0x0002 /* interrupt enabled */
  105. #define HPET_PERIODIC 0x0004
  106. #define HPET_SHARED_IRQ 0x0008
  107. #ifndef readq
  108. static inline unsigned long long readq(void __iomem *addr)
  109. {
  110. return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
  111. }
  112. #endif
  113. #ifndef writeq
  114. static inline void writeq(unsigned long long v, void __iomem *addr)
  115. {
  116. writel(v & 0xffffffff, addr);
  117. writel(v >> 32, addr + 4);
  118. }
  119. #endif
  120. static irqreturn_t hpet_interrupt(int irq, void *data)
  121. {
  122. struct hpet_dev *devp;
  123. unsigned long isr;
  124. devp = data;
  125. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  126. if ((devp->hd_flags & HPET_SHARED_IRQ) &&
  127. !(isr & readl(&devp->hd_hpet->hpet_isr)))
  128. return IRQ_NONE;
  129. spin_lock(&hpet_lock);
  130. devp->hd_irqdata++;
  131. /*
  132. * For non-periodic timers, increment the accumulator.
  133. * This has the effect of treating non-periodic like periodic.
  134. */
  135. if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
  136. unsigned long m, t, mc, base, k;
  137. struct hpet __iomem *hpet = devp->hd_hpet;
  138. struct hpets *hpetp = devp->hd_hpets;
  139. t = devp->hd_ireqfreq;
  140. m = read_counter(&devp->hd_timer->hpet_compare);
  141. mc = read_counter(&hpet->hpet_mc);
  142. /* The time for the next interrupt would logically be t + m,
  143. * however, if we are very unlucky and the interrupt is delayed
  144. * for longer than t then we will completely miss the next
  145. * interrupt if we set t + m and an application will hang.
  146. * Therefore we need to make a more complex computation assuming
  147. * that there exists a k for which the following is true:
  148. * k * t + base < mc + delta
  149. * (k + 1) * t + base > mc + delta
  150. * where t is the interval in hpet ticks for the given freq,
  151. * base is the theoretical start value 0 < base < t,
  152. * mc is the main counter value at the time of the interrupt,
  153. * delta is the time it takes to write the a value to the
  154. * comparator.
  155. * k may then be computed as (mc - base + delta) / t .
  156. */
  157. base = mc % t;
  158. k = (mc - base + hpetp->hp_delta) / t;
  159. write_counter(t * (k + 1) + base,
  160. &devp->hd_timer->hpet_compare);
  161. }
  162. if (devp->hd_flags & HPET_SHARED_IRQ)
  163. writel(isr, &devp->hd_hpet->hpet_isr);
  164. spin_unlock(&hpet_lock);
  165. wake_up_interruptible(&devp->hd_waitqueue);
  166. kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
  167. return IRQ_HANDLED;
  168. }
  169. static void hpet_timer_set_irq(struct hpet_dev *devp)
  170. {
  171. unsigned long v;
  172. int irq, gsi;
  173. struct hpet_timer __iomem *timer;
  174. spin_lock_irq(&hpet_lock);
  175. if (devp->hd_hdwirq) {
  176. spin_unlock_irq(&hpet_lock);
  177. return;
  178. }
  179. timer = devp->hd_timer;
  180. /* we prefer level triggered mode */
  181. v = readl(&timer->hpet_config);
  182. if (!(v & Tn_INT_TYPE_CNF_MASK)) {
  183. v |= Tn_INT_TYPE_CNF_MASK;
  184. writel(v, &timer->hpet_config);
  185. }
  186. spin_unlock_irq(&hpet_lock);
  187. v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
  188. Tn_INT_ROUTE_CAP_SHIFT;
  189. /*
  190. * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
  191. * legacy device. In IO APIC mode, we skip all the legacy IRQS.
  192. */
  193. if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
  194. v &= ~0xf3df;
  195. else
  196. v &= ~0xffff;
  197. for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
  198. if (irq >= nr_irqs) {
  199. irq = HPET_MAX_IRQ;
  200. break;
  201. }
  202. gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
  203. ACPI_ACTIVE_LOW);
  204. if (gsi > 0)
  205. break;
  206. /* FIXME: Setup interrupt source table */
  207. }
  208. if (irq < HPET_MAX_IRQ) {
  209. spin_lock_irq(&hpet_lock);
  210. v = readl(&timer->hpet_config);
  211. v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
  212. writel(v, &timer->hpet_config);
  213. devp->hd_hdwirq = gsi;
  214. spin_unlock_irq(&hpet_lock);
  215. }
  216. return;
  217. }
  218. static int hpet_open(struct inode *inode, struct file *file)
  219. {
  220. struct hpet_dev *devp;
  221. struct hpets *hpetp;
  222. int i;
  223. if (file->f_mode & FMODE_WRITE)
  224. return -EINVAL;
  225. mutex_lock(&hpet_mutex);
  226. spin_lock_irq(&hpet_lock);
  227. for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
  228. for (i = 0; i < hpetp->hp_ntimer; i++)
  229. if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
  230. continue;
  231. else {
  232. devp = &hpetp->hp_dev[i];
  233. break;
  234. }
  235. if (!devp) {
  236. spin_unlock_irq(&hpet_lock);
  237. mutex_unlock(&hpet_mutex);
  238. return -EBUSY;
  239. }
  240. file->private_data = devp;
  241. devp->hd_irqdata = 0;
  242. devp->hd_flags |= HPET_OPEN;
  243. spin_unlock_irq(&hpet_lock);
  244. mutex_unlock(&hpet_mutex);
  245. hpet_timer_set_irq(devp);
  246. return 0;
  247. }
  248. static ssize_t
  249. hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
  250. {
  251. DECLARE_WAITQUEUE(wait, current);
  252. unsigned long data;
  253. ssize_t retval;
  254. struct hpet_dev *devp;
  255. devp = file->private_data;
  256. if (!devp->hd_ireqfreq)
  257. return -EIO;
  258. if (count < sizeof(unsigned long))
  259. return -EINVAL;
  260. add_wait_queue(&devp->hd_waitqueue, &wait);
  261. for ( ; ; ) {
  262. set_current_state(TASK_INTERRUPTIBLE);
  263. spin_lock_irq(&hpet_lock);
  264. data = devp->hd_irqdata;
  265. devp->hd_irqdata = 0;
  266. spin_unlock_irq(&hpet_lock);
  267. if (data)
  268. break;
  269. else if (file->f_flags & O_NONBLOCK) {
  270. retval = -EAGAIN;
  271. goto out;
  272. } else if (signal_pending(current)) {
  273. retval = -ERESTARTSYS;
  274. goto out;
  275. }
  276. schedule();
  277. }
  278. retval = put_user(data, (unsigned long __user *)buf);
  279. if (!retval)
  280. retval = sizeof(unsigned long);
  281. out:
  282. __set_current_state(TASK_RUNNING);
  283. remove_wait_queue(&devp->hd_waitqueue, &wait);
  284. return retval;
  285. }
  286. static __poll_t hpet_poll(struct file *file, poll_table * wait)
  287. {
  288. unsigned long v;
  289. struct hpet_dev *devp;
  290. devp = file->private_data;
  291. if (!devp->hd_ireqfreq)
  292. return 0;
  293. poll_wait(file, &devp->hd_waitqueue, wait);
  294. spin_lock_irq(&hpet_lock);
  295. v = devp->hd_irqdata;
  296. spin_unlock_irq(&hpet_lock);
  297. if (v != 0)
  298. return EPOLLIN | EPOLLRDNORM;
  299. return 0;
  300. }
  301. #ifdef CONFIG_HPET_MMAP
  302. #ifdef CONFIG_HPET_MMAP_DEFAULT
  303. static int hpet_mmap_enabled = 1;
  304. #else
  305. static int hpet_mmap_enabled = 0;
  306. #endif
  307. static __init int hpet_mmap_enable(char *str)
  308. {
  309. get_option(&str, &hpet_mmap_enabled);
  310. pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled");
  311. return 1;
  312. }
  313. __setup("hpet_mmap=", hpet_mmap_enable);
  314. static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
  315. {
  316. struct hpet_dev *devp;
  317. unsigned long addr;
  318. if (!hpet_mmap_enabled)
  319. return -EACCES;
  320. devp = file->private_data;
  321. addr = devp->hd_hpets->hp_hpet_phys;
  322. if (addr & (PAGE_SIZE - 1))
  323. return -ENOSYS;
  324. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  325. return vm_iomap_memory(vma, addr, PAGE_SIZE);
  326. }
  327. #else
  328. static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
  329. {
  330. return -ENOSYS;
  331. }
  332. #endif
  333. static int hpet_fasync(int fd, struct file *file, int on)
  334. {
  335. struct hpet_dev *devp;
  336. devp = file->private_data;
  337. if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
  338. return 0;
  339. else
  340. return -EIO;
  341. }
  342. static int hpet_release(struct inode *inode, struct file *file)
  343. {
  344. struct hpet_dev *devp;
  345. struct hpet_timer __iomem *timer;
  346. int irq = 0;
  347. devp = file->private_data;
  348. timer = devp->hd_timer;
  349. spin_lock_irq(&hpet_lock);
  350. writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
  351. &timer->hpet_config);
  352. irq = devp->hd_irq;
  353. devp->hd_irq = 0;
  354. devp->hd_ireqfreq = 0;
  355. if (devp->hd_flags & HPET_PERIODIC
  356. && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  357. unsigned long v;
  358. v = readq(&timer->hpet_config);
  359. v ^= Tn_TYPE_CNF_MASK;
  360. writeq(v, &timer->hpet_config);
  361. }
  362. devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
  363. spin_unlock_irq(&hpet_lock);
  364. if (irq)
  365. free_irq(irq, devp);
  366. file->private_data = NULL;
  367. return 0;
  368. }
  369. static int hpet_ioctl_ieon(struct hpet_dev *devp)
  370. {
  371. struct hpet_timer __iomem *timer;
  372. struct hpet __iomem *hpet;
  373. struct hpets *hpetp;
  374. int irq;
  375. unsigned long g, v, t, m;
  376. unsigned long flags, isr;
  377. timer = devp->hd_timer;
  378. hpet = devp->hd_hpet;
  379. hpetp = devp->hd_hpets;
  380. if (!devp->hd_ireqfreq)
  381. return -EIO;
  382. spin_lock_irq(&hpet_lock);
  383. if (devp->hd_flags & HPET_IE) {
  384. spin_unlock_irq(&hpet_lock);
  385. return -EBUSY;
  386. }
  387. devp->hd_flags |= HPET_IE;
  388. if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
  389. devp->hd_flags |= HPET_SHARED_IRQ;
  390. spin_unlock_irq(&hpet_lock);
  391. irq = devp->hd_hdwirq;
  392. if (irq) {
  393. unsigned long irq_flags;
  394. if (devp->hd_flags & HPET_SHARED_IRQ) {
  395. /*
  396. * To prevent the interrupt handler from seeing an
  397. * unwanted interrupt status bit, program the timer
  398. * so that it will not fire in the near future ...
  399. */
  400. writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
  401. &timer->hpet_config);
  402. write_counter(read_counter(&hpet->hpet_mc),
  403. &timer->hpet_compare);
  404. /* ... and clear any left-over status. */
  405. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  406. writel(isr, &hpet->hpet_isr);
  407. }
  408. sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
  409. irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
  410. if (request_irq(irq, hpet_interrupt, irq_flags,
  411. devp->hd_name, (void *)devp)) {
  412. printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
  413. irq = 0;
  414. }
  415. }
  416. if (irq == 0) {
  417. spin_lock_irq(&hpet_lock);
  418. devp->hd_flags ^= HPET_IE;
  419. spin_unlock_irq(&hpet_lock);
  420. return -EIO;
  421. }
  422. devp->hd_irq = irq;
  423. t = devp->hd_ireqfreq;
  424. v = readq(&timer->hpet_config);
  425. /* 64-bit comparators are not yet supported through the ioctls,
  426. * so force this into 32-bit mode if it supports both modes
  427. */
  428. g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
  429. if (devp->hd_flags & HPET_PERIODIC) {
  430. g |= Tn_TYPE_CNF_MASK;
  431. v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
  432. writeq(v, &timer->hpet_config);
  433. local_irq_save(flags);
  434. /*
  435. * NOTE: First we modify the hidden accumulator
  436. * register supported by periodic-capable comparators.
  437. * We never want to modify the (single) counter; that
  438. * would affect all the comparators. The value written
  439. * is the counter value when the first interrupt is due.
  440. */
  441. m = read_counter(&hpet->hpet_mc);
  442. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  443. /*
  444. * Then we modify the comparator, indicating the period
  445. * for subsequent interrupt.
  446. */
  447. write_counter(t, &timer->hpet_compare);
  448. } else {
  449. local_irq_save(flags);
  450. m = read_counter(&hpet->hpet_mc);
  451. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  452. }
  453. if (devp->hd_flags & HPET_SHARED_IRQ) {
  454. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  455. writel(isr, &hpet->hpet_isr);
  456. }
  457. writeq(g, &timer->hpet_config);
  458. local_irq_restore(flags);
  459. return 0;
  460. }
  461. /* converts Hz to number of timer ticks */
  462. static inline unsigned long hpet_time_div(struct hpets *hpets,
  463. unsigned long dis)
  464. {
  465. unsigned long long m;
  466. m = hpets->hp_tick_freq + (dis >> 1);
  467. return div64_ul(m, dis);
  468. }
  469. static int
  470. hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg,
  471. struct hpet_info *info)
  472. {
  473. struct hpet_timer __iomem *timer;
  474. struct hpets *hpetp;
  475. int err;
  476. unsigned long v;
  477. switch (cmd) {
  478. case HPET_IE_OFF:
  479. case HPET_INFO:
  480. case HPET_EPI:
  481. case HPET_DPI:
  482. case HPET_IRQFREQ:
  483. timer = devp->hd_timer;
  484. hpetp = devp->hd_hpets;
  485. break;
  486. case HPET_IE_ON:
  487. return hpet_ioctl_ieon(devp);
  488. default:
  489. return -EINVAL;
  490. }
  491. err = 0;
  492. switch (cmd) {
  493. case HPET_IE_OFF:
  494. if ((devp->hd_flags & HPET_IE) == 0)
  495. break;
  496. v = readq(&timer->hpet_config);
  497. v &= ~Tn_INT_ENB_CNF_MASK;
  498. writeq(v, &timer->hpet_config);
  499. if (devp->hd_irq) {
  500. free_irq(devp->hd_irq, devp);
  501. devp->hd_irq = 0;
  502. }
  503. devp->hd_flags ^= HPET_IE;
  504. break;
  505. case HPET_INFO:
  506. {
  507. memset(info, 0, sizeof(*info));
  508. if (devp->hd_ireqfreq)
  509. info->hi_ireqfreq =
  510. hpet_time_div(hpetp, devp->hd_ireqfreq);
  511. info->hi_flags =
  512. readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
  513. info->hi_hpet = hpetp->hp_which;
  514. info->hi_timer = devp - hpetp->hp_dev;
  515. break;
  516. }
  517. case HPET_EPI:
  518. v = readq(&timer->hpet_config);
  519. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  520. err = -ENXIO;
  521. break;
  522. }
  523. devp->hd_flags |= HPET_PERIODIC;
  524. break;
  525. case HPET_DPI:
  526. v = readq(&timer->hpet_config);
  527. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  528. err = -ENXIO;
  529. break;
  530. }
  531. if (devp->hd_flags & HPET_PERIODIC &&
  532. readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  533. v = readq(&timer->hpet_config);
  534. v ^= Tn_TYPE_CNF_MASK;
  535. writeq(v, &timer->hpet_config);
  536. }
  537. devp->hd_flags &= ~HPET_PERIODIC;
  538. break;
  539. case HPET_IRQFREQ:
  540. if ((arg > hpet_max_freq) &&
  541. !capable(CAP_SYS_RESOURCE)) {
  542. err = -EACCES;
  543. break;
  544. }
  545. if (!arg) {
  546. err = -EINVAL;
  547. break;
  548. }
  549. devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
  550. }
  551. return err;
  552. }
  553. static long
  554. hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  555. {
  556. struct hpet_info info;
  557. int err;
  558. mutex_lock(&hpet_mutex);
  559. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  560. mutex_unlock(&hpet_mutex);
  561. if ((cmd == HPET_INFO) && !err &&
  562. (copy_to_user((void __user *)arg, &info, sizeof(info))))
  563. err = -EFAULT;
  564. return err;
  565. }
  566. #ifdef CONFIG_COMPAT
  567. struct compat_hpet_info {
  568. compat_ulong_t hi_ireqfreq; /* Hz */
  569. compat_ulong_t hi_flags; /* information */
  570. unsigned short hi_hpet;
  571. unsigned short hi_timer;
  572. };
  573. static long
  574. hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  575. {
  576. struct hpet_info info;
  577. int err;
  578. mutex_lock(&hpet_mutex);
  579. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  580. mutex_unlock(&hpet_mutex);
  581. if ((cmd == HPET_INFO) && !err) {
  582. struct compat_hpet_info __user *u = compat_ptr(arg);
  583. if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
  584. put_user(info.hi_flags, &u->hi_flags) ||
  585. put_user(info.hi_hpet, &u->hi_hpet) ||
  586. put_user(info.hi_timer, &u->hi_timer))
  587. err = -EFAULT;
  588. }
  589. return err;
  590. }
  591. #endif
  592. static const struct file_operations hpet_fops = {
  593. .owner = THIS_MODULE,
  594. .llseek = no_llseek,
  595. .read = hpet_read,
  596. .poll = hpet_poll,
  597. .unlocked_ioctl = hpet_ioctl,
  598. #ifdef CONFIG_COMPAT
  599. .compat_ioctl = hpet_compat_ioctl,
  600. #endif
  601. .open = hpet_open,
  602. .release = hpet_release,
  603. .fasync = hpet_fasync,
  604. .mmap = hpet_mmap,
  605. };
  606. static int hpet_is_known(struct hpet_data *hdp)
  607. {
  608. struct hpets *hpetp;
  609. for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
  610. if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
  611. return 1;
  612. return 0;
  613. }
  614. static struct ctl_table hpet_table[] = {
  615. {
  616. .procname = "max-user-freq",
  617. .data = &hpet_max_freq,
  618. .maxlen = sizeof(int),
  619. .mode = 0644,
  620. .proc_handler = proc_dointvec,
  621. },
  622. {}
  623. };
  624. static struct ctl_table hpet_root[] = {
  625. {
  626. .procname = "hpet",
  627. .maxlen = 0,
  628. .mode = 0555,
  629. .child = hpet_table,
  630. },
  631. {}
  632. };
  633. static struct ctl_table dev_root[] = {
  634. {
  635. .procname = "dev",
  636. .maxlen = 0,
  637. .mode = 0555,
  638. .child = hpet_root,
  639. },
  640. {}
  641. };
  642. static struct ctl_table_header *sysctl_header;
  643. /*
  644. * Adjustment for when arming the timer with
  645. * initial conditions. That is, main counter
  646. * ticks expired before interrupts are enabled.
  647. */
  648. #define TICK_CALIBRATE (1000UL)
  649. static unsigned long __hpet_calibrate(struct hpets *hpetp)
  650. {
  651. struct hpet_timer __iomem *timer = NULL;
  652. unsigned long t, m, count, i, flags, start;
  653. struct hpet_dev *devp;
  654. int j;
  655. struct hpet __iomem *hpet;
  656. for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
  657. if ((devp->hd_flags & HPET_OPEN) == 0) {
  658. timer = devp->hd_timer;
  659. break;
  660. }
  661. if (!timer)
  662. return 0;
  663. hpet = hpetp->hp_hpet;
  664. t = read_counter(&timer->hpet_compare);
  665. i = 0;
  666. count = hpet_time_div(hpetp, TICK_CALIBRATE);
  667. local_irq_save(flags);
  668. start = read_counter(&hpet->hpet_mc);
  669. do {
  670. m = read_counter(&hpet->hpet_mc);
  671. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  672. } while (i++, (m - start) < count);
  673. local_irq_restore(flags);
  674. return (m - start) / i;
  675. }
  676. static unsigned long hpet_calibrate(struct hpets *hpetp)
  677. {
  678. unsigned long ret = ~0UL;
  679. unsigned long tmp;
  680. /*
  681. * Try to calibrate until return value becomes stable small value.
  682. * If SMI interruption occurs in calibration loop, the return value
  683. * will be big. This avoids its impact.
  684. */
  685. for ( ; ; ) {
  686. tmp = __hpet_calibrate(hpetp);
  687. if (ret <= tmp)
  688. break;
  689. ret = tmp;
  690. }
  691. return ret;
  692. }
  693. int hpet_alloc(struct hpet_data *hdp)
  694. {
  695. u64 cap, mcfg;
  696. struct hpet_dev *devp;
  697. u32 i, ntimer;
  698. struct hpets *hpetp;
  699. struct hpet __iomem *hpet;
  700. static struct hpets *last;
  701. unsigned long period;
  702. unsigned long long temp;
  703. u32 remainder;
  704. /*
  705. * hpet_alloc can be called by platform dependent code.
  706. * If platform dependent code has allocated the hpet that
  707. * ACPI has also reported, then we catch it here.
  708. */
  709. if (hpet_is_known(hdp)) {
  710. printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
  711. __func__);
  712. return 0;
  713. }
  714. hpetp = kzalloc(struct_size(hpetp, hp_dev, hdp->hd_nirqs),
  715. GFP_KERNEL);
  716. if (!hpetp)
  717. return -ENOMEM;
  718. hpetp->hp_which = hpet_nhpet++;
  719. hpetp->hp_hpet = hdp->hd_address;
  720. hpetp->hp_hpet_phys = hdp->hd_phys_address;
  721. hpetp->hp_ntimer = hdp->hd_nirqs;
  722. for (i = 0; i < hdp->hd_nirqs; i++)
  723. hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
  724. hpet = hpetp->hp_hpet;
  725. cap = readq(&hpet->hpet_cap);
  726. ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
  727. if (hpetp->hp_ntimer != ntimer) {
  728. printk(KERN_WARNING "hpet: number irqs doesn't agree"
  729. " with number of timers\n");
  730. kfree(hpetp);
  731. return -ENODEV;
  732. }
  733. if (last)
  734. last->hp_next = hpetp;
  735. else
  736. hpets = hpetp;
  737. last = hpetp;
  738. period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
  739. HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
  740. temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
  741. temp += period >> 1; /* round */
  742. do_div(temp, period);
  743. hpetp->hp_tick_freq = temp; /* ticks per second */
  744. printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
  745. hpetp->hp_which, hdp->hd_phys_address,
  746. hpetp->hp_ntimer > 1 ? "s" : "");
  747. for (i = 0; i < hpetp->hp_ntimer; i++)
  748. printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
  749. printk(KERN_CONT "\n");
  750. temp = hpetp->hp_tick_freq;
  751. remainder = do_div(temp, 1000000);
  752. printk(KERN_INFO
  753. "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
  754. hpetp->hp_which, hpetp->hp_ntimer,
  755. cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
  756. (unsigned) temp, remainder);
  757. mcfg = readq(&hpet->hpet_config);
  758. if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
  759. write_counter(0L, &hpet->hpet_mc);
  760. mcfg |= HPET_ENABLE_CNF_MASK;
  761. writeq(mcfg, &hpet->hpet_config);
  762. }
  763. for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
  764. struct hpet_timer __iomem *timer;
  765. timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
  766. devp->hd_hpets = hpetp;
  767. devp->hd_hpet = hpet;
  768. devp->hd_timer = timer;
  769. /*
  770. * If the timer was reserved by platform code,
  771. * then make timer unavailable for opens.
  772. */
  773. if (hdp->hd_state & (1 << i)) {
  774. devp->hd_flags = HPET_OPEN;
  775. continue;
  776. }
  777. init_waitqueue_head(&devp->hd_waitqueue);
  778. }
  779. hpetp->hp_delta = hpet_calibrate(hpetp);
  780. /* This clocksource driver currently only works on ia64 */
  781. #ifdef CONFIG_IA64
  782. if (!hpet_clocksource) {
  783. hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
  784. clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
  785. clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
  786. hpetp->hp_clocksource = &clocksource_hpet;
  787. hpet_clocksource = &clocksource_hpet;
  788. }
  789. #endif
  790. return 0;
  791. }
  792. static acpi_status hpet_resources(struct acpi_resource *res, void *data)
  793. {
  794. struct hpet_data *hdp;
  795. acpi_status status;
  796. struct acpi_resource_address64 addr;
  797. hdp = data;
  798. status = acpi_resource_to_address64(res, &addr);
  799. if (ACPI_SUCCESS(status)) {
  800. hdp->hd_phys_address = addr.address.minimum;
  801. hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length);
  802. if (!hdp->hd_address)
  803. return AE_ERROR;
  804. if (hpet_is_known(hdp)) {
  805. iounmap(hdp->hd_address);
  806. return AE_ALREADY_EXISTS;
  807. }
  808. } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
  809. struct acpi_resource_fixed_memory32 *fixmem32;
  810. fixmem32 = &res->data.fixed_memory32;
  811. hdp->hd_phys_address = fixmem32->address;
  812. hdp->hd_address = ioremap(fixmem32->address,
  813. HPET_RANGE_SIZE);
  814. if (!hdp->hd_address)
  815. return AE_ERROR;
  816. if (hpet_is_known(hdp)) {
  817. iounmap(hdp->hd_address);
  818. return AE_ALREADY_EXISTS;
  819. }
  820. } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
  821. struct acpi_resource_extended_irq *irqp;
  822. int i, irq;
  823. irqp = &res->data.extended_irq;
  824. for (i = 0; i < irqp->interrupt_count; i++) {
  825. if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
  826. break;
  827. irq = acpi_register_gsi(NULL, irqp->interrupts[i],
  828. irqp->triggering, irqp->polarity);
  829. if (irq < 0)
  830. return AE_ERROR;
  831. hdp->hd_irq[hdp->hd_nirqs] = irq;
  832. hdp->hd_nirqs++;
  833. }
  834. }
  835. return AE_OK;
  836. }
  837. static int hpet_acpi_add(struct acpi_device *device)
  838. {
  839. acpi_status result;
  840. struct hpet_data data;
  841. memset(&data, 0, sizeof(data));
  842. result =
  843. acpi_walk_resources(device->handle, METHOD_NAME__CRS,
  844. hpet_resources, &data);
  845. if (ACPI_FAILURE(result))
  846. return -ENODEV;
  847. if (!data.hd_address || !data.hd_nirqs) {
  848. if (data.hd_address)
  849. iounmap(data.hd_address);
  850. printk("%s: no address or irqs in _CRS\n", __func__);
  851. return -ENODEV;
  852. }
  853. return hpet_alloc(&data);
  854. }
  855. static const struct acpi_device_id hpet_device_ids[] = {
  856. {"PNP0103", 0},
  857. {"", 0},
  858. };
  859. static struct acpi_driver hpet_acpi_driver = {
  860. .name = "hpet",
  861. .ids = hpet_device_ids,
  862. .ops = {
  863. .add = hpet_acpi_add,
  864. },
  865. };
  866. static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
  867. static int __init hpet_init(void)
  868. {
  869. int result;
  870. result = misc_register(&hpet_misc);
  871. if (result < 0)
  872. return -ENODEV;
  873. sysctl_header = register_sysctl_table(dev_root);
  874. result = acpi_bus_register_driver(&hpet_acpi_driver);
  875. if (result < 0) {
  876. if (sysctl_header)
  877. unregister_sysctl_table(sysctl_header);
  878. misc_deregister(&hpet_misc);
  879. return result;
  880. }
  881. return 0;
  882. }
  883. device_initcall(hpet_init);
  884. /*
  885. MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
  886. MODULE_LICENSE("GPL");
  887. */