pata_sch.c 4.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * pata_sch.c - Intel SCH PATA controllers
  4. *
  5. * Copyright (c) 2008 Alek Du <alek.du@intel.com>
  6. */
  7. /*
  8. * Supports:
  9. * Intel SCH (AF82US15W, AF82US15L, AF82UL11L) chipsets -- see spec at:
  10. * http://download.intel.com/design/chipsets/embedded/datashts/319537.pdf
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/pci.h>
  15. #include <linux/blkdev.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <scsi/scsi_host.h>
  19. #include <linux/libata.h>
  20. #include <linux/dmi.h>
  21. #define DRV_NAME "pata_sch"
  22. #define DRV_VERSION "0.2"
  23. /* see SCH datasheet page 351 */
  24. enum {
  25. D0TIM = 0x80, /* Device 0 Timing Register */
  26. D1TIM = 0x84, /* Device 1 Timing Register */
  27. PM = 0x07, /* PIO Mode Bit Mask */
  28. MDM = (0x03 << 8), /* Multi-word DMA Mode Bit Mask */
  29. UDM = (0x07 << 16), /* Ultra DMA Mode Bit Mask */
  30. PPE = (1 << 30), /* Prefetch/Post Enable */
  31. USD = (1 << 31), /* Use Synchronous DMA */
  32. };
  33. static int sch_init_one(struct pci_dev *pdev,
  34. const struct pci_device_id *ent);
  35. static void sch_set_piomode(struct ata_port *ap, struct ata_device *adev);
  36. static void sch_set_dmamode(struct ata_port *ap, struct ata_device *adev);
  37. static const struct pci_device_id sch_pci_tbl[] = {
  38. /* Intel SCH PATA Controller */
  39. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_IDE), 0 },
  40. { } /* terminate list */
  41. };
  42. static struct pci_driver sch_pci_driver = {
  43. .name = DRV_NAME,
  44. .id_table = sch_pci_tbl,
  45. .probe = sch_init_one,
  46. .remove = ata_pci_remove_one,
  47. #ifdef CONFIG_PM_SLEEP
  48. .suspend = ata_pci_device_suspend,
  49. .resume = ata_pci_device_resume,
  50. #endif
  51. };
  52. static struct scsi_host_template sch_sht = {
  53. ATA_BMDMA_SHT(DRV_NAME),
  54. };
  55. static struct ata_port_operations sch_pata_ops = {
  56. .inherits = &ata_bmdma_port_ops,
  57. .cable_detect = ata_cable_unknown,
  58. .set_piomode = sch_set_piomode,
  59. .set_dmamode = sch_set_dmamode,
  60. };
  61. static const struct ata_port_info sch_port_info = {
  62. .flags = ATA_FLAG_SLAVE_POSS,
  63. .pio_mask = ATA_PIO4,
  64. .mwdma_mask = ATA_MWDMA2,
  65. .udma_mask = ATA_UDMA5,
  66. .port_ops = &sch_pata_ops,
  67. };
  68. MODULE_AUTHOR("Alek Du <alek.du@intel.com>");
  69. MODULE_DESCRIPTION("SCSI low-level driver for Intel SCH PATA controllers");
  70. MODULE_LICENSE("GPL");
  71. MODULE_DEVICE_TABLE(pci, sch_pci_tbl);
  72. MODULE_VERSION(DRV_VERSION);
  73. /**
  74. * sch_set_piomode - Initialize host controller PATA PIO timings
  75. * @ap: Port whose timings we are configuring
  76. * @adev: ATA device
  77. *
  78. * Set PIO mode for device, in host controller PCI config space.
  79. *
  80. * LOCKING:
  81. * None (inherited from caller).
  82. */
  83. static void sch_set_piomode(struct ata_port *ap, struct ata_device *adev)
  84. {
  85. unsigned int pio = adev->pio_mode - XFER_PIO_0;
  86. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  87. unsigned int port = adev->devno ? D1TIM : D0TIM;
  88. unsigned int data;
  89. pci_read_config_dword(dev, port, &data);
  90. /* see SCH datasheet page 351 */
  91. /* set PIO mode */
  92. data &= ~(PM | PPE);
  93. data |= pio;
  94. /* enable PPE for block device */
  95. if (adev->class == ATA_DEV_ATA)
  96. data |= PPE;
  97. pci_write_config_dword(dev, port, data);
  98. }
  99. /**
  100. * sch_set_dmamode - Initialize host controller PATA DMA timings
  101. * @ap: Port whose timings we are configuring
  102. * @adev: ATA device
  103. *
  104. * Set MW/UDMA mode for device, in host controller PCI config space.
  105. *
  106. * LOCKING:
  107. * None (inherited from caller).
  108. */
  109. static void sch_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  110. {
  111. unsigned int dma_mode = adev->dma_mode;
  112. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  113. unsigned int port = adev->devno ? D1TIM : D0TIM;
  114. unsigned int data;
  115. pci_read_config_dword(dev, port, &data);
  116. /* see SCH datasheet page 351 */
  117. if (dma_mode >= XFER_UDMA_0) {
  118. /* enable Synchronous DMA mode */
  119. data |= USD;
  120. data &= ~UDM;
  121. data |= (dma_mode - XFER_UDMA_0) << 16;
  122. } else { /* must be MWDMA mode, since we masked SWDMA already */
  123. data &= ~(USD | MDM);
  124. data |= (dma_mode - XFER_MW_DMA_0) << 8;
  125. }
  126. pci_write_config_dword(dev, port, data);
  127. }
  128. /**
  129. * sch_init_one - Register SCH ATA PCI device with kernel services
  130. * @pdev: PCI device to register
  131. * @ent: Entry in sch_pci_tbl matching with @pdev
  132. *
  133. * LOCKING:
  134. * Inherited from PCI layer (may sleep).
  135. *
  136. * RETURNS:
  137. * Zero on success, or -ERRNO value.
  138. */
  139. static int sch_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  140. {
  141. const struct ata_port_info *ppi[] = { &sch_port_info, NULL };
  142. ata_print_version_once(&pdev->dev, DRV_VERSION);
  143. return ata_pci_bmdma_init_one(pdev, ppi, &sch_sht, NULL, 0);
  144. }
  145. module_pci_driver(sch_pci_driver);