pata_imx.c 7.4 KB

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  1. /*
  2. * Freescale iMX PATA driver
  3. *
  4. * Copyright (C) 2011 Arnaud Patard <arnaud.patard@rtp-net.org>
  5. *
  6. * Based on pata_platform - Copyright (C) 2006 - 2007 Paul Mundt
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. *
  12. * TODO:
  13. * - dmaengine support
  14. */
  15. #include <linux/ata.h>
  16. #include <linux/clk.h>
  17. #include <linux/libata.h>
  18. #include <linux/module.h>
  19. #include <linux/mod_devicetable.h>
  20. #include <linux/platform_device.h>
  21. #define DRV_NAME "pata_imx"
  22. #define PATA_IMX_ATA_TIME_OFF 0x00
  23. #define PATA_IMX_ATA_TIME_ON 0x01
  24. #define PATA_IMX_ATA_TIME_1 0x02
  25. #define PATA_IMX_ATA_TIME_2W 0x03
  26. #define PATA_IMX_ATA_TIME_2R 0x04
  27. #define PATA_IMX_ATA_TIME_AX 0x05
  28. #define PATA_IMX_ATA_TIME_PIO_RDX 0x06
  29. #define PATA_IMX_ATA_TIME_4 0x07
  30. #define PATA_IMX_ATA_TIME_9 0x08
  31. #define PATA_IMX_ATA_CONTROL 0x24
  32. #define PATA_IMX_ATA_CTRL_FIFO_RST_B (1<<7)
  33. #define PATA_IMX_ATA_CTRL_ATA_RST_B (1<<6)
  34. #define PATA_IMX_ATA_CTRL_IORDY_EN (1<<0)
  35. #define PATA_IMX_ATA_INT_EN 0x2C
  36. #define PATA_IMX_ATA_INTR_ATA_INTRQ2 (1<<3)
  37. #define PATA_IMX_DRIVE_DATA 0xA0
  38. #define PATA_IMX_DRIVE_CONTROL 0xD8
  39. static u32 pio_t4[] = { 30, 20, 15, 10, 10 };
  40. static u32 pio_t9[] = { 20, 15, 10, 10, 10 };
  41. static u32 pio_tA[] = { 35, 35, 35, 35, 35 };
  42. struct pata_imx_priv {
  43. struct clk *clk;
  44. /* timings/interrupt/control regs */
  45. void __iomem *host_regs;
  46. u32 ata_ctl;
  47. };
  48. static void pata_imx_set_timing(struct ata_device *adev,
  49. struct pata_imx_priv *priv)
  50. {
  51. struct ata_timing timing;
  52. unsigned long clkrate;
  53. u32 T, mode;
  54. clkrate = clk_get_rate(priv->clk);
  55. if (adev->pio_mode < XFER_PIO_0 || adev->pio_mode > XFER_PIO_4 ||
  56. !clkrate)
  57. return;
  58. T = 1000000000 / clkrate;
  59. ata_timing_compute(adev, adev->pio_mode, &timing, T * 1000, 0);
  60. mode = adev->pio_mode - XFER_PIO_0;
  61. writeb(3, priv->host_regs + PATA_IMX_ATA_TIME_OFF);
  62. writeb(3, priv->host_regs + PATA_IMX_ATA_TIME_ON);
  63. writeb(timing.setup, priv->host_regs + PATA_IMX_ATA_TIME_1);
  64. writeb(timing.act8b, priv->host_regs + PATA_IMX_ATA_TIME_2W);
  65. writeb(timing.act8b, priv->host_regs + PATA_IMX_ATA_TIME_2R);
  66. writeb(1, priv->host_regs + PATA_IMX_ATA_TIME_PIO_RDX);
  67. writeb(pio_t4[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_4);
  68. writeb(pio_t9[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_9);
  69. writeb(pio_tA[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_AX);
  70. }
  71. static void pata_imx_set_piomode(struct ata_port *ap, struct ata_device *adev)
  72. {
  73. struct pata_imx_priv *priv = ap->host->private_data;
  74. u32 val;
  75. pata_imx_set_timing(adev, priv);
  76. val = __raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL);
  77. if (ata_pio_need_iordy(adev))
  78. val |= PATA_IMX_ATA_CTRL_IORDY_EN;
  79. else
  80. val &= ~PATA_IMX_ATA_CTRL_IORDY_EN;
  81. __raw_writel(val, priv->host_regs + PATA_IMX_ATA_CONTROL);
  82. }
  83. static struct scsi_host_template pata_imx_sht = {
  84. ATA_PIO_SHT(DRV_NAME),
  85. };
  86. static struct ata_port_operations pata_imx_port_ops = {
  87. .inherits = &ata_sff_port_ops,
  88. .sff_data_xfer = ata_sff_data_xfer32,
  89. .cable_detect = ata_cable_unknown,
  90. .set_piomode = pata_imx_set_piomode,
  91. };
  92. static void pata_imx_setup_port(struct ata_ioports *ioaddr)
  93. {
  94. /* Fixup the port shift for platforms that need it */
  95. ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << 2);
  96. ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << 2);
  97. ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << 2);
  98. ioaddr->nsect_addr = ioaddr->cmd_addr + (ATA_REG_NSECT << 2);
  99. ioaddr->lbal_addr = ioaddr->cmd_addr + (ATA_REG_LBAL << 2);
  100. ioaddr->lbam_addr = ioaddr->cmd_addr + (ATA_REG_LBAM << 2);
  101. ioaddr->lbah_addr = ioaddr->cmd_addr + (ATA_REG_LBAH << 2);
  102. ioaddr->device_addr = ioaddr->cmd_addr + (ATA_REG_DEVICE << 2);
  103. ioaddr->status_addr = ioaddr->cmd_addr + (ATA_REG_STATUS << 2);
  104. ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << 2);
  105. }
  106. static int pata_imx_probe(struct platform_device *pdev)
  107. {
  108. struct ata_host *host;
  109. struct ata_port *ap;
  110. struct pata_imx_priv *priv;
  111. int irq = 0;
  112. struct resource *io_res;
  113. int ret;
  114. irq = platform_get_irq(pdev, 0);
  115. if (irq < 0)
  116. return irq;
  117. priv = devm_kzalloc(&pdev->dev,
  118. sizeof(struct pata_imx_priv), GFP_KERNEL);
  119. if (!priv)
  120. return -ENOMEM;
  121. priv->clk = devm_clk_get(&pdev->dev, NULL);
  122. if (IS_ERR(priv->clk)) {
  123. dev_err(&pdev->dev, "Failed to get clock\n");
  124. return PTR_ERR(priv->clk);
  125. }
  126. ret = clk_prepare_enable(priv->clk);
  127. if (ret)
  128. return ret;
  129. host = ata_host_alloc(&pdev->dev, 1);
  130. if (!host) {
  131. ret = -ENOMEM;
  132. goto err;
  133. }
  134. host->private_data = priv;
  135. ap = host->ports[0];
  136. ap->ops = &pata_imx_port_ops;
  137. ap->pio_mask = ATA_PIO4;
  138. ap->flags |= ATA_FLAG_SLAVE_POSS;
  139. io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  140. priv->host_regs = devm_ioremap_resource(&pdev->dev, io_res);
  141. if (IS_ERR(priv->host_regs)) {
  142. ret = PTR_ERR(priv->host_regs);
  143. goto err;
  144. }
  145. ap->ioaddr.cmd_addr = priv->host_regs + PATA_IMX_DRIVE_DATA;
  146. ap->ioaddr.ctl_addr = priv->host_regs + PATA_IMX_DRIVE_CONTROL;
  147. ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
  148. pata_imx_setup_port(&ap->ioaddr);
  149. ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
  150. (unsigned long long)io_res->start + PATA_IMX_DRIVE_DATA,
  151. (unsigned long long)io_res->start + PATA_IMX_DRIVE_CONTROL);
  152. /* deassert resets */
  153. __raw_writel(PATA_IMX_ATA_CTRL_FIFO_RST_B |
  154. PATA_IMX_ATA_CTRL_ATA_RST_B,
  155. priv->host_regs + PATA_IMX_ATA_CONTROL);
  156. /* enable interrupts */
  157. __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2,
  158. priv->host_regs + PATA_IMX_ATA_INT_EN);
  159. /* activate */
  160. ret = ata_host_activate(host, irq, ata_sff_interrupt, 0,
  161. &pata_imx_sht);
  162. if (ret)
  163. goto err;
  164. return 0;
  165. err:
  166. clk_disable_unprepare(priv->clk);
  167. return ret;
  168. }
  169. static int pata_imx_remove(struct platform_device *pdev)
  170. {
  171. struct ata_host *host = platform_get_drvdata(pdev);
  172. struct pata_imx_priv *priv = host->private_data;
  173. ata_host_detach(host);
  174. __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN);
  175. clk_disable_unprepare(priv->clk);
  176. return 0;
  177. }
  178. #ifdef CONFIG_PM_SLEEP
  179. static int pata_imx_suspend(struct device *dev)
  180. {
  181. struct ata_host *host = dev_get_drvdata(dev);
  182. struct pata_imx_priv *priv = host->private_data;
  183. int ret;
  184. ret = ata_host_suspend(host, PMSG_SUSPEND);
  185. if (!ret) {
  186. __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN);
  187. priv->ata_ctl =
  188. __raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL);
  189. clk_disable_unprepare(priv->clk);
  190. }
  191. return ret;
  192. }
  193. static int pata_imx_resume(struct device *dev)
  194. {
  195. struct ata_host *host = dev_get_drvdata(dev);
  196. struct pata_imx_priv *priv = host->private_data;
  197. int ret = clk_prepare_enable(priv->clk);
  198. if (ret)
  199. return ret;
  200. __raw_writel(priv->ata_ctl, priv->host_regs + PATA_IMX_ATA_CONTROL);
  201. __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2,
  202. priv->host_regs + PATA_IMX_ATA_INT_EN);
  203. ata_host_resume(host);
  204. return 0;
  205. }
  206. #endif
  207. static SIMPLE_DEV_PM_OPS(pata_imx_pm_ops, pata_imx_suspend, pata_imx_resume);
  208. static const struct of_device_id imx_pata_dt_ids[] = {
  209. {
  210. .compatible = "fsl,imx27-pata",
  211. }, {
  212. /* sentinel */
  213. }
  214. };
  215. MODULE_DEVICE_TABLE(of, imx_pata_dt_ids);
  216. static struct platform_driver pata_imx_driver = {
  217. .probe = pata_imx_probe,
  218. .remove = pata_imx_remove,
  219. .driver = {
  220. .name = DRV_NAME,
  221. .of_match_table = imx_pata_dt_ids,
  222. .pm = &pata_imx_pm_ops,
  223. },
  224. };
  225. module_platform_driver(pata_imx_driver);
  226. MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
  227. MODULE_DESCRIPTION("low-level driver for iMX PATA");
  228. MODULE_LICENSE("GPL");
  229. MODULE_ALIAS("platform:" DRV_NAME);