pata_cmd640.c 6.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * pata_cmd640.c - CMD640 PCI PATA for new ATA layer
  4. * (C) 2007 Red Hat Inc
  5. *
  6. * Based upon
  7. * linux/drivers/ide/pci/cmd640.c Version 1.02 Sep 01, 1996
  8. *
  9. * Copyright (C) 1995-1996 Linus Torvalds & authors (see driver)
  10. *
  11. * This drives only the PCI version of the controller. If you have a
  12. * VLB one then we have enough docs to support it but you can write
  13. * your own code.
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/pci.h>
  18. #include <linux/blkdev.h>
  19. #include <linux/delay.h>
  20. #include <linux/gfp.h>
  21. #include <scsi/scsi_host.h>
  22. #include <linux/libata.h>
  23. #define DRV_NAME "pata_cmd640"
  24. #define DRV_VERSION "0.0.5"
  25. struct cmd640_reg {
  26. int last;
  27. u8 reg58[ATA_MAX_DEVICES];
  28. };
  29. enum {
  30. CFR = 0x50,
  31. CNTRL = 0x51,
  32. CMDTIM = 0x52,
  33. ARTIM0 = 0x53,
  34. DRWTIM0 = 0x54,
  35. ARTIM23 = 0x57,
  36. DRWTIM23 = 0x58,
  37. BRST = 0x59
  38. };
  39. /**
  40. * cmd640_set_piomode - set initial PIO mode data
  41. * @ap: ATA port
  42. * @adev: ATA device
  43. *
  44. * Called to do the PIO mode setup.
  45. */
  46. static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev)
  47. {
  48. struct cmd640_reg *timing = ap->private_data;
  49. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  50. struct ata_timing t;
  51. const unsigned long T = 1000000 / 33;
  52. const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
  53. u8 reg;
  54. int arttim = ARTIM0 + 2 * adev->devno;
  55. struct ata_device *pair = ata_dev_pair(adev);
  56. if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
  57. printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
  58. return;
  59. }
  60. /* The second channel has shared timings and the setup timing is
  61. messy to switch to merge it for worst case */
  62. if (ap->port_no && pair) {
  63. struct ata_timing p;
  64. ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
  65. ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
  66. }
  67. /* Make the timings fit */
  68. if (t.recover > 16) {
  69. t.active += t.recover - 16;
  70. t.recover = 16;
  71. }
  72. if (t.active > 16)
  73. t.active = 16;
  74. /* Now convert the clocks into values we can actually stuff into
  75. the chip */
  76. if (t.recover > 1)
  77. t.recover--; /* 640B only */
  78. else
  79. t.recover = 15;
  80. if (t.setup > 4)
  81. t.setup = 0xC0;
  82. else
  83. t.setup = setup_data[t.setup];
  84. if (ap->port_no == 0) {
  85. t.active &= 0x0F; /* 0 = 16 */
  86. /* Load setup timing */
  87. pci_read_config_byte(pdev, arttim, &reg);
  88. reg &= 0x3F;
  89. reg |= t.setup;
  90. pci_write_config_byte(pdev, arttim, reg);
  91. /* Load active/recovery */
  92. pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover);
  93. } else {
  94. /* Save the shared timings for channel, they will be loaded
  95. by qc_issue. Reloading the setup time is expensive so we
  96. keep a merged one loaded */
  97. pci_read_config_byte(pdev, ARTIM23, &reg);
  98. reg &= 0x3F;
  99. reg |= t.setup;
  100. pci_write_config_byte(pdev, ARTIM23, reg);
  101. timing->reg58[adev->devno] = (t.active << 4) | t.recover;
  102. }
  103. }
  104. /**
  105. * cmd640_qc_issue - command preparation hook
  106. * @qc: Command to be issued
  107. *
  108. * Channel 1 has shared timings. We must reprogram the
  109. * clock each drive 2/3 switch we do.
  110. */
  111. static unsigned int cmd640_qc_issue(struct ata_queued_cmd *qc)
  112. {
  113. struct ata_port *ap = qc->ap;
  114. struct ata_device *adev = qc->dev;
  115. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  116. struct cmd640_reg *timing = ap->private_data;
  117. if (ap->port_no != 0 && adev->devno != timing->last) {
  118. pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);
  119. timing->last = adev->devno;
  120. }
  121. return ata_sff_qc_issue(qc);
  122. }
  123. /**
  124. * cmd640_port_start - port setup
  125. * @ap: ATA port being set up
  126. *
  127. * The CMD640 needs to maintain private data structures so we
  128. * allocate space here.
  129. */
  130. static int cmd640_port_start(struct ata_port *ap)
  131. {
  132. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  133. struct cmd640_reg *timing;
  134. timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);
  135. if (timing == NULL)
  136. return -ENOMEM;
  137. timing->last = -1; /* Force a load */
  138. ap->private_data = timing;
  139. return 0;
  140. }
  141. static bool cmd640_sff_irq_check(struct ata_port *ap)
  142. {
  143. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  144. int irq_reg = ap->port_no ? ARTIM23 : CFR;
  145. u8 irq_stat, irq_mask = ap->port_no ? 0x10 : 0x04;
  146. pci_read_config_byte(pdev, irq_reg, &irq_stat);
  147. return irq_stat & irq_mask;
  148. }
  149. static struct scsi_host_template cmd640_sht = {
  150. ATA_PIO_SHT(DRV_NAME),
  151. };
  152. static struct ata_port_operations cmd640_port_ops = {
  153. .inherits = &ata_sff_port_ops,
  154. /* In theory xfer_noirq is not needed once we kill the prefetcher */
  155. .sff_data_xfer = ata_sff_data_xfer32,
  156. .sff_irq_check = cmd640_sff_irq_check,
  157. .qc_issue = cmd640_qc_issue,
  158. .cable_detect = ata_cable_40wire,
  159. .set_piomode = cmd640_set_piomode,
  160. .port_start = cmd640_port_start,
  161. };
  162. static void cmd640_hardware_init(struct pci_dev *pdev)
  163. {
  164. u8 ctrl;
  165. /* CMD640 detected, commiserations */
  166. pci_write_config_byte(pdev, 0x5B, 0x00);
  167. /* PIO0 command cycles */
  168. pci_write_config_byte(pdev, CMDTIM, 0);
  169. /* 512 byte bursts (sector) */
  170. pci_write_config_byte(pdev, BRST, 0x40);
  171. /*
  172. * A reporter a long time ago
  173. * Had problems with the data fifo
  174. * So don't run the risk
  175. * Of putting crap on the disk
  176. * For its better just to go slow
  177. */
  178. /* Do channel 0 */
  179. pci_read_config_byte(pdev, CNTRL, &ctrl);
  180. pci_write_config_byte(pdev, CNTRL, ctrl | 0xC0);
  181. /* Ditto for channel 1 */
  182. pci_read_config_byte(pdev, ARTIM23, &ctrl);
  183. ctrl |= 0x0C;
  184. pci_write_config_byte(pdev, ARTIM23, ctrl);
  185. }
  186. static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
  187. {
  188. static const struct ata_port_info info = {
  189. .flags = ATA_FLAG_SLAVE_POSS,
  190. .pio_mask = ATA_PIO4,
  191. .port_ops = &cmd640_port_ops
  192. };
  193. const struct ata_port_info *ppi[] = { &info, NULL };
  194. int rc;
  195. rc = pcim_enable_device(pdev);
  196. if (rc)
  197. return rc;
  198. cmd640_hardware_init(pdev);
  199. return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL, 0);
  200. }
  201. #ifdef CONFIG_PM_SLEEP
  202. static int cmd640_reinit_one(struct pci_dev *pdev)
  203. {
  204. struct ata_host *host = pci_get_drvdata(pdev);
  205. int rc;
  206. rc = ata_pci_device_do_resume(pdev);
  207. if (rc)
  208. return rc;
  209. cmd640_hardware_init(pdev);
  210. ata_host_resume(host);
  211. return 0;
  212. }
  213. #endif
  214. static const struct pci_device_id cmd640[] = {
  215. { PCI_VDEVICE(CMD, 0x640), 0 },
  216. { },
  217. };
  218. static struct pci_driver cmd640_pci_driver = {
  219. .name = DRV_NAME,
  220. .id_table = cmd640,
  221. .probe = cmd640_init_one,
  222. .remove = ata_pci_remove_one,
  223. #ifdef CONFIG_PM_SLEEP
  224. .suspend = ata_pci_device_suspend,
  225. .resume = cmd640_reinit_one,
  226. #endif
  227. };
  228. module_pci_driver(cmd640_pci_driver);
  229. MODULE_AUTHOR("Alan Cox");
  230. MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
  231. MODULE_LICENSE("GPL");
  232. MODULE_DEVICE_TABLE(pci, cmd640);
  233. MODULE_VERSION(DRV_VERSION);