ahci_mvebu.c 6.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261
  1. /*
  2. * AHCI glue platform driver for Marvell EBU SOCs
  3. *
  4. * Copyright (C) 2014 Marvell
  5. *
  6. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  7. * Marcin Wojtas <mw@semihalf.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #include <linux/ahci_platform.h>
  14. #include <linux/kernel.h>
  15. #include <linux/mbus.h>
  16. #include <linux/module.h>
  17. #include <linux/of_device.h>
  18. #include <linux/platform_device.h>
  19. #include "ahci.h"
  20. #define DRV_NAME "ahci-mvebu"
  21. #define AHCI_VENDOR_SPECIFIC_0_ADDR 0xa0
  22. #define AHCI_VENDOR_SPECIFIC_0_DATA 0xa4
  23. #define AHCI_WINDOW_CTRL(win) (0x60 + ((win) << 4))
  24. #define AHCI_WINDOW_BASE(win) (0x64 + ((win) << 4))
  25. #define AHCI_WINDOW_SIZE(win) (0x68 + ((win) << 4))
  26. struct ahci_mvebu_plat_data {
  27. int (*plat_config)(struct ahci_host_priv *hpriv);
  28. unsigned int flags;
  29. };
  30. static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
  31. const struct mbus_dram_target_info *dram)
  32. {
  33. int i;
  34. for (i = 0; i < 4; i++) {
  35. writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i));
  36. writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i));
  37. writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i));
  38. }
  39. for (i = 0; i < dram->num_cs; i++) {
  40. const struct mbus_dram_window *cs = dram->cs + i;
  41. writel((cs->mbus_attr << 8) |
  42. (dram->mbus_dram_target_id << 4) | 1,
  43. hpriv->mmio + AHCI_WINDOW_CTRL(i));
  44. writel(cs->base >> 16, hpriv->mmio + AHCI_WINDOW_BASE(i));
  45. writel(((cs->size - 1) & 0xffff0000),
  46. hpriv->mmio + AHCI_WINDOW_SIZE(i));
  47. }
  48. }
  49. static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv)
  50. {
  51. /*
  52. * Enable the regret bit to allow the SATA unit to regret a
  53. * request that didn't receive an acknowlegde and avoid a
  54. * deadlock
  55. */
  56. writel(0x4, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR);
  57. writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
  58. }
  59. static int ahci_mvebu_armada_380_config(struct ahci_host_priv *hpriv)
  60. {
  61. const struct mbus_dram_target_info *dram;
  62. int rc = 0;
  63. dram = mv_mbus_dram_info();
  64. if (dram)
  65. ahci_mvebu_mbus_config(hpriv, dram);
  66. else
  67. rc = -ENODEV;
  68. ahci_mvebu_regret_option(hpriv);
  69. return rc;
  70. }
  71. static int ahci_mvebu_armada_3700_config(struct ahci_host_priv *hpriv)
  72. {
  73. u32 reg;
  74. writel(0, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR);
  75. reg = readl(hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
  76. reg |= BIT(6);
  77. writel(reg, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
  78. return 0;
  79. }
  80. /**
  81. * ahci_mvebu_stop_engine
  82. *
  83. * @ap: Target ata port
  84. *
  85. * Errata Ref#226 - SATA Disk HOT swap issue when connected through
  86. * Port Multiplier in FIS-based Switching mode.
  87. *
  88. * To avoid the issue, according to design, the bits[11:8, 0] of
  89. * register PxFBS are cleared when Port Command and Status (0x18) bit[0]
  90. * changes its value from 1 to 0, i.e. falling edge of Port
  91. * Command and Status bit[0] sends PULSE that resets PxFBS
  92. * bits[11:8; 0].
  93. *
  94. * This function is used to override function of "ahci_stop_engine"
  95. * from libahci.c by adding the mvebu work around(WA) to save PxFBS
  96. * value before the PxCMD ST write of 0, then restore PxFBS value.
  97. *
  98. * Return: 0 on success; Error code otherwise.
  99. */
  100. static int ahci_mvebu_stop_engine(struct ata_port *ap)
  101. {
  102. void __iomem *port_mmio = ahci_port_base(ap);
  103. u32 tmp, port_fbs;
  104. tmp = readl(port_mmio + PORT_CMD);
  105. /* check if the HBA is idle */
  106. if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0)
  107. return 0;
  108. /* save the port PxFBS register for later restore */
  109. port_fbs = readl(port_mmio + PORT_FBS);
  110. /* setting HBA to idle */
  111. tmp &= ~PORT_CMD_START;
  112. writel(tmp, port_mmio + PORT_CMD);
  113. /*
  114. * bit #15 PxCMD signal doesn't clear PxFBS,
  115. * restore the PxFBS register right after clearing the PxCMD ST,
  116. * no need to wait for the PxCMD bit #15.
  117. */
  118. writel(port_fbs, port_mmio + PORT_FBS);
  119. /* wait for engine to stop. This could be as long as 500 msec */
  120. tmp = ata_wait_register(ap, port_mmio + PORT_CMD,
  121. PORT_CMD_LIST_ON, PORT_CMD_LIST_ON, 1, 500);
  122. if (tmp & PORT_CMD_LIST_ON)
  123. return -EIO;
  124. return 0;
  125. }
  126. #ifdef CONFIG_PM_SLEEP
  127. static int ahci_mvebu_suspend(struct platform_device *pdev, pm_message_t state)
  128. {
  129. return ahci_platform_suspend_host(&pdev->dev);
  130. }
  131. static int ahci_mvebu_resume(struct platform_device *pdev)
  132. {
  133. struct ata_host *host = platform_get_drvdata(pdev);
  134. struct ahci_host_priv *hpriv = host->private_data;
  135. const struct ahci_mvebu_plat_data *pdata = hpriv->plat_data;
  136. pdata->plat_config(hpriv);
  137. return ahci_platform_resume_host(&pdev->dev);
  138. }
  139. #else
  140. #define ahci_mvebu_suspend NULL
  141. #define ahci_mvebu_resume NULL
  142. #endif
  143. static const struct ata_port_info ahci_mvebu_port_info = {
  144. .flags = AHCI_FLAG_COMMON,
  145. .pio_mask = ATA_PIO4,
  146. .udma_mask = ATA_UDMA6,
  147. .port_ops = &ahci_platform_ops,
  148. };
  149. static struct scsi_host_template ahci_platform_sht = {
  150. AHCI_SHT(DRV_NAME),
  151. };
  152. static int ahci_mvebu_probe(struct platform_device *pdev)
  153. {
  154. const struct ahci_mvebu_plat_data *pdata;
  155. struct ahci_host_priv *hpriv;
  156. int rc;
  157. pdata = of_device_get_match_data(&pdev->dev);
  158. if (!pdata)
  159. return -EINVAL;
  160. hpriv = ahci_platform_get_resources(pdev, 0);
  161. if (IS_ERR(hpriv))
  162. return PTR_ERR(hpriv);
  163. hpriv->flags |= pdata->flags;
  164. hpriv->plat_data = (void *)pdata;
  165. rc = ahci_platform_enable_resources(hpriv);
  166. if (rc)
  167. return rc;
  168. hpriv->stop_engine = ahci_mvebu_stop_engine;
  169. rc = pdata->plat_config(hpriv);
  170. if (rc)
  171. goto disable_resources;
  172. rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
  173. &ahci_platform_sht);
  174. if (rc)
  175. goto disable_resources;
  176. return 0;
  177. disable_resources:
  178. ahci_platform_disable_resources(hpriv);
  179. return rc;
  180. }
  181. static const struct ahci_mvebu_plat_data ahci_mvebu_armada_380_plat_data = {
  182. .plat_config = ahci_mvebu_armada_380_config,
  183. };
  184. static const struct ahci_mvebu_plat_data ahci_mvebu_armada_3700_plat_data = {
  185. .plat_config = ahci_mvebu_armada_3700_config,
  186. .flags = AHCI_HFLAG_SUSPEND_PHYS | AHCI_HFLAG_IGN_NOTSUPP_POWER_ON,
  187. };
  188. static const struct of_device_id ahci_mvebu_of_match[] = {
  189. {
  190. .compatible = "marvell,armada-380-ahci",
  191. .data = &ahci_mvebu_armada_380_plat_data,
  192. },
  193. {
  194. .compatible = "marvell,armada-3700-ahci",
  195. .data = &ahci_mvebu_armada_3700_plat_data,
  196. },
  197. { },
  198. };
  199. MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
  200. static struct platform_driver ahci_mvebu_driver = {
  201. .probe = ahci_mvebu_probe,
  202. .remove = ata_platform_remove_one,
  203. .suspend = ahci_mvebu_suspend,
  204. .resume = ahci_mvebu_resume,
  205. .driver = {
  206. .name = DRV_NAME,
  207. .of_match_table = ahci_mvebu_of_match,
  208. },
  209. };
  210. module_platform_driver(ahci_mvebu_driver);
  211. MODULE_DESCRIPTION("Marvell EBU AHCI SATA driver");
  212. MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>, Marcin Wojtas <mw@semihalf.com>");
  213. MODULE_LICENSE("GPL");
  214. MODULE_ALIAS("platform:ahci_mvebu");