smp.c 7.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * SMP initialisation and IPI support
  4. * Based on arch/arm64/kernel/smp.c
  5. *
  6. * Copyright (C) 2012 ARM Ltd.
  7. * Copyright (C) 2015 Regents of the University of California
  8. * Copyright (C) 2017 SiFive
  9. */
  10. #include <linux/cpu.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/module.h>
  13. #include <linux/kexec.h>
  14. #include <linux/profile.h>
  15. #include <linux/smp.h>
  16. #include <linux/sched.h>
  17. #include <linux/seq_file.h>
  18. #include <linux/delay.h>
  19. #include <linux/irq_work.h>
  20. #include <asm/sbi.h>
  21. #include <asm/tlbflush.h>
  22. #include <asm/cacheflush.h>
  23. enum ipi_message_type {
  24. IPI_RESCHEDULE,
  25. IPI_CALL_FUNC,
  26. IPI_CPU_STOP,
  27. IPI_CPU_CRASH_STOP,
  28. IPI_IRQ_WORK,
  29. IPI_MAX
  30. };
  31. unsigned long __cpuid_to_hartid_map[NR_CPUS] = {
  32. [0 ... NR_CPUS-1] = INVALID_HARTID
  33. };
  34. void __init smp_setup_processor_id(void)
  35. {
  36. cpuid_to_hartid_map(0) = boot_cpu_hartid;
  37. }
  38. /* A collection of single bit ipi messages. */
  39. static struct {
  40. unsigned long stats[IPI_MAX] ____cacheline_aligned;
  41. unsigned long bits ____cacheline_aligned;
  42. } ipi_data[NR_CPUS] __cacheline_aligned;
  43. int riscv_hartid_to_cpuid(int hartid)
  44. {
  45. int i;
  46. for (i = 0; i < NR_CPUS; i++)
  47. if (cpuid_to_hartid_map(i) == hartid)
  48. return i;
  49. pr_err("Couldn't find cpu id for hartid [%d]\n", hartid);
  50. return -ENOENT;
  51. }
  52. void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out)
  53. {
  54. int cpu;
  55. cpumask_clear(out);
  56. for_each_cpu(cpu, in)
  57. cpumask_set_cpu(cpuid_to_hartid_map(cpu), out);
  58. }
  59. EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask);
  60. bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
  61. {
  62. return phys_id == cpuid_to_hartid_map(cpu);
  63. }
  64. /* Unsupported */
  65. int setup_profiling_timer(unsigned int multiplier)
  66. {
  67. return -EINVAL;
  68. }
  69. static void ipi_stop(void)
  70. {
  71. set_cpu_online(smp_processor_id(), false);
  72. while (1)
  73. wait_for_interrupt();
  74. }
  75. #ifdef CONFIG_KEXEC_CORE
  76. static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
  77. static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
  78. {
  79. crash_save_cpu(regs, cpu);
  80. atomic_dec(&waiting_for_crash_ipi);
  81. local_irq_disable();
  82. while(1)
  83. wait_for_interrupt();
  84. }
  85. #endif
  86. static struct riscv_ipi_ops *ipi_ops;
  87. void riscv_set_ipi_ops(struct riscv_ipi_ops *ops)
  88. {
  89. ipi_ops = ops;
  90. }
  91. EXPORT_SYMBOL_GPL(riscv_set_ipi_ops);
  92. void riscv_clear_ipi(void)
  93. {
  94. if (ipi_ops && ipi_ops->ipi_clear)
  95. ipi_ops->ipi_clear();
  96. csr_clear(CSR_IP, IE_SIE);
  97. }
  98. EXPORT_SYMBOL_GPL(riscv_clear_ipi);
  99. static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
  100. {
  101. int cpu;
  102. smp_mb__before_atomic();
  103. for_each_cpu(cpu, mask)
  104. set_bit(op, &ipi_data[cpu].bits);
  105. smp_mb__after_atomic();
  106. if (ipi_ops && ipi_ops->ipi_inject)
  107. ipi_ops->ipi_inject(mask);
  108. else
  109. pr_warn("SMP: IPI inject method not available\n");
  110. }
  111. static void send_ipi_single(int cpu, enum ipi_message_type op)
  112. {
  113. smp_mb__before_atomic();
  114. set_bit(op, &ipi_data[cpu].bits);
  115. smp_mb__after_atomic();
  116. if (ipi_ops && ipi_ops->ipi_inject)
  117. ipi_ops->ipi_inject(cpumask_of(cpu));
  118. else
  119. pr_warn("SMP: IPI inject method not available\n");
  120. }
  121. #ifdef CONFIG_IRQ_WORK
  122. void arch_irq_work_raise(void)
  123. {
  124. send_ipi_single(smp_processor_id(), IPI_IRQ_WORK);
  125. }
  126. #endif
  127. void handle_IPI(struct pt_regs *regs)
  128. {
  129. unsigned int cpu = smp_processor_id();
  130. struct pt_regs *old_regs = set_irq_regs(regs);
  131. unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
  132. unsigned long *stats = ipi_data[smp_processor_id()].stats;
  133. irq_enter();
  134. riscv_clear_ipi();
  135. while (true) {
  136. unsigned long ops;
  137. /* Order bit clearing and data access. */
  138. mb();
  139. ops = xchg(pending_ipis, 0);
  140. if (ops == 0)
  141. goto done;
  142. if (ops & (1 << IPI_RESCHEDULE)) {
  143. stats[IPI_RESCHEDULE]++;
  144. scheduler_ipi();
  145. }
  146. if (ops & (1 << IPI_CALL_FUNC)) {
  147. stats[IPI_CALL_FUNC]++;
  148. generic_smp_call_function_interrupt();
  149. }
  150. if (ops & (1 << IPI_CPU_STOP)) {
  151. stats[IPI_CPU_STOP]++;
  152. ipi_stop();
  153. }
  154. if (ops & (1 << IPI_CPU_CRASH_STOP)) {
  155. #ifdef CONFIG_KEXEC_CORE
  156. ipi_cpu_crash_stop(cpu, get_irq_regs());
  157. #endif
  158. unreachable();
  159. }
  160. if (ops & (1 << IPI_IRQ_WORK)) {
  161. stats[IPI_IRQ_WORK]++;
  162. irq_work_run();
  163. }
  164. BUG_ON((ops >> IPI_MAX) != 0);
  165. /* Order data access and bit testing. */
  166. mb();
  167. }
  168. done:
  169. irq_exit();
  170. set_irq_regs(old_regs);
  171. }
  172. static const char * const ipi_names[] = {
  173. [IPI_RESCHEDULE] = "Rescheduling interrupts",
  174. [IPI_CALL_FUNC] = "Function call interrupts",
  175. [IPI_CPU_STOP] = "CPU stop interrupts",
  176. [IPI_CPU_CRASH_STOP] = "CPU stop (for crash dump) interrupts",
  177. [IPI_IRQ_WORK] = "IRQ work interrupts",
  178. };
  179. void show_ipi_stats(struct seq_file *p, int prec)
  180. {
  181. unsigned int cpu, i;
  182. for (i = 0; i < IPI_MAX; i++) {
  183. seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
  184. prec >= 4 ? " " : "");
  185. for_each_online_cpu(cpu)
  186. seq_printf(p, "%10lu ", ipi_data[cpu].stats[i]);
  187. seq_printf(p, " %s\n", ipi_names[i]);
  188. }
  189. }
  190. void arch_send_call_function_ipi_mask(struct cpumask *mask)
  191. {
  192. send_ipi_mask(mask, IPI_CALL_FUNC);
  193. }
  194. void arch_send_call_function_single_ipi(int cpu)
  195. {
  196. send_ipi_single(cpu, IPI_CALL_FUNC);
  197. }
  198. void smp_send_stop(void)
  199. {
  200. unsigned long timeout;
  201. if (num_online_cpus() > 1) {
  202. cpumask_t mask;
  203. cpumask_copy(&mask, cpu_online_mask);
  204. cpumask_clear_cpu(smp_processor_id(), &mask);
  205. if (system_state <= SYSTEM_RUNNING)
  206. pr_crit("SMP: stopping secondary CPUs\n");
  207. send_ipi_mask(&mask, IPI_CPU_STOP);
  208. }
  209. /* Wait up to one second for other CPUs to stop */
  210. timeout = USEC_PER_SEC;
  211. while (num_online_cpus() > 1 && timeout--)
  212. udelay(1);
  213. if (num_online_cpus() > 1)
  214. pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
  215. cpumask_pr_args(cpu_online_mask));
  216. }
  217. #ifdef CONFIG_KEXEC_CORE
  218. /*
  219. * The number of CPUs online, not counting this CPU (which may not be
  220. * fully online and so not counted in num_online_cpus()).
  221. */
  222. static inline unsigned int num_other_online_cpus(void)
  223. {
  224. unsigned int this_cpu_online = cpu_online(smp_processor_id());
  225. return num_online_cpus() - this_cpu_online;
  226. }
  227. void crash_smp_send_stop(void)
  228. {
  229. static int cpus_stopped;
  230. cpumask_t mask;
  231. unsigned long timeout;
  232. /*
  233. * This function can be called twice in panic path, but obviously
  234. * we execute this only once.
  235. */
  236. if (cpus_stopped)
  237. return;
  238. cpus_stopped = 1;
  239. /*
  240. * If this cpu is the only one alive at this point in time, online or
  241. * not, there are no stop messages to be sent around, so just back out.
  242. */
  243. if (num_other_online_cpus() == 0)
  244. return;
  245. cpumask_copy(&mask, cpu_online_mask);
  246. cpumask_clear_cpu(smp_processor_id(), &mask);
  247. atomic_set(&waiting_for_crash_ipi, num_other_online_cpus());
  248. pr_crit("SMP: stopping secondary CPUs\n");
  249. send_ipi_mask(&mask, IPI_CPU_CRASH_STOP);
  250. /* Wait up to ten seconds for other CPUs to stop */
  251. timeout = USEC_PER_SEC * 10;
  252. while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
  253. udelay(1);
  254. if (atomic_read(&waiting_for_crash_ipi) > 0)
  255. pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
  256. cpumask_pr_args(&mask));
  257. }
  258. bool smp_crash_stop_failed(void)
  259. {
  260. return (atomic_read(&waiting_for_crash_ipi) > 0);
  261. }
  262. #endif
  263. void smp_send_reschedule(int cpu)
  264. {
  265. send_ipi_single(cpu, IPI_RESCHEDULE);
  266. }
  267. EXPORT_SYMBOL_GPL(smp_send_reschedule);