light-fm-emu.dts 7.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2021 Alibaba Group Holding Limited.
  4. */
  5. /dts-v1/;
  6. #include "light-emu.dtsi"
  7. / {
  8. model = "T-HEAD Light FM EMU FPGA board";
  9. compatible = "thead,light-fm-emu", "thead,light";
  10. chosen {
  11. bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon sram=0xffe0000000,0x180000";
  12. linux,initrd-start = <0x0 0x2000000>;
  13. linux,initrd-end = <0x0 0x4600000>;
  14. stdout-path = "serial0:115200n8";
  15. };
  16. keys {
  17. compatible = "gpio-keys";
  18. key0 {
  19. label = "key0";
  20. gpios = <&gpio1_porta 7 1>; /* GPIO_ACTIVE_LOW: 1 */
  21. linux,code = <59>; /* KEY_F1: 59 */
  22. status = "okay";
  23. };
  24. };
  25. leds {
  26. compatible = "gpio-leds";
  27. led0 {
  28. label = "led0";
  29. gpios = <&gpio1_porta 8 0>; /* GPIO_ACTIVE_HIGH: 0 */
  30. default-state = "off";
  31. };
  32. };
  33. iopmp {
  34. compatible = "thead,light-iopmp";
  35. /* config#1: multiple valid regions */
  36. iopmp_emmc: IOPMP_EMMC {
  37. regions = <0x000000 0x100000>,
  38. <0x100000 0x200000>;
  39. attr = <0xFFFFFFFF>;
  40. dummy_slave= <0x800000>;
  41. };
  42. /* config#2: iopmp bypass */
  43. iopmp_sdio0: IOPMP_SDIO0 {
  44. bypass_en;
  45. };
  46. /* config#3: iopmp default region set */
  47. iopmp_sdio1: IOPMP_SDIO1 {
  48. attr = <0xFFFFFFFF>;
  49. is_default_region;
  50. };
  51. iopmp_usb0: IOPMP_USB0 {
  52. attr = <0xFFFFFFFF>;
  53. is_default_region;
  54. };
  55. iopmp_ao: IOPMP_AO {
  56. is_default_region;
  57. };
  58. iopmp_aud: IOPMP_AUD {
  59. is_default_region;
  60. };
  61. iopmp_chip_dbg: IOPMP_CHIP_DBG {
  62. is_default_region;
  63. };
  64. iopmp_eip120i: IOPMP_EIP120I {
  65. is_default_region;
  66. };
  67. iopmp_eip120ii: IOPMP_EIP120II {
  68. is_default_region;
  69. };
  70. iopmp_eip120iii: IOPMP_EIP120III {
  71. is_default_region;
  72. };
  73. iopmp_isp0: IOPMP_ISP0 {
  74. is_default_region;
  75. };
  76. iopmp_isp1: IOPMP_ISP1 {
  77. is_default_region;
  78. };
  79. iopmp_dsp: IOPMP_DSP {
  80. is_default_region;
  81. };
  82. iopmp_dw200: IOPMP_DW200 {
  83. is_default_region;
  84. };
  85. iopmp_venc: IOPMP_VENC {
  86. is_default_region;
  87. };
  88. iopmp_vdec: IOPMP_VDEC {
  89. is_default_region;
  90. };
  91. iopmp_g2d: IOPMP_G2D {
  92. is_default_region;
  93. };
  94. iopmp_fce: IOPMP_FCE {
  95. is_default_region;
  96. };
  97. iopmp_npu: IOPMP_NPU {
  98. is_default_region;
  99. };
  100. iopmp0_dpu: IOPMP0_DPU {
  101. bypass_en;
  102. };
  103. iopmp1_dpu: IOPMP1_DPU {
  104. bypass_en;
  105. };
  106. iopmp_gpu: IOPMP_GPU {
  107. is_default_region;
  108. };
  109. iopmp_gmac1: IOPMP_GMAC1 {
  110. is_default_region;
  111. };
  112. iopmp_gmac2: IOPMP_GMAC2 {
  113. is_default_region;
  114. };
  115. iopmp_dmac: IOPMP_DMAC {
  116. is_default_region;
  117. };
  118. iopmp_tee_dmac: IOPMP_TEE_DMAC {
  119. is_default_region;
  120. };
  121. };
  122. mbox_910t_client1: mbox_910t_client1 {
  123. compatible = "thead,light-mbox-client";
  124. mbox-names = "902";
  125. mboxes = <&mbox_910t 1 0>;
  126. status = "disabled";
  127. };
  128. mbox_910t_client2: mbox_910t_client2 {
  129. compatible = "thead,light-mbox-client";
  130. mbox-names = "906";
  131. mboxes = <&mbox_910t 2 0>;
  132. status = "disabled";
  133. };
  134. lightsound: lightsound@1 {
  135. compatible = "simple-audio-card";
  136. simple-audio-card,name = "Light-Sound-Card";
  137. #address-cells = <1>;
  138. #size-cells = <0>;
  139. status = "disabled";
  140. simple-audio-card,dai-link@0 { /* I2S - CODEC */
  141. reg = <0>;
  142. format = "i2s";
  143. cpu {
  144. sound-dai = <&light_i2s 0>;
  145. };
  146. codec {
  147. sound-dai = <&dummy_codec 2>;
  148. };
  149. };
  150. simple-audio-card,dai-link@1 { /* I2S - HDMI */
  151. reg = <1>;
  152. format = "i2s";
  153. cpu {
  154. sound-dai = <&light_i2s 1>;
  155. };
  156. codec {
  157. sound-dai = <&dummy_codec 2>;
  158. };
  159. };
  160. };
  161. dummy_codec: dummy_codec {
  162. #sound-dai-cells = <1>;
  163. compatible = "linux,bt-sco";
  164. status = "okay";
  165. };
  166. };
  167. &i2c0 {
  168. clock-frequency = <100000>;
  169. status = "okay";
  170. eeprom@50 {
  171. compatible = "atmel,24c32";
  172. reg = <0x50>;
  173. pagesize = <32>;
  174. };
  175. };
  176. &spi0 {
  177. num-cs = <2>;
  178. cs-gpios = <&gpio2_porta 15 0>, // GPIO_ACTIVE_HIGH: 0
  179. <&gpio2_porta 23 0>; // GPIO_ACTIVE_LOW: 1
  180. status = "okay";
  181. spi_norflash@0 {
  182. #address-cells = <1>;
  183. #size-cells = <1>;
  184. compatible = "winbond,w25q64", "jedec,spi-nor";
  185. reg = <0>;
  186. spi-max-frequency = <8000000>;
  187. w25q,fast-read;
  188. };
  189. spidev@1 {
  190. compatible = "spidev";
  191. #address-cells = <1>;
  192. #size-cells = <1>;
  193. reg = <1>;
  194. spi-max-frequency = <12500000>;
  195. };
  196. };
  197. &uart0 {
  198. clock-frequency = <50000000>;
  199. };
  200. &qspi0 {
  201. num-cs = <2>;
  202. cs-gpios = <&gpio2_porta 3 0>, // GPIO_ACTIVE_HIGH: 0
  203. <&gpio2_porta 26 0>;
  204. status = "okay";
  205. spi-flash@0 {
  206. #address-cells = <1>;
  207. #size-cells = <1>;
  208. compatible = "spi-nand";
  209. spi-max-frequency = <10000000>;
  210. spi-tx-bus-width = <4>;
  211. spi-rx-bus-width = <4>;
  212. reg = <0>;
  213. partition@0 {
  214. label = "ubi1";
  215. reg = <0x00000000 0x08000000>;
  216. };
  217. };
  218. spidev@1 {
  219. compatible = "spidev";
  220. #address-cells = <1>;
  221. #size-cells = <1>;
  222. reg = <1>;
  223. spi-max-frequency = <6250000>;
  224. };
  225. };
  226. &gmac0 {
  227. max-speed = <100>;
  228. phy-mode = "mii";
  229. phy-handle = <&phy_88E1111_0>;
  230. status = "okay";
  231. mdio0 {
  232. #address-cells = <1>;
  233. #size-cells = <0>;
  234. compatible = "snps,dwmac-mdio";
  235. phy_88E1111_0: ethernet-phy@0 {
  236. reg = <0x0 0x0>;
  237. };
  238. };
  239. };
  240. &gmac1 {
  241. max-speed = <100>;
  242. phy-mode = "mii";
  243. phy-handle = <&phy_88E1111_1>;
  244. status = "disabled";
  245. mdio0 {
  246. #address-cells = <1>;
  247. #size-cells = <0>;
  248. compatible = "snps,dwmac-mdio";
  249. phy_88E1111_1: ethernet-phy@0 {
  250. reg = <0x0 0x0>;
  251. };
  252. };
  253. };
  254. &emmc {
  255. max-frequency = <50000000>;
  256. non-removable;
  257. no-sdio;
  258. no-sd;
  259. bus-width = <8>;
  260. status = "okay";
  261. };
  262. &sdhci0 {
  263. max-frequency = <50000000>;
  264. no-1-8-v;
  265. bus-width = <4>;
  266. status = "okay";
  267. };
  268. &padctrl0_apsys {
  269. light-fm-evb {
  270. /*
  271. * Pin Configuration Node:
  272. * Format: <pin_id mux_node config>
  273. */
  274. pinctrl_uart0: uart0grp {
  275. thead,pins = <
  276. FM_UART0_TXD 0x0 0x72
  277. FM_UART0_RXD 0x0 0x72
  278. >;
  279. };
  280. pinctrl_spi0: spi0grp {
  281. thead,pins = <
  282. FM_SPI_CSN 0x0 0x72
  283. >;
  284. };
  285. pinctrl_qspi0: qspi0grp {
  286. thead,pins = <
  287. FM_QSPI0_CSN0 0x0 0x72
  288. >;
  289. };
  290. };
  291. };
  292. &padctrl1_apsys {
  293. light-fm-evb {
  294. /*
  295. * Pin Configuration Node:
  296. * Format: <pin_id mux_node config>
  297. */
  298. pinctrl_uart3: uart3grp {
  299. thead,pins = <
  300. FM_UART3_TXD 0x0 0x72
  301. FM_UART3_RXD 0x0 0x72
  302. >;
  303. };
  304. pinctrl_uart4: uart4grp {
  305. thead,pins = <
  306. FM_UART4_TXD 0x0 0x72
  307. FM_UART4_RXD 0x0 0x72
  308. FM_UART4_CTSN 0x0 0x72
  309. FM_UART4_RTSN 0x0 0x72
  310. >;
  311. };
  312. };
  313. };
  314. &padctrl_aosys {
  315. light-fm-evb {
  316. /*
  317. * Pin Configuration Node:
  318. * Format: <pin_id mux_node config>
  319. */
  320. pinctrl_audiopa1: audiopa1_grp {
  321. thead,pins = <
  322. FM_AUDIO_PA1 0x3 0x72
  323. >;
  324. };
  325. pinctrl_audiopa2: audiopa2_grp {
  326. thead,pins = <
  327. FM_AUDIO_PA2 0x0 0x72
  328. >;
  329. };
  330. };
  331. };
  332. &i2c2 {
  333. status = "okay";
  334. };
  335. &isp0 {
  336. status = "okay";
  337. };
  338. &isp1 {
  339. status = "okay";
  340. };
  341. &isp_ry0 {
  342. status = "okay";
  343. };
  344. &dewarp {
  345. status = "okay";
  346. };
  347. &dec400_isp0 {
  348. status = "okay";
  349. };
  350. &dec400_isp1 {
  351. status = "okay";
  352. };
  353. &dec400_isp2 {
  354. status = "okay";
  355. };
  356. &bm_visys {
  357. status = "okay";
  358. };
  359. &bm_csi0 {
  360. status = "okay";
  361. };
  362. &vi_pre {
  363. status = "okay";
  364. };
  365. &vvcam_sensor0 {
  366. sensor_name = "OV5693";
  367. status = "okay";
  368. };
  369. &video{
  370. status = "okay";
  371. piplane0 {
  372. pipline_id = <0>;
  373. status = "okay";
  374. sensor0 {
  375. subdev_name = "vivcam";
  376. idx = <0>;
  377. csi_idx = <0>;
  378. path_type = "SENSOR_VGA_RAW10_LINER";
  379. };
  380. /*
  381. csi0 {
  382. subdev_name = "bm_csi";
  383. idx = <0>;
  384. };
  385. */
  386. dma {
  387. subdev_name = "vipre";
  388. idx = <0>;
  389. path_type = "VIPRE_CSI0_ISP0";
  390. };
  391. isp {
  392. subdev_name = "isp";
  393. idx = <0>;
  394. path_type = "ISP_MI_PATH_PP";
  395. };
  396. dsp {
  397. subdev_name = "dsp";
  398. idx = <0>;
  399. path_type = "DSP_PATH_ISP_RY";
  400. };
  401. ry {
  402. subdev_name = "ry";
  403. idx = <0>;
  404. path_type = "ISP_RY_MI_PATH_MP";
  405. };
  406. dw {
  407. subdev_name = "dw";
  408. idx = <0>;
  409. path_type = "DW_PATH_MEM_DW_SC_MEM";
  410. };
  411. };
  412. };
  413. &vdec {
  414. status = "okay";
  415. };
  416. &venc {
  417. status = "okay";
  418. };
  419. &isp_venc_shake {
  420. status = "okay";
  421. };
  422. &vidmem {
  423. status = "okay";
  424. };