light-b-product.dts 48 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2021 Alibaba Group Holding Limited.
  4. */
  5. /dts-v1/;
  6. #include "light.dtsi"
  7. #include <dt-bindings/input/linux-event-codes.h>
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include "light-vi-devices.dtsi"
  10. / {
  11. model = "T-HEAD Light val board";
  12. compatible = "thead,light-val", "thead,light";
  13. memory@0 {
  14. device_type = "memory";
  15. reg = <0x0 0x00000000 0x0 0x80000000>;
  16. };
  17. chosen {
  18. bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
  19. stdout-path = "serial0:115200n8";
  20. };
  21. leds {
  22. compatible = "gpio-leds";
  23. status = "disabled";
  24. led0 {
  25. label = "SYS_STATUS";
  26. gpios = <&gpio1_porta 15 0>; /* GPIO_ACTIVE_HIGH: 0 */
  27. default-state = "off";
  28. };
  29. };
  30. display-subsystem {
  31. status = "okay";
  32. };
  33. lcd0_backlight: pwm-backlight@0 {
  34. compatible = "pwm-backlight";
  35. pwms = <&pwm 0 5000000>;
  36. brightness-levels = <0 4 8 16 32 64 128 255>;
  37. default-brightness-level = <7>;
  38. };
  39. light_iopmp: iopmp {
  40. compatible = "thead,light-iopmp";
  41. /* config#1: multiple valid regions */
  42. iopmp_emmc: IOPMP_EMMC {
  43. regions = <0x000000 0x100000>,
  44. <0x100000 0x200000>;
  45. attr = <0xFFFFFFFF>;
  46. dummy_slave= <0x800000>;
  47. };
  48. /* config#2: iopmp bypass */
  49. iopmp_sdio0: IOPMP_SDIO0 {
  50. bypass_en;
  51. };
  52. /* config#3: iopmp default region set */
  53. iopmp_sdio1: IOPMP_SDIO1 {
  54. attr = <0xFFFFFFFF>;
  55. is_default_region;
  56. };
  57. iopmp_usb0: IOPMP_USB0 {
  58. attr = <0xFFFFFFFF>;
  59. is_default_region;
  60. };
  61. iopmp_ao: IOPMP_AO {
  62. is_default_region;
  63. };
  64. iopmp_aud: IOPMP_AUD {
  65. is_default_region;
  66. };
  67. iopmp_chip_dbg: IOPMP_CHIP_DBG {
  68. is_default_region;
  69. };
  70. iopmp_eip120i: IOPMP_EIP120I {
  71. is_default_region;
  72. };
  73. iopmp_eip120ii: IOPMP_EIP120II {
  74. is_default_region;
  75. };
  76. iopmp_eip120iii: IOPMP_EIP120III {
  77. is_default_region;
  78. };
  79. iopmp_isp0: IOPMP_ISP0 {
  80. is_default_region;
  81. };
  82. iopmp_isp1: IOPMP_ISP1 {
  83. is_default_region;
  84. };
  85. iopmp_dw200: IOPMP_DW200 {
  86. is_default_region;
  87. };
  88. iopmp_vipre: IOPMP_VIPRE {
  89. is_default_region;
  90. };
  91. iopmp_venc: IOPMP_VENC {
  92. is_default_region;
  93. };
  94. iopmp_vdec: IOPMP_VDEC {
  95. is_default_region;
  96. };
  97. iopmp_g2d: IOPMP_G2D {
  98. is_default_region;
  99. };
  100. iopmp_fce: IOPMP_FCE {
  101. is_default_region;
  102. };
  103. iopmp_npu: IOPMP_NPU {
  104. is_default_region;
  105. };
  106. iopmp0_dpu: IOPMP0_DPU {
  107. bypass_en;
  108. };
  109. iopmp1_dpu: IOPMP1_DPU {
  110. bypass_en;
  111. };
  112. iopmp_gpu: IOPMP_GPU {
  113. is_default_region;
  114. };
  115. iopmp_gmac1: IOPMP_GMAC1 {
  116. is_default_region;
  117. };
  118. iopmp_gmac2: IOPMP_GMAC2 {
  119. is_default_region;
  120. };
  121. iopmp_dmac: IOPMP_DMAC {
  122. is_default_region;
  123. };
  124. iopmp_tee_dmac: IOPMP_TEE_DMAC {
  125. is_default_region;
  126. };
  127. iopmp_dsp0: IOPMP_DSP0 {
  128. is_default_region;
  129. };
  130. iopmp_dsp1: IOPMP_DSP1 {
  131. is_default_region;
  132. };
  133. };
  134. mbox_910t_client1: mbox_910t_client1 {
  135. compatible = "thead,light-mbox-client";
  136. mbox-names = "902";
  137. mboxes = <&mbox_910t 1 0>;
  138. status = "disabled";
  139. };
  140. mbox_910t_client2: mbox_910t_client2 {
  141. compatible = "thead,light-mbox-client";
  142. mbox-names = "906";
  143. mboxes = <&mbox_910t 2 0>;
  144. status = "disabled";
  145. };
  146. lightsound: lightsound@1 {
  147. compatible = "simple-audio-card";
  148. simple-audio-card,name = "Light-Sound-Card";
  149. #address-cells = <1>;
  150. #size-cells = <0>;
  151. status = "disabled";
  152. };
  153. dummy_codec: dummy_codec {
  154. #sound-dai-cells = <1>;
  155. compatible = "linux,bt-sco";
  156. status = "okay";
  157. };
  158. reg_vref_1v8: regulator-adc-verf {
  159. compatible = "regulator-fixed";
  160. regulator-name = "vref-1v8";
  161. regulator-min-microvolt = <1800000>;
  162. regulator-max-microvolt = <1800000>;
  163. status = "okay";
  164. };
  165. reg_tp_pwr_en: regulator-pwr-en {
  166. compatible = "regulator-fixed";
  167. regulator-name = "PWR_EN";
  168. regulator-min-microvolt = <2800000>;
  169. regulator-max-microvolt = <2800000>;
  170. gpio = <&gpio1_porta 12 1>;
  171. enable-active-high;
  172. regulator-always-on;
  173. };
  174. wcn_wifi: wireless-wlan {
  175. compatible = "wlan-platdata";
  176. clock-names = "clk_wifi";
  177. ref-clock-frequency = <24000000>;
  178. keep_wifi_power_on;
  179. pinctrl-names = "default";
  180. wifi_chip_type = "rtl8723ds";
  181. WIFI,poweren_gpio = <&gpio2_porta 29 0>;
  182. WIFI,reset_n = <&gpio2_porta 24 0>;
  183. status = "okay";
  184. };
  185. wcn_bt: wireless-bluetooth {
  186. compatible = "bluetooth-platdata";
  187. pinctrl-names = "default", "rts_gpio";
  188. BT,power_gpio = <&gpio2_porta 25 0>;
  189. status = "okay";
  190. };
  191. gpio-keys {
  192. compatible = "gpio-keys";
  193. pinctrl-0 = <&pinctrl_volume>;
  194. pinctrl-names = "default";
  195. key-volumedown {
  196. label = "Volume Down Key";
  197. linux,code = <KEY_VOLUMEDOWN>;
  198. debounce-interval = <1>;
  199. gpios = <&ao_gpio_porta 11 0x1>;
  200. };
  201. key-volumeup {
  202. label = "Volume Up Key";
  203. linux,code = <KEY_VOLUMEUP>;
  204. debounce-interval = <1>;
  205. gpios = <&ao_gpio_porta 10 0x1>;
  206. };
  207. };
  208. aon: aon@0 {
  209. compatible = "thead,light-aon";
  210. mbox-names = "aon";
  211. mboxes = <&mbox_910t 1 0>;
  212. status = "okay";
  213. pd: light-aon-pd {
  214. compatible = "thead,light-aon-pd";
  215. #power-domain-cells = <1>;
  216. };
  217. soc_aud_3v3_en_reg: soc_aud_3v3_en {
  218. compatible = "regulator-fixed";
  219. regulator-name = "soc_aud_3v3_en";
  220. regulator-min-microvolt = <3300000>;
  221. regulator-max-microvolt = <3300000>;
  222. gpio = <&ao_gpio_porta 7 1>;
  223. enable-active-high;
  224. regulator-always-on;
  225. };
  226. soc_aud_1v8_en_reg: soc_aud_1v8_en {
  227. compatible = "regulator-fixed";
  228. regulator-name = "soc_aud_1v8_en";
  229. regulator-min-microvolt = <1800000>;
  230. regulator-max-microvolt = <1800000>;
  231. gpio = <&ao_gpio_porta 8 1>;
  232. enable-active-high;
  233. regulator-always-on;
  234. };
  235. soc_vdd_3v3_en_reg: soc_vdd_3v3_en {
  236. compatible = "regulator-fixed";
  237. regulator-name = "soc_vdd_3v3_en";
  238. regulator-min-microvolt = <3300000>;
  239. regulator-max-microvolt = <3300000>;
  240. gpio = <&gpio0_porta 30 1>;
  241. enable-active-high;
  242. regulator-always-on;
  243. };
  244. soc_lcd0_bias_en_reg: soc_lcd0_bias_en {
  245. compatible = "regulator-fixed";
  246. regulator-name = "soc_lcd0_bias_en";
  247. regulator-min-microvolt = <5700000>;
  248. regulator-max-microvolt = <5700000>;
  249. gpio = <&gpio1_porta 10 1>;
  250. enable-active-high;
  251. };
  252. soc_vdd5v_se_en_reg: soc_vdd5v_se_en {
  253. compatible = "regulator-fixed";
  254. regulator-name = "soc_vdd5v_se_en";
  255. regulator-min-microvolt = <5000000>;
  256. regulator-max-microvolt = <5000000>;
  257. gpio = <&gpio2_porta 14 1>;
  258. enable-active-high;
  259. regulator-always-on;
  260. };
  261. soc_wcn33_en_reg: soc_wcn33_en {
  262. compatible = "regulator-fixed";
  263. regulator-name = "soc_wcn33_en";
  264. regulator-min-microvolt = <3300000>;
  265. regulator-max-microvolt = <3300000>;
  266. gpio = <&gpio2_porta 29 1>;
  267. enable-active-high;
  268. regulator-always-on;
  269. };
  270. soc_vbus_en_reg: soc_vbus_en {
  271. compatible = "regulator-fixed";
  272. regulator-name = "soc_vbus_en";
  273. regulator-min-microvolt = <3300000>;
  274. regulator-max-microvolt = <3300000>;
  275. gpio = <&gpio2_porta 28 1>;
  276. enable-active-high;
  277. regulator-always-on;
  278. };
  279. soc_dovdd18_scan_reg: soc_dovdd18_scan {
  280. compatible = "regulator-fixed";
  281. regulator-name = "soc_dovdd18_scan";
  282. regulator-min-microvolt = <1800000>;
  283. regulator-max-microvolt = <1800000>;
  284. gpio = <&gpio2_porta 31 1>;
  285. enable-active-high;
  286. };
  287. soc_dvdd12_scan_reg: soc_dvdd12_scan {
  288. compatible = "regulator-fixed";
  289. regulator-name = "soc_dvdd12_scan";
  290. regulator-min-microvolt = <1200000>;
  291. regulator-max-microvolt = <1200000>;
  292. gpio = <&gpio3_porta 0 1>;
  293. enable-active-high;
  294. };
  295. soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
  296. compatible = "regulator-fixed";
  297. regulator-name = "soc_avdd28_scan_en";
  298. regulator-min-microvolt = <2800000>;
  299. regulator-max-microvolt = <2800000>;
  300. gpio = <&gpio2_porta 30 1>;
  301. enable-active-high;
  302. };
  303. soc_avdd28_rgb_reg: soc_avdd28_rgb {
  304. compatible = "regulator-fixed";
  305. regulator-name = "soc_avdd28_rgb";
  306. regulator-min-microvolt = <2800000>;
  307. regulator-max-microvolt = <2800000>;
  308. gpio = <&gpio1_porta 15 1>;
  309. enable-active-high;
  310. };
  311. soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
  312. compatible = "regulator-fixed";
  313. regulator-name = "soc_dovdd18_rgb";
  314. regulator-min-microvolt = <2800000>;
  315. regulator-max-microvolt = <2800000>;
  316. gpio = <&gpio1_porta 13 1>;
  317. enable-active-high;
  318. };
  319. soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
  320. compatible = "regulator-fixed";
  321. regulator-name = "soc_dvdd12_rgb";
  322. regulator-min-microvolt = <2800000>;
  323. regulator-max-microvolt = <2800000>;
  324. gpio = <&gpio1_porta 14 1>;
  325. enable-active-high;
  326. };
  327. soc_avdd25_ir_reg: soc_avdd25_ir {
  328. compatible = "regulator-fixed";
  329. regulator-name = "soc_avdd25_ir";
  330. regulator-min-microvolt = <2500000>;
  331. regulator-max-microvolt = <2500000>;
  332. gpio = <&gpio0_porta 28 1>;
  333. enable-active-high;
  334. };
  335. soc_dovdd18_ir_reg: soc_dovdd18_ir {
  336. compatible = "regulator-fixed";
  337. regulator-name = "soc_dovdd18_ir";
  338. regulator-min-microvolt = <1800000>;
  339. regulator-max-microvolt = <1800000>;
  340. gpio = <&gpio0_porta 27 1>;
  341. enable-active-high;
  342. };
  343. soc_dvdd12_ir_reg: soc_dvdd12_ir {
  344. compatible = "regulator-fixed";
  345. regulator-name = "soc_dvdd12_ir";
  346. regulator-min-microvolt = <1200000>;
  347. regulator-max-microvolt = <1200000>;
  348. gpio = <&gpio0_porta 29 1>;
  349. enable-active-high;
  350. };
  351. aon_reg_ricoh: light-ricoh-reg {
  352. compatible = "thead,light-ricoh-pmic";
  353. status = "okay";
  354. dvdd_cpu_reg: appcpu_dvdd {
  355. regulator-name = "appcpu_dvdd";
  356. regulator-min-microvolt = <600000>;
  357. regulator-max-microvolt = <1500000>;
  358. regulator-boot-on;
  359. regulator-always-on;
  360. };
  361. dvddm_cpu_reg: appcpu_dvddm {
  362. regulator-name = "appcpu_dvddm";
  363. regulator-min-microvolt = <600000>;
  364. regulator-max-microvolt = <1500000>;
  365. regulator-boot-on;
  366. regulator-always-on;
  367. };
  368. soc_dvdd18_aon_reg: soc_dvdd18_aon {
  369. regulator-name = "soc_dvdd18_aon";
  370. regulator-boot-on;
  371. regulator-always-on;
  372. };
  373. soc_avdd33_usb3_reg: soc_avdd33_usb3 {
  374. regulator-name = "soc_avdd33_usb3";
  375. regulator-boot-on;
  376. regulator-always-on;
  377. };
  378. soc_dvdd08_aon_reg: soc_dvdd08_aon {
  379. regulator-name = "soc_dvdd08_aon";
  380. regulator-boot-on;
  381. regulator-always-on;
  382. };
  383. soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
  384. regulator-name = "soc_dvdd08_ddr";
  385. regulator-boot-on;
  386. regulator-always-on;
  387. };
  388. soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
  389. regulator-name = "soc_vdd_ddr_1v8";
  390. regulator-boot-on;
  391. regulator-always-on;
  392. };
  393. soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
  394. regulator-name = "soc_vdd_ddr_1v1";
  395. regulator-boot-on;
  396. regulator-always-on;
  397. };
  398. soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
  399. regulator-name = "soc_vdd_ddr_0v6";
  400. regulator-boot-on;
  401. regulator-always-on;
  402. };
  403. soc_dvdd18_ap_reg: soc_dvdd18_ap {
  404. regulator-name = "soc_dvdd18_ap";
  405. regulator-boot-on;
  406. regulator-always-on;
  407. };
  408. soc_dvdd08_ap_reg: soc_dvdd08_ap {
  409. regulator-name = "soc_dvdd08_ap";
  410. regulator-boot-on;
  411. regulator-always-on;
  412. };
  413. soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
  414. regulator-name = "soc_avdd08_mipi_hdmi";
  415. regulator-boot-on;
  416. regulator-always-on;
  417. };
  418. soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
  419. regulator-name = "soc_avdd18_mipi_hdmi";
  420. regulator-boot-on;
  421. regulator-always-on;
  422. };
  423. soc_vdd33_emmc_reg: soc_vdd33_emmc {
  424. regulator-name = "soc_vdd33_emmc";
  425. regulator-boot-on;
  426. regulator-always-on;
  427. };
  428. soc_vdd18_emmc_reg: soc_vdd18_emmc {
  429. regulator-name = "soc_vdd18_emmc";
  430. regulator-boot-on;
  431. regulator-always-on;
  432. };
  433. soc_vdd18_lcd0_en_reg: soc_lcd0_en {
  434. regulator-name = "soc_lcd0_en";
  435. };
  436. soc_vext_1v8_reg: soc_vext_1v8 {
  437. regulator-name = "soc_vext_1v8";
  438. regulator-boot-on;
  439. regulator-always-on;
  440. };
  441. };
  442. c910_cpufreq {
  443. compatible = "thead,light-mpw-cpufreq";
  444. status = "okay";
  445. };
  446. test: light-aon-test {
  447. compatible = "thead,light-aon-test";
  448. };
  449. };
  450. };
  451. &resmem {
  452. #address-cells = <2>;
  453. #size-cells = <2>;
  454. ranges;
  455. tee_mem: memory@1a000000 {
  456. reg = <0x0 0x1a000000 0 0x4000000>;
  457. no-map;
  458. };
  459. dsp0_mem: memory@20000000 { /**0x2000_0000~0x2040_0000 4M**/
  460. reg = <0x0 0x20000000 0x0 0x00280000 /* DSP FW code&data section 2.5M*/
  461. 0x0 0x20280000 0x0 0x00001000 /* DSP communication area 4K*/
  462. 0x0 0x20281000 0x0 0x00007000 /* Panic/log page 28K */
  463. 0x0 0x20288000 0x0 0x00178000>; /* DSP shared memory 1.5M-32K*/
  464. no-map;
  465. };
  466. dsp1_mem: memory@20400000 { /**0x2040_0000~0x2080_0000 4M**/
  467. reg = <0x0 0x20400000 0x0 0x00280000 /* DSP FW code&data section */
  468. 0x0 0x20680000 0x0 0x00001000 /* DSP communication area */
  469. 0x0 0x20681000 0x0 0x00007000 /* Panic/log page*/
  470. 0x0 0x20688000 0x0 0x00178000>; /* DSP shared memory */
  471. no-map;
  472. };
  473. vi_mem: framebuffer@10000000 {
  474. reg = <0x0 0x10000000 0x0 0x02C00000 /* vi_mem_pool_region[0] 44 MB (default) */
  475. 0x0 0x12C00000 0x0 0x01D00000 /* vi_mem_pool_region[1] 29 MB */
  476. 0x0 0x14900000 0x0 0x01E00000>; /* vi_mem_pool_region[2] 30 MB */
  477. no-map;
  478. };
  479. facelib_mem: memory@17000000 {
  480. reg = <0x0 0x17000000 0 0x02000000>;
  481. no-map;
  482. };
  483. };
  484. &adc {
  485. vref-supply = <&reg_vref_1v8>;
  486. status = "okay";
  487. };
  488. &i2c0 {
  489. clock-frequency = <100000>;
  490. status = "okay";
  491. touch@5d {
  492. #gpio-cells = <2>;
  493. compatible = "goodix,gt911";
  494. reg = <0x5d>;
  495. interrupt-parent = <&gpio1_porta>;
  496. interrupts = <8 0>;
  497. irq-gpios = <&gpio1_porta 8 0>;
  498. reset-gpios = <&gpio1_porta 7 0>;
  499. AVDD28-supply = <&reg_tp_pwr_en>;
  500. touchscreen-size-x = <720>;
  501. touchscreen-size-y = <1280>;
  502. };
  503. };
  504. &audio_i2c0 {
  505. clock-frequency = <100000>;
  506. status = "okay";
  507. es8156_audio_codec: es8156@8 {
  508. #sound-dai-cells = <0>;
  509. compatible = "everest,es8156";
  510. reg = <0x08>;
  511. };
  512. es7210_audio_codec: es7210@40 {
  513. #sound-dai-cells = <0>;
  514. compatible = "MicArray_0";
  515. reg = <0x40>;
  516. };
  517. audio_aw87519_pa@58 {
  518. compatible = "awinic,aw87519_pa";
  519. reg = <0x58>;
  520. reset-gpio = <&ao_gpio4_porta 9 0x1>;
  521. status = "okay";
  522. };
  523. };
  524. &i2c1 {
  525. clock-frequency = <100000>;
  526. status = "okay";
  527. };
  528. &spi0 {
  529. num-cs = <1>;
  530. cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
  531. rx-sample-delay-ns = <10>;
  532. status = "disabled";
  533. spi_norflash@0 {
  534. #address-cells = <1>;
  535. #size-cells = <1>;
  536. compatible = "winbond,w25q64jwm", "jedec,spi-nor";
  537. reg = <0>;
  538. spi-max-frequency = <50000000>;
  539. w25q,fast-read;
  540. };
  541. spidev@1 {
  542. compatible = "spidev";
  543. #address-cells = <0x1>;
  544. #size-cells = <0x1>;
  545. reg = <0x1>;
  546. spi-max-frequency = <50000000>;
  547. };
  548. };
  549. &uart0 {
  550. clock-frequency = <100000000>;
  551. };
  552. &qspi0 {
  553. num-cs = <1>;
  554. cs-gpios = <&gpio2_porta 3 0>;
  555. rx-sample-dly = <4>;
  556. status = "disabled";
  557. spi-flash@0 {
  558. #address-cells = <1>;
  559. #size-cells = <1>;
  560. compatible = "spi-nand";
  561. spi-max-frequency = <100000000>;
  562. spi-tx-bus-width = <4>;
  563. spi-rx-bus-width = <4>;
  564. reg = <0>;
  565. partition@0 {
  566. label = "ubi1";
  567. reg = <0x00000000 0x08000000>;
  568. };
  569. };
  570. };
  571. &qspi1 {
  572. compatible = "snps,dw-apb-ssi";
  573. num-cs = <1>;
  574. cs-gpios = <&gpio0_porta 1 0>;
  575. status = "okay";
  576. spidev@0 {
  577. compatible = "spidev";
  578. #address-cells = <0x1>;
  579. #size-cells = <0x1>;
  580. reg = <0x0>;
  581. spi-max-frequency = <50000000>;
  582. };
  583. };
  584. &gmac0 {
  585. phy-mode = "rgmii-id";
  586. rx-clk-delay = <0x00>; /* for RGMII */
  587. tx-clk-delay = <0x00>; /* for RGMII */
  588. phy-handle = <&phy_88E1111_0>;
  589. status = "okay";
  590. mdio0 {
  591. #address-cells = <1>;
  592. #size-cells = <0>;
  593. compatible = "snps,dwmac-mdio";
  594. phy_88E1111_0: ethernet-phy@0 {
  595. reg = <0x1>;
  596. };
  597. phy_88E1111_1: ethernet-phy@1 {
  598. reg = <0x2>;
  599. };
  600. };
  601. };
  602. &gmac1 {
  603. phy-mode = "rgmii-id";
  604. rx-clk-delay = <0x00>; /* for RGMII */
  605. tx-clk-delay = <0x00>; /* for RGMII */
  606. phy-handle = <&phy_88E1111_1>;
  607. status = "disabled";
  608. };
  609. &emmc {
  610. max-frequency = <198000000>;
  611. non-removable;
  612. mmc-hs400-1_8v;
  613. io_fixed_1v8;
  614. is_emmc;
  615. no-sdio;
  616. no-sd;
  617. pull_up;
  618. bus-width = <8>;
  619. status = "okay";
  620. };
  621. &sdhci0 {
  622. max-frequency = <198000000>;
  623. bus-width = <4>;
  624. pull_up;
  625. wprtn_ignore;
  626. status = "okay";
  627. };
  628. &sdhci1 {
  629. max-frequency = <100000000>;
  630. bus-width = <4>;
  631. pull_up;
  632. no-sd;
  633. no-mmc;
  634. non-removable;
  635. io_fixed_1v8;
  636. post-power-on-delay-ms = <50>;
  637. wprtn_ignore;
  638. cap-sd-highspeed;
  639. keep-power-in-suspend;
  640. wakeup-source;
  641. status = "okay";
  642. };
  643. &padctrl0_apsys { /* right-pinctrl */
  644. light-evb-padctrl0 {
  645. /*
  646. * Pin Configuration Node:
  647. * Format: <pin_id mux_node config>
  648. */
  649. pinctrl_uart0: uart0grp {
  650. thead,pins = <
  651. FM_UART0_TXD 0x0 0x72
  652. FM_UART0_RXD 0x0 0x72
  653. >;
  654. };
  655. pinctrl_spi0: spi0grp {
  656. thead,pins = <
  657. FM_SPI_CSN 0x3 0x20a
  658. FM_SPI_SCLK 0x0 0x20a
  659. FM_SPI_MISO 0x0 0x23a
  660. FM_SPI_MOSI 0x0 0x23a
  661. >;
  662. };
  663. pinctrl_qspi0: qspi0grp {
  664. thead,pins = <
  665. FM_QSPI0_SCLK 0x0 0x20f
  666. FM_QSPI0_CSN0 0x3 0x20f
  667. FM_QSPI0_CSN1 0x0 0x20f
  668. FM_QSPI0_D0_MOSI 0x0 0x23f
  669. FM_QSPI0_D1_MISO 0x0 0x23f
  670. FM_QSPI0_D2_WP 0x0 0x23f
  671. FM_QSPI0_D3_HOLD 0x0 0x23f
  672. >;
  673. };
  674. pinctrl_audio_i2s0: i2s0grp {
  675. thead,pins = <
  676. FM_QSPI0_SCLK 0x2 0x208
  677. FM_QSPI0_CSN0 0x2 0x238
  678. FM_QSPI0_CSN1 0x2 0x208
  679. FM_QSPI0_D0_MOSI 0x2 0x238
  680. FM_QSPI0_D1_MISO 0x2 0x238
  681. FM_QSPI0_D2_WP 0x2 0x238
  682. FM_QSPI0_D3_HOLD 0x2 0x238
  683. >;
  684. };
  685. pinctrl_pwm: pwmgrp {
  686. thead,pins = <
  687. FM_GPIO3_2 0x1 0x208 /* pwm0 */
  688. >;
  689. };
  690. };
  691. };
  692. &padctrl1_apsys { /* left-pinctrl */
  693. light-evb-padctrl1 {
  694. /*
  695. * Pin Configuration Node:
  696. * Format: <pin_id mux_node config>
  697. */
  698. pinctrl_uart3: uart3grp {
  699. thead,pins = <
  700. FM_UART3_TXD 0x0 0x72
  701. FM_UART3_RXD 0x0 0x72
  702. >;
  703. };
  704. pinctrl_uart4: uart4grp {
  705. thead,pins = <
  706. FM_UART4_TXD 0x0 0x72
  707. FM_UART4_RXD 0x0 0x72
  708. FM_UART4_CTSN 0x0 0x72
  709. FM_UART4_RTSN 0x0 0x72
  710. >;
  711. };
  712. pinctrl_qspi1: qspi1grp {
  713. thead,pins = <
  714. FM_QSPI1_SCLK 0x0 0x20a
  715. FM_QSPI1_CSN0 0x3 0x20a
  716. FM_QSPI1_D0_MOSI 0x0 0x23a
  717. FM_QSPI1_D1_MISO 0x0 0x23a
  718. FM_QSPI1_D2_WP 0x0 0x23a
  719. FM_QSPI1_D3_HOLD 0x0 0x23a
  720. >;
  721. };
  722. pinctrl_iso7816: iso7816grp {
  723. thead,pins = <
  724. FM_QSPI1_SCLK 0x1 0x208
  725. FM_QSPI1_D0_MOSI 0x1 0x238
  726. FM_QSPI1_D1_MISO 0x1 0x238
  727. FM_QSPI1_D2_WP 0x1 0x238
  728. FM_QSPI1_D3_HOLD 0x1 0x238
  729. >;
  730. };
  731. };
  732. };
  733. &padctrl_aosys {
  734. light-aon-padctrl {
  735. /*
  736. * Pin Configuration Node:
  737. * Format: <pin_id mux_node config>
  738. */
  739. pinctrl_audiopa1: audiopa1_grp {
  740. thead,pins = <
  741. FM_AUDIO_PA1 0x3 0x72
  742. >;
  743. };
  744. pinctrl_audiopa2: audiopa2_grp {
  745. thead,pins = <
  746. FM_AUDIO_PA2 0x0 0x72
  747. >;
  748. };
  749. pinctrl_volume: volume_grp {
  750. thead,pins = <
  751. FM_AOGPIO_11 0x0 0x208
  752. FM_AOGPIO_10 0x3 0x208
  753. >;
  754. };
  755. };
  756. };
  757. &i2c0 {
  758. clock-frequency = <400000>;
  759. status = "okay";
  760. };
  761. &i2c1 {
  762. clock-frequency = <400000>;
  763. status = "okay";
  764. };
  765. &i2c2 {
  766. clock-frequency = <400000>;
  767. status = "okay";
  768. };
  769. &i2c3 {
  770. clock-frequency = <400000>;
  771. status = "okay";
  772. };
  773. &i2c4 {
  774. clock-frequency = <400000>;
  775. status = "okay";
  776. };
  777. &isp0 {
  778. status = "okay";
  779. };
  780. &isp1 {
  781. status = "okay";
  782. };
  783. &isp_ry0 {
  784. status = "okay";
  785. };
  786. &dewarp {
  787. status = "okay";
  788. };
  789. &dec400_isp0 {
  790. status = "okay";
  791. };
  792. &dec400_isp1 {
  793. status = "okay";
  794. };
  795. &dec400_isp2 {
  796. status = "okay";
  797. };
  798. &bm_visys {
  799. status = "okay";
  800. };
  801. &bm_csi0 {
  802. status = "okay";
  803. };
  804. &bm_csi1 {
  805. status = "okay";
  806. };
  807. &bm_csi2 {
  808. status = "okay";
  809. };
  810. &vi_pre {
  811. vi_pre_irq_en = <1>;
  812. status = "okay";
  813. };
  814. &xtensa_dsp {
  815. status = "okay";
  816. };
  817. &xtensa_dsp0 {
  818. status = "okay";
  819. memory-region = <&dsp0_mem>;
  820. };
  821. &xtensa_dsp1 {
  822. status = "okay";
  823. memory-region = <&dsp1_mem>;
  824. };
  825. &vvcam_flash_led0{
  826. flash_led_name = "aw36413_aw36515";
  827. floodlight_i2c_bus = /bits/ 8 <2>;
  828. floodlight_en_pin = <&gpio1_porta 25 0>;
  829. //projection_i2c_bus = /bits/ 8 <2>;
  830. flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
  831. status = "okay";
  832. };
  833. &vvcam_sensor0 {
  834. sensor_name = "SC2310";
  835. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  836. sensor_regulator_timing_us = <70 50 20>;
  837. sensor_rst = <&gpio1_porta 16 0>;
  838. sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
  839. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  840. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  841. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  842. i2c_reg_width = /bits/ 8 <2>;
  843. i2c_data_width = /bits/ 8 <1>;
  844. i2c_addr = /bits/ 8 <0x30>;
  845. i2c_bus = /bits/ 8 <3>;
  846. status = "okay";
  847. };
  848. /*
  849. &vvcam_sensor0 {
  850. sensor_name = "IMX334";
  851. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  852. sensor_regulator_timing_us = <70 50 20>;
  853. sensor_rst = <&gpio1_porta 16 0>;
  854. sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
  855. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  856. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  857. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  858. i2c_reg_width = /bits/ 8 <2>;
  859. i2c_data_width = /bits/ 8 <1>;
  860. i2c_addr = /bits/ 8 <0x1a>;
  861. i2c_bus = /bits/ 8 <3>;
  862. status = "okay";
  863. };
  864. */
  865. &vvcam_sensor1 {
  866. sensor_name = "OV5693";
  867. i2c_bus = /bits/ 8 <3>;
  868. i2c_reg_width = /bits/ 8 <1>;
  869. i2c_data_width = /bits/ 8 <1>;
  870. status = "disabled";
  871. };
  872. &vvcam_sensor2 {
  873. sensor_name = "GC5035";
  874. sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
  875. sensor_regulator_timing_us = <100 50 0>;
  876. sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
  877. sensor_rst = <&gpio1_porta 29 0>;
  878. sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
  879. DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
  880. DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
  881. AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
  882. i2c_addr = /bits/ 8 <0x37>;
  883. i2c_bus = /bits/ 8 <4>;
  884. i2c_reg_width = /bits/ 8 <1>;
  885. i2c_data_width = /bits/ 8 <1>;
  886. status = "okay";
  887. };
  888. &vvcam_sensor3 {
  889. sensor_name = "SC2310";
  890. sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
  891. sensor_regulator_timing_us = <70 50 20>;
  892. sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
  893. sensor_rst = <&gpio1_porta 29 0>;
  894. sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
  895. DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
  896. DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
  897. AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
  898. i2c_bus = /bits/ 8 <4>;
  899. status = "okay";
  900. };
  901. &vvcam_sensor4 {
  902. sensor_name = "SC132GS";
  903. sensor_regulators = "DOVDD18_IR", "DVDD12_IR", "AVDD25_IR";
  904. sensor_regulator_timing_us = <70 1000 2000>;
  905. i2c_addr = /bits/ 8 <0x31>;
  906. sensor_rst = <&gpio1_porta 24 0>;
  907. sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
  908. DOVDD18_IR-supply = <&soc_dovdd18_ir_reg>;
  909. DVDD12_IR-supply = <&soc_dvdd12_ir_reg>;
  910. AVDD25_IR-supply = <&soc_avdd25_ir_reg>;
  911. i2c_reg_width = /bits/ 8 <2>;
  912. i2c_data_width = /bits/ 8 <1>;
  913. i2c_bus = /bits/ 8 <2>;
  914. status = "okay";
  915. };
  916. &vvcam_sensor5 {
  917. sensor_name = "OV12870";
  918. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  919. sensor_regulator_timing_us = <100 50 0>;
  920. sensor_rst = <&gpio1_porta 16 0>;
  921. sensor_pdn_delay_us = <60>; //powerdown pin / shutdown pin actived till I2C ready
  922. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  923. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  924. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  925. i2c_addr = /bits/ 8 <0x10>;
  926. i2c_reg_width = /bits/ 8 <2>;
  927. i2c_data_width = /bits/ 8 <1>;
  928. i2c_bus = /bits/ 8 <3>;
  929. status = "okay";
  930. };
  931. &vvcam_sensor6 {
  932. sensor_name = "GC02M1B";
  933. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  934. sensor_regulator_timing_us = <70 50 20>;
  935. sensor_rst = <&gpio1_porta 16 0>;
  936. sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
  937. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  938. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  939. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  940. i2c_reg_width = /bits/ 8 <1>;
  941. i2c_data_width = /bits/ 8 <1>;
  942. i2c_addr = /bits/ 8 <0x37>;
  943. i2c_bus = /bits/ 8 <3>;
  944. status = "okay";
  945. };
  946. &video0{
  947. vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
  948. pipline0 {
  949. sensor0 {
  950. subdev_name = "vivcam";
  951. idx = <2>; //<2>=vivcam2 : gc5035
  952. csi_idx = <1>; //<1>=CSI2X2_B
  953. mode_idx = <3>;
  954. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  955. };
  956. sensor1 {
  957. subdev_name = "vivcam";
  958. idx = <3>; //<3>=vivcam3 : sc2310
  959. csi_idx = <1>; //<1>=CSI2X2_B
  960. mode_idx = <1>;
  961. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  962. };
  963. isp {
  964. subdev_name = "isp";
  965. idx = <0>;
  966. path_type = "ISP_MI_PATH_MP";
  967. output {
  968. max_width = <1920>;
  969. max_height = <1088>;
  970. bit_per_pixel = <12>;
  971. frame_count = <3>;
  972. };
  973. };
  974. };
  975. pipline1 {
  976. sensor0 {
  977. subdev_name = "vivcam";
  978. idx = <2>; //<2>=vivcam2 : gc5035
  979. csi_idx = <1>; //<1>=CSI2X2_B
  980. mode_idx = <3>;
  981. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  982. };
  983. sensor1 {
  984. subdev_name = "vivcam";
  985. idx = <3>; //<3>=vivcam3 : sc2310
  986. csi_idx = <1>; //<1>=CSI2X2_B
  987. mode_idx = <1>;
  988. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  989. };
  990. isp {
  991. subdev_name = "isp";
  992. idx = <0>;
  993. path_type = "ISP_MI_PATH_SP";
  994. output {
  995. max_width = <1920>;
  996. max_height = <1088>;
  997. bit_per_pixel = <12>;
  998. frame_count = <3>;
  999. };
  1000. };
  1001. };
  1002. pipline2 {
  1003. sensor0 {
  1004. subdev_name = "vivcam";
  1005. idx = <2>; //<2>=vivcam2 : gc5035
  1006. csi_idx = <1>; //<1>=CSI2X2_B
  1007. mode_idx = <3>;
  1008. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1009. };
  1010. sensor1 {
  1011. subdev_name = "vivcam";
  1012. idx = <3>; //<3>=vivcam3 : sc2310
  1013. csi_idx = <1>; //<1>=CSI2X2_B
  1014. mode_idx = <1>;
  1015. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1016. };
  1017. isp {
  1018. subdev_name = "isp";
  1019. idx = <0>;
  1020. path_type = "ISP_MI_PATH_SP2_BP";
  1021. output {
  1022. max_width = <1920>;
  1023. max_height = <1088>;
  1024. bit_per_pixel = <12>;
  1025. frame_count = <3>;
  1026. };
  1027. };
  1028. };
  1029. };
  1030. &video1{
  1031. vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
  1032. pipline0 {
  1033. sensor0 {
  1034. subdev_name = "vivcam";
  1035. idx = <2>; //<2>=vivcam2 : gc5035
  1036. csi_idx = <1>; //<1>=CSI2X2_B
  1037. mode_idx = <3>;
  1038. path_type = "SENSOR_1296x972_RAW10_LINER";
  1039. };
  1040. sensor1 {
  1041. subdev_name = "vivcam";
  1042. idx = <3>; //<3>=vivcam3 : sc2310
  1043. csi_idx = <1>; //<1>=CSI2X2_B
  1044. mode_idx = <1>;
  1045. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1046. };
  1047. isp {
  1048. subdev_name = "isp";
  1049. idx = <0>;
  1050. path_type = "ISP_MI_PATH_MP";
  1051. output {
  1052. max_width = <1920>;
  1053. max_height = <1088>;
  1054. bit_per_pixel = <12>;
  1055. frame_count = <3>;
  1056. };
  1057. };
  1058. dw {
  1059. subdev_name = "dw";
  1060. idx = <0>;
  1061. path_type = "DW_DWE_VSE0";
  1062. dw_dst_depth = <2>;
  1063. };
  1064. };
  1065. pipline1 {
  1066. sensor0 {
  1067. subdev_name = "vivcam";
  1068. idx = <2>; //<2>=vivcam2 : gc5035
  1069. csi_idx = <1>; //<1>=CSI2X2_B
  1070. mode_idx = <3>;
  1071. path_type = "SENSOR_1296x972_RAW10_LINER";
  1072. };
  1073. sensor1 {
  1074. subdev_name = "vivcam";
  1075. idx = <3>; //<3>=vivcam3 : sc2310
  1076. csi_idx = <1>; //<1>=CSI2X2_B
  1077. mode_idx = <1>;
  1078. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1079. };
  1080. isp {
  1081. subdev_name = "isp";
  1082. idx = <0>;
  1083. path_type = "ISP_MI_PATH_MP";
  1084. output {
  1085. max_width = <1920>;
  1086. max_height = <1088>;
  1087. bit_per_pixel = <12>;
  1088. frame_count = <3>;
  1089. };
  1090. };
  1091. dw {
  1092. subdev_name = "dw";
  1093. idx = <0>;
  1094. path_type = "DW_DWE_VSE1";
  1095. dw_dst_depth = <2>;
  1096. };
  1097. };
  1098. pipline2 {
  1099. sensor0 {
  1100. subdev_name = "vivcam";
  1101. idx = <2>; //<2>=vivcam2 : gc5035
  1102. csi_idx = <1>; //<1>=CSI2X2_B
  1103. mode_idx = <3>;
  1104. path_type = "SENSOR_1296x972_RAW10_LINER";
  1105. };
  1106. sensor1 {
  1107. subdev_name = "vivcam";
  1108. idx = <3>; //<3>=vivcam3 : sc2310
  1109. csi_idx = <1>; //<1>=CSI2X2_B
  1110. mode_idx = <1>;
  1111. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1112. };
  1113. isp {
  1114. subdev_name = "isp";
  1115. idx = <0>;
  1116. path_type = "ISP_MI_PATH_MP";
  1117. output {
  1118. max_width = <1920>;
  1119. max_height = <1088>;
  1120. bit_per_pixel = <12>;
  1121. frame_count = <3>;
  1122. };
  1123. };
  1124. dw {
  1125. subdev_name = "dw";
  1126. idx = <0>;
  1127. path_type = "DW_DWE_VSE2";
  1128. dw_dst_depth = <2>;
  1129. };
  1130. };
  1131. };
  1132. &video2{
  1133. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1134. pipline0 {
  1135. sensor0 {
  1136. subdev_name = "vivcam";
  1137. idx = <0>; //sc2310
  1138. csi_idx = <0>; //<0>=CSI2
  1139. mode_idx = <1>;
  1140. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1141. };
  1142. sensor1 {
  1143. subdev_name = "vivcam";
  1144. idx = <6>; //gc02m1b
  1145. csi_idx = <0>; //<0>=CSI2
  1146. mode_idx = <0>;
  1147. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1148. };
  1149. isp {
  1150. subdev_name = "isp";
  1151. idx = <1>;
  1152. path_type = "ISP_MI_PATH_MP";
  1153. output {
  1154. max_width = <1920>;
  1155. max_height = <1088>;
  1156. bit_per_pixel = <16>;
  1157. frame_count = <3>;
  1158. };
  1159. };
  1160. };
  1161. pipline1 {
  1162. sensor0 {
  1163. subdev_name = "vivcam";
  1164. idx = <0>; //sc2310
  1165. csi_idx = <0>; //<0>=CSI2
  1166. mode_idx = <1>;
  1167. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1168. };
  1169. sensor1 {
  1170. subdev_name = "vivcam";
  1171. idx = <6>; //gc02m1b
  1172. csi_idx = <0>; //<0>=CSI2
  1173. mode_idx = <0>;
  1174. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1175. };
  1176. isp {
  1177. subdev_name = "isp";
  1178. idx = <1>;
  1179. path_type = "ISP_MI_PATH_SP";
  1180. output {
  1181. max_width = <1920>;
  1182. max_height = <1088>;
  1183. bit_per_pixel = <16>;
  1184. frame_count = <3>;
  1185. };
  1186. };
  1187. };
  1188. pipline2 {
  1189. sensor0 {
  1190. subdev_name = "vivcam";
  1191. idx = <0>; //sc2310
  1192. csi_idx = <0>; //<0>=CSI2
  1193. mode_idx = <1>;
  1194. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1195. };
  1196. sensor1 {
  1197. subdev_name = "vivcam";
  1198. idx = <6>; //gc02m1b
  1199. csi_idx = <0>; //<0>=CSI2
  1200. mode_idx = <0>;
  1201. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1202. };
  1203. isp {
  1204. subdev_name = "isp";
  1205. idx = <1>;
  1206. path_type = "ISP_MI_PATH_SP2_BP";
  1207. output {
  1208. max_width = <1920>;
  1209. max_height = <1088>;
  1210. bit_per_pixel = <16>;
  1211. frame_count = <3>;
  1212. };
  1213. };
  1214. };
  1215. };
  1216. &video3{
  1217. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1218. pipline0 {
  1219. sensor0 {
  1220. subdev_name = "vivcam";
  1221. idx = <0>; //sc2310
  1222. csi_idx = <0>; //<0>=CSI2
  1223. mode_idx = <1>;
  1224. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1225. };
  1226. sensor1 {
  1227. subdev_name = "vivcam";
  1228. idx = <6>; //gc02m1b
  1229. csi_idx = <0>; //<0>=CSI2
  1230. mode_idx = <0>;
  1231. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1232. };
  1233. isp {
  1234. subdev_name = "isp";
  1235. idx = <1>;
  1236. path_type = "ISP_MI_PATH_MP";
  1237. output {
  1238. max_width = <1920>;
  1239. max_height = <1088>;
  1240. bit_per_pixel = <12>;
  1241. frame_count = <3>;
  1242. };
  1243. };
  1244. dw {
  1245. subdev_name = "dw";
  1246. idx = <0>;
  1247. path_type = "DW_DWE_VSE0";
  1248. dw_dst_depth = <2>;
  1249. };
  1250. };
  1251. pipline1 {
  1252. sensor0 {
  1253. subdev_name = "vivcam";
  1254. idx = <0>; //sc2310
  1255. csi_idx = <0>; //<0>=CSI2
  1256. mode_idx = <1>;
  1257. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1258. };
  1259. sensor1 {
  1260. subdev_name = "vivcam";
  1261. idx = <6>; //gc02m1b
  1262. csi_idx = <0>; //<0>=CSI2
  1263. mode_idx = <0>;
  1264. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1265. };
  1266. isp {
  1267. subdev_name = "isp";
  1268. idx = <1>;
  1269. path_type = "ISP_MI_PATH_MP";
  1270. output {
  1271. max_width = <1920>;
  1272. max_height = <1088>;
  1273. bit_per_pixel = <12>;
  1274. frame_count = <3>;
  1275. };
  1276. };
  1277. dw {
  1278. subdev_name = "dw";
  1279. idx = <0>;
  1280. path_type = "DW_DWE_VSE1";
  1281. dw_dst_depth = <2>;
  1282. };
  1283. };
  1284. pipline2 {
  1285. sensor0 {
  1286. subdev_name = "vivcam";
  1287. idx = <0>; //sc2310
  1288. csi_idx = <0>; //<0>=CSI2
  1289. mode_idx = <1>;
  1290. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1291. };
  1292. sensor1 {
  1293. subdev_name = "vivcam";
  1294. idx = <6>; //gc02m1b
  1295. csi_idx = <0>; //<0>=CSI2
  1296. mode_idx = <0>;
  1297. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1298. };
  1299. isp {
  1300. subdev_name = "isp";
  1301. idx = <1>;
  1302. path_type = "ISP_MI_PATH_MP";
  1303. output {
  1304. max_width = <1920>;
  1305. max_height = <1088>;
  1306. bit_per_pixel = <12>;
  1307. frame_count = <3>;
  1308. };
  1309. };
  1310. dw {
  1311. subdev_name = "dw";
  1312. idx = <0>;
  1313. path_type = "DW_DWE_VSE2";
  1314. dw_dst_depth = <2>;
  1315. };
  1316. };
  1317. };
  1318. &video4{
  1319. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1320. pipline0 {
  1321. sensor0 {
  1322. subdev_name = "vivcam";
  1323. idx = <0>; //sc2310
  1324. csi_idx = <0>; //<0>=CSI2
  1325. mode_idx = <1>;
  1326. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1327. };
  1328. sensor1 {
  1329. subdev_name = "vivcam";
  1330. idx = <6>; //gc02m1b
  1331. csi_idx = <0>; //<0>=CSI2
  1332. mode_idx = <0>;
  1333. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1334. };
  1335. isp {
  1336. subdev_name = "isp";
  1337. idx = <1>;
  1338. path_type = "ISP_MI_PATH_PP";
  1339. output {
  1340. max_width = <1920>;
  1341. max_height = <1088>;
  1342. bit_per_pixel = <12>;
  1343. frame_count = <3>;
  1344. };
  1345. };
  1346. dsp {
  1347. subdev_name = "dsp";
  1348. idx = <0>;
  1349. path_type = "DSP_PATH_ISP_RY";
  1350. output {
  1351. max_width = <1920>;
  1352. max_height = <1088>;
  1353. bit_per_pixel = <12>;
  1354. frame_count = <3>;
  1355. };
  1356. };
  1357. ry {
  1358. subdev_name = "ry";
  1359. idx = <0>;
  1360. path_type = "ISP_RY_MI_PATH_MP";
  1361. output {
  1362. max_width = <1920>;
  1363. max_height = <1088>;
  1364. bit_per_pixel = <12>;
  1365. frame_count = <3>;
  1366. };
  1367. };
  1368. };
  1369. pipline1 {
  1370. sensor0 {
  1371. subdev_name = "vivcam";
  1372. idx = <0>; //sc2310
  1373. csi_idx = <0>; //<0>=CSI2
  1374. mode_idx = <1>;
  1375. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1376. };
  1377. sensor1 {
  1378. subdev_name = "vivcam";
  1379. idx = <6>; //gc02m1b
  1380. csi_idx = <0>; //<0>=CSI2
  1381. mode_idx = <0>;
  1382. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1383. };
  1384. isp {
  1385. subdev_name = "isp";
  1386. idx = <1>;
  1387. path_type = "ISP_MI_PATH_PP";
  1388. output {
  1389. max_width = <1920>;
  1390. max_height = <1088>;
  1391. bit_per_pixel = <12>;
  1392. frame_count = <3>;
  1393. };
  1394. };
  1395. dsp {
  1396. subdev_name = "dsp";
  1397. idx = <0>;
  1398. path_type = "DSP_PATH_ISP_RY";
  1399. output {
  1400. max_width = <1920>;
  1401. max_height = <1088>;
  1402. bit_per_pixel = <12>;
  1403. frame_count = <3>;
  1404. };
  1405. };
  1406. ry {
  1407. subdev_name = "ry";
  1408. idx = <0>;
  1409. path_type = "ISP_RY_MI_PATH_SP";
  1410. output {
  1411. max_width = <1920>;
  1412. max_height = <1088>;
  1413. bit_per_pixel = <12>;
  1414. frame_count = <3>;
  1415. };
  1416. };
  1417. };
  1418. pipline2 {
  1419. sensor0 {
  1420. subdev_name = "vivcam";
  1421. idx = <0>; //sc2310
  1422. csi_idx = <0>; //<0>=CSI2
  1423. mode_idx = <1>;
  1424. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1425. };
  1426. sensor1 {
  1427. subdev_name = "vivcam";
  1428. idx = <6>; //gc02m1b
  1429. csi_idx = <0>; //<0>=CSI2
  1430. mode_idx = <0>;
  1431. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1432. };
  1433. isp {
  1434. subdev_name = "isp";
  1435. idx = <1>;
  1436. path_type = "ISP_MI_PATH_PP";
  1437. output {
  1438. max_width = <1920>;
  1439. max_height = <1088>;
  1440. bit_per_pixel = <12>;
  1441. frame_count = <3>;
  1442. };
  1443. };
  1444. dsp {
  1445. subdev_name = "dsp";
  1446. idx = <0>;
  1447. path_type = "DSP_PATH_ISP_RY";
  1448. output {
  1449. max_width = <1920>;
  1450. max_height = <1088>;
  1451. bit_per_pixel = <12>;
  1452. frame_count = <3>;
  1453. };
  1454. };
  1455. ry {
  1456. subdev_name = "ry";
  1457. idx = <0>;
  1458. path_type = "ISP_RY_MI_PATH_SP2_BP";
  1459. output {
  1460. max_width = <1920>;
  1461. max_height = <1088>;
  1462. bit_per_pixel = <12>;
  1463. frame_count = <3>;
  1464. };
  1465. };
  1466. };
  1467. };
  1468. &video5{
  1469. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1470. pipline0 {
  1471. sensor0 {
  1472. subdev_name = "vivcam";
  1473. idx = <0>; //sc2310
  1474. csi_idx = <0>; //<0>=CSI2
  1475. mode_idx = <1>;
  1476. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1477. };
  1478. sensor1 {
  1479. subdev_name = "vivcam";
  1480. idx = <6>; //gc02m1b
  1481. csi_idx = <0>; //<0>=CSI2
  1482. mode_idx = <0>;
  1483. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1484. };
  1485. isp {
  1486. subdev_name = "isp";
  1487. idx = <1>;
  1488. path_type = "ISP_MI_PATH_PP";
  1489. output {
  1490. max_width = <1920>;
  1491. max_height = <1088>;
  1492. bit_per_pixel = <12>;
  1493. frame_count = <3>;
  1494. };
  1495. };
  1496. dsp {
  1497. subdev_name = "dsp";
  1498. idx = <0>;
  1499. path_type = "DSP_PATH_ISP_RY";
  1500. output {
  1501. max_width = <1920>;
  1502. max_height = <1088>;
  1503. bit_per_pixel = <12>;
  1504. frame_count = <3>;
  1505. };
  1506. };
  1507. ry {
  1508. subdev_name = "ry";
  1509. idx = <0>;
  1510. path_type = "ISP_RY_MI_PATH_MP";
  1511. output {
  1512. max_width = <1920>;
  1513. max_height = <1088>;
  1514. bit_per_pixel = <12>;
  1515. frame_count = <3>;
  1516. };
  1517. };
  1518. dw {
  1519. subdev_name = "dw";
  1520. idx = <0>;
  1521. path_type = "DW_DWE_VSE0";
  1522. dw_dst_depth = <2>;
  1523. };
  1524. };
  1525. pipline1 {
  1526. sensor0 {
  1527. subdev_name = "vivcam";
  1528. idx = <0>; //sc2310
  1529. csi_idx = <0>; //<0>=CSI2
  1530. mode_idx = <1>;
  1531. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1532. };
  1533. sensor1 {
  1534. subdev_name = "vivcam";
  1535. idx = <6>; //gc02m1b
  1536. csi_idx = <0>; //<0>=CSI2
  1537. mode_idx = <0>;
  1538. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1539. };
  1540. isp {
  1541. subdev_name = "isp";
  1542. idx = <1>;
  1543. path_type = "ISP_MI_PATH_PP";
  1544. output {
  1545. max_width = <1920>;
  1546. max_height = <1088>;
  1547. bit_per_pixel = <12>;
  1548. frame_count = <3>;
  1549. };
  1550. };
  1551. dsp {
  1552. subdev_name = "dsp";
  1553. idx = <0>;
  1554. path_type = "DSP_PATH_ISP_RY";
  1555. output {
  1556. max_width = <1920>;
  1557. max_height = <1088>;
  1558. bit_per_pixel = <12>;
  1559. frame_count = <3>;
  1560. };
  1561. };
  1562. ry {
  1563. subdev_name = "ry";
  1564. idx = <0>;
  1565. path_type = "ISP_RY_MI_PATH_MP";
  1566. output {
  1567. max_width = <1920>;
  1568. max_height = <1088>;
  1569. bit_per_pixel = <12>;
  1570. frame_count = <3>;
  1571. };
  1572. };
  1573. dw {
  1574. subdev_name = "dw";
  1575. idx = <0>;
  1576. path_type = "DW_DWE_VSE1";
  1577. dw_dst_depth = <2>;
  1578. };
  1579. };
  1580. pipline2 {
  1581. sensor0 {
  1582. subdev_name = "vivcam";
  1583. idx = <0>; //sc2310
  1584. csi_idx = <0>; //<0>=CSI2
  1585. mode_idx = <1>;
  1586. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1587. };
  1588. sensor1 {
  1589. subdev_name = "vivcam";
  1590. idx = <6>; //gc02m1b
  1591. csi_idx = <0>; //<0>=CSI2
  1592. mode_idx = <0>;
  1593. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1594. };
  1595. isp {
  1596. subdev_name = "isp";
  1597. idx = <1>;
  1598. path_type = "ISP_MI_PATH_PP";
  1599. output {
  1600. max_width = <1920>;
  1601. max_height = <1088>;
  1602. bit_per_pixel = <12>;
  1603. frame_count = <3>;
  1604. };
  1605. };
  1606. dsp {
  1607. subdev_name = "dsp";
  1608. idx = <0>;
  1609. path_type = "DSP_PATH_ISP_RY";
  1610. output {
  1611. max_width = <1920>;
  1612. max_height = <1088>;
  1613. bit_per_pixel = <12>;
  1614. frame_count = <3>;
  1615. };
  1616. };
  1617. ry {
  1618. subdev_name = "ry";
  1619. idx = <0>;
  1620. path_type = "ISP_RY_MI_PATH_MP";
  1621. output {
  1622. max_width = <1920>;
  1623. max_height = <1088>;
  1624. bit_per_pixel = <12>;
  1625. frame_count = <3>;
  1626. };
  1627. };
  1628. dw {
  1629. subdev_name = "dw";
  1630. idx = <0>;
  1631. path_type = "DW_DWE_VSE2";
  1632. dw_dst_depth = <2>;
  1633. };
  1634. };
  1635. };
  1636. &video6{
  1637. vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
  1638. pipline0 {
  1639. sensor0 {
  1640. subdev_name = "vivcam";
  1641. idx = <4>; //sc132gs
  1642. csi_idx = <2>; //<2>=CSI2X2_A
  1643. flash_led_idx = <0>;
  1644. mode_idx = <0>;
  1645. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1646. };
  1647. dsp{
  1648. output {
  1649. max_width = <1080>;
  1650. max_height = <1280>;
  1651. bit_per_pixel = <16>;
  1652. frame_count = <3>;
  1653. };
  1654. };
  1655. };
  1656. pipline1 {
  1657. sensor0 {
  1658. subdev_name = "vivcam";
  1659. idx = <4>; //sc132gs
  1660. csi_idx = <2>; //<2>=CSI2X2_A
  1661. flash_led_idx = <0>;
  1662. mode_idx = <0>;
  1663. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1664. };
  1665. dsp{
  1666. output {
  1667. max_width = <1080>;
  1668. max_height = <1280>;
  1669. bit_per_pixel = <16>;
  1670. frame_count = <3>;
  1671. };
  1672. };
  1673. };
  1674. };
  1675. &video7{
  1676. pipline0 {
  1677. sensor0 {
  1678. subdev_name = "vivcam";
  1679. idx = <2>; //<2>=vivcam2 : gc5035
  1680. csi_idx = <1>; //<1>=CSI2X2_B
  1681. mode_idx = <1>;
  1682. path_type = "SENSOR_1080P_RAW10_LINER";
  1683. };
  1684. sensor1 {
  1685. subdev_name = "vivcam";
  1686. idx = <3>; //<3>=vivcam3 : sc2310
  1687. csi_idx = <1>; //<1>=CSI2X2_B
  1688. mode_idx = <1>;
  1689. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1690. };
  1691. isp {
  1692. subdev_name = "isp";
  1693. idx = <0>;
  1694. path_type = "ISP_MI_PATH_PP";
  1695. output {
  1696. max_width = <1920>;
  1697. max_height = <1088>;
  1698. bit_per_pixel = <12>;
  1699. frame_count = <3>;
  1700. };
  1701. };
  1702. dsp {
  1703. subdev_name = "dsp";
  1704. idx = <1>;
  1705. path_type = "DSP_PATH_ISP_RY";
  1706. output {
  1707. max_width = <1920>;
  1708. max_height = <1088>;
  1709. bit_per_pixel = <12>;
  1710. frame_count = <3>;
  1711. };
  1712. };
  1713. ry {
  1714. subdev_name = "ry";
  1715. idx = <0>;
  1716. path_type = "ISP_RY_MI_PATH_MP";
  1717. output {
  1718. max_width = <1920>;
  1719. max_height = <1088>;
  1720. bit_per_pixel = <12>;
  1721. frame_count = <3>;
  1722. };
  1723. };
  1724. dw {
  1725. subdev_name = "dw";
  1726. idx = <0>;
  1727. path_type = "DW_DWE_VSE0";
  1728. dw_dst_depth = <2>;
  1729. };
  1730. };
  1731. pipline1 {
  1732. sensor0 {
  1733. subdev_name = "vivcam";
  1734. idx = <2>; //<2>=vivcam2 : gc5035
  1735. csi_idx = <1>; //<1>=CSI2X2_B
  1736. mode_idx = <3>;
  1737. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1738. };
  1739. sensor1 {
  1740. subdev_name = "vivcam";
  1741. idx = <3>; //<3>=vivcam3 : sc2310
  1742. csi_idx = <1>; //<1>=CSI2X2_B
  1743. mode_idx = <1>;
  1744. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1745. };
  1746. isp {
  1747. subdev_name = "isp";
  1748. idx = <0>;
  1749. path_type = "ISP_MI_PATH_PP";
  1750. output {
  1751. max_width = <1920>;
  1752. max_height = <1088>;
  1753. bit_per_pixel = <12>;
  1754. frame_count = <3>;
  1755. };
  1756. };
  1757. dsp {
  1758. subdev_name = "dsp";
  1759. idx = <1>;
  1760. path_type = "DSP_PATH_ISP_RY";
  1761. output {
  1762. max_width = <1920>;
  1763. max_height = <1088>;
  1764. bit_per_pixel = <12>;
  1765. frame_count = <3>;
  1766. };
  1767. };
  1768. ry {
  1769. subdev_name = "ry";
  1770. idx = <0>;
  1771. path_type = "ISP_RY_MI_PATH_MP";
  1772. output {
  1773. max_width = <1920>;
  1774. max_height = <1088>;
  1775. bit_per_pixel = <12>;
  1776. frame_count = <3>;
  1777. };
  1778. };
  1779. dw {
  1780. subdev_name = "dw";
  1781. idx = <0>;
  1782. path_type = "DW_DWE_VSE1";
  1783. dw_dst_depth = <2>;
  1784. };
  1785. };
  1786. pipline2 {
  1787. sensor0 {
  1788. subdev_name = "vivcam";
  1789. idx = <2>; //<2>=vivcam2 : gc5035
  1790. csi_idx = <1>; //<1>=CSI2X2_B
  1791. mode_idx = <3>;
  1792. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1793. };
  1794. sensor1 {
  1795. subdev_name = "vivcam";
  1796. idx = <3>; //<3>=vivcam3 : sc2310
  1797. csi_idx = <1>; //<1>=CSI2X2_B
  1798. mode_idx = <1>;
  1799. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1800. };
  1801. isp {
  1802. subdev_name = "isp";
  1803. idx = <0>;
  1804. path_type = "ISP_MI_PATH_PP";
  1805. output {
  1806. max_width = <1920>;
  1807. max_height = <1088>;
  1808. bit_per_pixel = <12>;
  1809. frame_count = <3>;
  1810. };
  1811. };
  1812. dsp {
  1813. subdev_name = "dsp";
  1814. idx = <1>;
  1815. path_type = "DSP_PATH_ISP_RY";
  1816. output {
  1817. max_width = <1920>;
  1818. max_height = <1088>;
  1819. bit_per_pixel = <12>;
  1820. frame_count = <3>;
  1821. };
  1822. };
  1823. ry {
  1824. subdev_name = "ry";
  1825. idx = <0>;
  1826. path_type = "ISP_RY_MI_PATH_MP";
  1827. output {
  1828. max_width = <1920>;
  1829. max_height = <1088>;
  1830. bit_per_pixel = <12>;
  1831. frame_count = <3>;
  1832. };
  1833. };
  1834. dw {
  1835. subdev_name = "dw";
  1836. idx = <0>;
  1837. path_type = "DW_DWE_VSE2";
  1838. dw_dst_depth = <2>;
  1839. };
  1840. };
  1841. };
  1842. &video8{
  1843. vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
  1844. pipline0 {
  1845. sensor0 {
  1846. subdev_name = "vivcam";
  1847. idx = <2>; //<2>=vivcam2 : gc5035
  1848. csi_idx = <1>; //<1>=CSI2X2_B
  1849. mode_idx = <3>;
  1850. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1851. };
  1852. sensor1 {
  1853. subdev_name = "vivcam";
  1854. idx = <3>; //<3>=vivcam3 : sc2310
  1855. csi_idx = <1>; //<1>=CSI2X2_B
  1856. mode_idx = <1>;
  1857. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1858. };
  1859. dsp {
  1860. subdev_name = "dsp";
  1861. idx = <0>;
  1862. path_type = "DSP_PATH_VIPRE_DDR";
  1863. output {
  1864. max_width = <1920>;
  1865. max_height = <1088>;
  1866. bit_per_pixel = <12>;
  1867. frame_count = <3>;
  1868. };
  1869. };
  1870. };
  1871. };
  1872. &video9{
  1873. pipline0 {
  1874. sensor0 {
  1875. subdev_name = "vivcam";
  1876. idx = <4>; //sc132gs
  1877. csi_idx = <2>; //<2>=CSI2X2_A
  1878. mode_idx = <0>;
  1879. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1880. };
  1881. dsp{
  1882. output {
  1883. max_width = <1080>;
  1884. max_height = <1280>;
  1885. bit_per_pixel = <16>;
  1886. frame_count = <3>;
  1887. };
  1888. };
  1889. };
  1890. };
  1891. &video10{ // TUNINGTOOL
  1892. pipline0 {
  1893. sensor0 {
  1894. subdev_name = "vivcam";
  1895. idx = <2>; //<2>=vivcam2 : gc5035
  1896. csi_idx = <1>; //<1>=CSI2X2_B
  1897. mode_idx = <1>;
  1898. path_type = "SENSOR_1080P_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1899. skip_init = <1>;
  1900. };
  1901. sensor1 {
  1902. subdev_name = "vivcam";
  1903. idx = <3>; //<3>=vivcam3 : sc2310
  1904. csi_idx = <1>; //<1>=CSI2X2_B
  1905. mode_idx = <1>;
  1906. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1907. skip_init = <1>;
  1908. };
  1909. };
  1910. };
  1911. &video11{
  1912. pipline0 {
  1913. pipline_id = <0>;
  1914. status = "okay";
  1915. sensor0 {
  1916. subdev_name = "vivcam";
  1917. idx = <4>; //sc132gs
  1918. csi_idx = <2>; //<2>=CSI2X2_A
  1919. flash_led_idx = <0>;
  1920. mode_idx = <0>;
  1921. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1922. };
  1923. isp {
  1924. subdev_name = "isp";
  1925. idx = <0>;
  1926. path_type = "ISP_MI_PATH_MP";
  1927. output {
  1928. max_width = <1920>;
  1929. max_height = <1088>;
  1930. bit_per_pixel = <12>;
  1931. frame_count = <3>;
  1932. };
  1933. };
  1934. };
  1935. };
  1936. &video12{ // TUNINGTOOL
  1937. pipline0 { // CSI2
  1938. sensor0 {
  1939. subdev_name = "vivcam";
  1940. idx = <0>; //sc2310
  1941. csi_idx = <0>; //<0>=CSI2
  1942. mode_idx = <1>;
  1943. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1944. skip_init = <1>;
  1945. };
  1946. sensor1 {
  1947. subdev_name = "vivcam";
  1948. idx = <6>; //gc02m1b
  1949. csi_idx = <0>; //<0>=CSI2
  1950. mode_idx = <0>;
  1951. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1952. skip_init = <1>;
  1953. };
  1954. };
  1955. };
  1956. &video14{
  1957. vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[0]
  1958. status = "okay";
  1959. pipline0 {
  1960. pipline_id = <0>;
  1961. status = "okay";
  1962. sensor0 {
  1963. subdev_name = "vivcam";
  1964. idx = <4>; //sc132gs
  1965. csi_idx = <2>; //<2>=CSI2X2_A
  1966. flash_led_idx = <0>;
  1967. mode_idx = <0>;
  1968. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1969. };
  1970. dma {
  1971. subdev_name = "vipre";
  1972. idx = <0>;
  1973. path_type = "VIPRE_CSI2_ISP1";
  1974. };
  1975. isp {
  1976. subdev_name = "isp";
  1977. idx = <1>;
  1978. path_type = "ISP_MI_MCM_WR0";
  1979. output {
  1980. max_width = <1080>;
  1981. max_height = <1280>;
  1982. bit_per_pixel = <16>;
  1983. frame_count = <3>;
  1984. };
  1985. };
  1986. };
  1987. };
  1988. &video15{
  1989. status = "okay";
  1990. //vi_mem_pool_region = <0>;
  1991. pipline0 {
  1992. pipline_id = <0>;
  1993. status = "okay";
  1994. sensor0 {
  1995. subdev_name = "vivcam";
  1996. idx = <0>; //<0>=vivcam0 :2310
  1997. csi_idx = <0>; //<0>=CSI2
  1998. flash_led_idx = <0>;
  1999. mode_idx = <1>;
  2000. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  2001. };
  2002. dma {
  2003. subdev_name = "vipre";
  2004. idx = <0>;
  2005. path_type = "VIPRE_CSI0_DDR";
  2006. };
  2007. };
  2008. };
  2009. &trng {
  2010. status = "disabled";
  2011. };
  2012. &eip_28 {
  2013. status = "okay";
  2014. };
  2015. &vdec {
  2016. status = "okay";
  2017. };
  2018. &venc {
  2019. status = "okay";
  2020. };
  2021. &isp_venc_shake {
  2022. status = "okay";
  2023. };
  2024. &vidmem {
  2025. status = "okay";
  2026. memory-region = <&vi_mem>;
  2027. };
  2028. &gpu {
  2029. status = "okay";
  2030. };
  2031. &npu {
  2032. vha_clk_rate = <1000000000>;
  2033. status = "okay";
  2034. };
  2035. &fce {
  2036. memory-region = <&facelib_mem>;
  2037. status = "okay";
  2038. };
  2039. &dpu_enc0 {
  2040. status = "okay";
  2041. ports {
  2042. /* output */
  2043. port@1 {
  2044. reg = <1>;
  2045. enc0_out: endpoint {
  2046. remote-endpoint = <&dsi0_in>;
  2047. };
  2048. };
  2049. };
  2050. };
  2051. &dpu_enc1 {
  2052. ports {
  2053. /delete-node/ port@0;
  2054. };
  2055. };
  2056. &dpu {
  2057. status = "okay";
  2058. };
  2059. &dsi0 {
  2060. status = "okay";
  2061. };
  2062. &dhost_0 {
  2063. ports {
  2064. #address-cells = <1>;
  2065. #size-cells = <0>;
  2066. port@0 {
  2067. reg = <0>;
  2068. dsi0_in: endpoint {
  2069. remote-endpoint = <&enc0_out>;
  2070. };
  2071. };
  2072. port@1 {
  2073. reg = <1>;
  2074. dsi0_out: endpoint {
  2075. remote-endpoint = <&panel0_in>;
  2076. };
  2077. };
  2078. };
  2079. panel0: panel0@0 {
  2080. compatible = "txd,dy800qwxpab";
  2081. reg = <0>;
  2082. backlight = <&lcd0_backlight>;
  2083. reset-gpio = <&gpio1_porta 5 1>; /* active low */
  2084. vdd1v8-supply = <&soc_vdd18_lcd0_en_reg>;
  2085. vspn5v7-supply = <&soc_lcd0_bias_en_reg>;
  2086. port {
  2087. panel0_in: endpoint {
  2088. remote-endpoint = <&dsi0_out>;
  2089. };
  2090. };
  2091. };
  2092. };
  2093. &disp1_out {
  2094. remote-endpoint = <&hdmi_tx_in>;
  2095. };
  2096. &hdmi_tx {
  2097. status = "okay";
  2098. port@0 {
  2099. /* input */
  2100. hdmi_tx_in: endpoint {
  2101. remote-endpoint = <&disp1_out>;
  2102. };
  2103. };
  2104. };
  2105. &lightsound {
  2106. status = "okay";
  2107. simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
  2108. reg = <0>;
  2109. format = "i2s";
  2110. cpu {
  2111. sound-dai = <&i2s1 0>;
  2112. };
  2113. codec {
  2114. sound-dai = <&es8156_audio_codec>;
  2115. };
  2116. };
  2117. simple-audio-card,dai-link@1 { /* I2S - AUDIO SYS CODEC 7210*/
  2118. reg = <1>;
  2119. format = "i2s";
  2120. cpu {
  2121. sound-dai = <&i2s3 0>;
  2122. };
  2123. codec {
  2124. sound-dai = <&es7210_audio_codec>;
  2125. };
  2126. };
  2127. simple-audio-card,dai-link@2 { /* I2S - HDMI */
  2128. reg = <2>;
  2129. format = "i2s";
  2130. cpu {
  2131. sound-dai = <&light_i2s 1>;
  2132. };
  2133. codec {
  2134. sound-dai = <&dummy_codec 2>;
  2135. };
  2136. };
  2137. };
  2138. &light_i2s {
  2139. status = "okay";
  2140. };
  2141. &i2s0 {
  2142. status = "okay";
  2143. };
  2144. &i2s1 {
  2145. status = "okay";
  2146. };
  2147. &i2s3 {
  2148. status = "okay";
  2149. };
  2150. &cpus {
  2151. c910_0: cpu@0 {
  2152. operating-points = <
  2153. /* kHz uV */
  2154. 300000 600000
  2155. 800000 700000
  2156. 1500000 800000
  2157. >;
  2158. light,dvddm-operating-points = <
  2159. /* kHz uV */
  2160. 300000 800000
  2161. 800000 800000
  2162. 1500000 800000
  2163. >;
  2164. };
  2165. c910_1: cpu@1 {
  2166. operating-points = <
  2167. /* kHz uV */
  2168. 300000 600000
  2169. 800000 700000
  2170. 1500000 800000
  2171. >;
  2172. light,dvddm-operating-points = <
  2173. /* kHz uV */
  2174. 300000 800000
  2175. 800000 800000
  2176. 1500000 800000
  2177. >;
  2178. };
  2179. c910_2: cpu@2 {
  2180. operating-points = <
  2181. /* kHz uV */
  2182. 300000 600000
  2183. 800000 700000
  2184. 1500000 800000
  2185. >;
  2186. light,dvddm-operating-points = <
  2187. /* kHz uV */
  2188. 300000 800000
  2189. 800000 800000
  2190. 1500000 800000
  2191. >;
  2192. };
  2193. c910_3: cpu@3 {
  2194. operating-points = <
  2195. /* kHz uV */
  2196. 300000 600000
  2197. 800000 700000
  2198. 1500000 800000
  2199. >;
  2200. light,dvddm-operating-points = <
  2201. /* kHz uV */
  2202. 300000 800000
  2203. 800000 800000
  2204. 1500000 800000
  2205. >;
  2206. };
  2207. };