pci.rst 57 KB

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  1. ====================
  2. PCI Power Management
  3. ====================
  4. Copyright (c) 2010 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
  5. An overview of concepts and the Linux kernel's interfaces related to PCI power
  6. management. Based on previous work by Patrick Mochel <mochel@transmeta.com>
  7. (and others).
  8. This document only covers the aspects of power management specific to PCI
  9. devices. For general description of the kernel's interfaces related to device
  10. power management refer to Documentation/driver-api/pm/devices.rst and
  11. Documentation/power/runtime_pm.rst.
  12. .. contents:
  13. 1. Hardware and Platform Support for PCI Power Management
  14. 2. PCI Subsystem and Device Power Management
  15. 3. PCI Device Drivers and Power Management
  16. 4. Resources
  17. 1. Hardware and Platform Support for PCI Power Management
  18. =========================================================
  19. 1.1. Native and Platform-Based Power Management
  20. -----------------------------------------------
  21. In general, power management is a feature allowing one to save energy by putting
  22. devices into states in which they draw less power (low-power states) at the
  23. price of reduced functionality or performance.
  24. Usually, a device is put into a low-power state when it is underutilized or
  25. completely inactive. However, when it is necessary to use the device once
  26. again, it has to be put back into the "fully functional" state (full-power
  27. state). This may happen when there are some data for the device to handle or
  28. as a result of an external event requiring the device to be active, which may
  29. be signaled by the device itself.
  30. PCI devices may be put into low-power states in two ways, by using the device
  31. capabilities introduced by the PCI Bus Power Management Interface Specification,
  32. or with the help of platform firmware, such as an ACPI BIOS. In the first
  33. approach, that is referred to as the native PCI power management (native PCI PM)
  34. in what follows, the device power state is changed as a result of writing a
  35. specific value into one of its standard configuration registers. The second
  36. approach requires the platform firmware to provide special methods that may be
  37. used by the kernel to change the device's power state.
  38. Devices supporting the native PCI PM usually can generate wakeup signals called
  39. Power Management Events (PMEs) to let the kernel know about external events
  40. requiring the device to be active. After receiving a PME the kernel is supposed
  41. to put the device that sent it into the full-power state. However, the PCI Bus
  42. Power Management Interface Specification doesn't define any standard method of
  43. delivering the PME from the device to the CPU and the operating system kernel.
  44. It is assumed that the platform firmware will perform this task and therefore,
  45. even though a PCI device is set up to generate PMEs, it also may be necessary to
  46. prepare the platform firmware for notifying the CPU of the PMEs coming from the
  47. device (e.g. by generating interrupts).
  48. In turn, if the methods provided by the platform firmware are used for changing
  49. the power state of a device, usually the platform also provides a method for
  50. preparing the device to generate wakeup signals. In that case, however, it
  51. often also is necessary to prepare the device for generating PMEs using the
  52. native PCI PM mechanism, because the method provided by the platform depends on
  53. that.
  54. Thus in many situations both the native and the platform-based power management
  55. mechanisms have to be used simultaneously to obtain the desired result.
  56. 1.2. Native PCI Power Management
  57. --------------------------------
  58. The PCI Bus Power Management Interface Specification (PCI PM Spec) was
  59. introduced between the PCI 2.1 and PCI 2.2 Specifications. It defined a
  60. standard interface for performing various operations related to power
  61. management.
  62. The implementation of the PCI PM Spec is optional for conventional PCI devices,
  63. but it is mandatory for PCI Express devices. If a device supports the PCI PM
  64. Spec, it has an 8 byte power management capability field in its PCI
  65. configuration space. This field is used to describe and control the standard
  66. features related to the native PCI power management.
  67. The PCI PM Spec defines 4 operating states for devices (D0-D3) and for buses
  68. (B0-B3). The higher the number, the less power is drawn by the device or bus
  69. in that state. However, the higher the number, the longer the latency for
  70. the device or bus to return to the full-power state (D0 or B0, respectively).
  71. There are two variants of the D3 state defined by the specification. The first
  72. one is D3hot, referred to as the software accessible D3, because devices can be
  73. programmed to go into it. The second one, D3cold, is the state that PCI devices
  74. are in when the supply voltage (Vcc) is removed from them. It is not possible
  75. to program a PCI device to go into D3cold, although there may be a programmable
  76. interface for putting the bus the device is on into a state in which Vcc is
  77. removed from all devices on the bus.
  78. PCI bus power management, however, is not supported by the Linux kernel at the
  79. time of this writing and therefore it is not covered by this document.
  80. Note that every PCI device can be in the full-power state (D0) or in D3cold,
  81. regardless of whether or not it implements the PCI PM Spec. In addition to
  82. that, if the PCI PM Spec is implemented by the device, it must support D3hot
  83. as well as D0. The support for the D1 and D2 power states is optional.
  84. PCI devices supporting the PCI PM Spec can be programmed to go to any of the
  85. supported low-power states (except for D3cold). While in D1-D3hot the
  86. standard configuration registers of the device must be accessible to software
  87. (i.e. the device is required to respond to PCI configuration accesses), although
  88. its I/O and memory spaces are then disabled. This allows the device to be
  89. programmatically put into D0. Thus the kernel can switch the device back and
  90. forth between D0 and the supported low-power states (except for D3cold) and the
  91. possible power state transitions the device can undergo are the following:
  92. +----------------------------+
  93. | Current State | New State |
  94. +----------------------------+
  95. | D0 | D1, D2, D3 |
  96. +----------------------------+
  97. | D1 | D2, D3 |
  98. +----------------------------+
  99. | D2 | D3 |
  100. +----------------------------+
  101. | D1, D2, D3 | D0 |
  102. +----------------------------+
  103. The transition from D3cold to D0 occurs when the supply voltage is provided to
  104. the device (i.e. power is restored). In that case the device returns to D0 with
  105. a full power-on reset sequence and the power-on defaults are restored to the
  106. device by hardware just as at initial power up.
  107. PCI devices supporting the PCI PM Spec can be programmed to generate PMEs
  108. while in any power state (D0-D3), but they are not required to be capable
  109. of generating PMEs from all supported power states. In particular, the
  110. capability of generating PMEs from D3cold is optional and depends on the
  111. presence of additional voltage (3.3Vaux) allowing the device to remain
  112. sufficiently active to generate a wakeup signal.
  113. 1.3. ACPI Device Power Management
  114. ---------------------------------
  115. The platform firmware support for the power management of PCI devices is
  116. system-specific. However, if the system in question is compliant with the
  117. Advanced Configuration and Power Interface (ACPI) Specification, like the
  118. majority of x86-based systems, it is supposed to implement device power
  119. management interfaces defined by the ACPI standard.
  120. For this purpose the ACPI BIOS provides special functions called "control
  121. methods" that may be executed by the kernel to perform specific tasks, such as
  122. putting a device into a low-power state. These control methods are encoded
  123. using special byte-code language called the ACPI Machine Language (AML) and
  124. stored in the machine's BIOS. The kernel loads them from the BIOS and executes
  125. them as needed using an AML interpreter that translates the AML byte code into
  126. computations and memory or I/O space accesses. This way, in theory, a BIOS
  127. writer can provide the kernel with a means to perform actions depending
  128. on the system design in a system-specific fashion.
  129. ACPI control methods may be divided into global control methods, that are not
  130. associated with any particular devices, and device control methods, that have
  131. to be defined separately for each device supposed to be handled with the help of
  132. the platform. This means, in particular, that ACPI device control methods can
  133. only be used to handle devices that the BIOS writer knew about in advance. The
  134. ACPI methods used for device power management fall into that category.
  135. The ACPI specification assumes that devices can be in one of four power states
  136. labeled as D0, D1, D2, and D3 that roughly correspond to the native PCI PM
  137. D0-D3 states (although the difference between D3hot and D3cold is not taken
  138. into account by ACPI). Moreover, for each power state of a device there is a
  139. set of power resources that have to be enabled for the device to be put into
  140. that state. These power resources are controlled (i.e. enabled or disabled)
  141. with the help of their own control methods, _ON and _OFF, that have to be
  142. defined individually for each of them.
  143. To put a device into the ACPI power state Dx (where x is a number between 0 and
  144. 3 inclusive) the kernel is supposed to (1) enable the power resources required
  145. by the device in this state using their _ON control methods and (2) execute the
  146. _PSx control method defined for the device. In addition to that, if the device
  147. is going to be put into a low-power state (D1-D3) and is supposed to generate
  148. wakeup signals from that state, the _DSW (or _PSW, replaced with _DSW by ACPI
  149. 3.0) control method defined for it has to be executed before _PSx. Power
  150. resources that are not required by the device in the target power state and are
  151. not required any more by any other device should be disabled (by executing their
  152. _OFF control methods). If the current power state of the device is D3, it can
  153. only be put into D0 this way.
  154. However, quite often the power states of devices are changed during a
  155. system-wide transition into a sleep state or back into the working state. ACPI
  156. defines four system sleep states, S1, S2, S3, and S4, and denotes the system
  157. working state as S0. In general, the target system sleep (or working) state
  158. determines the highest power (lowest number) state the device can be put
  159. into and the kernel is supposed to obtain this information by executing the
  160. device's _SxD control method (where x is a number between 0 and 4 inclusive).
  161. If the device is required to wake up the system from the target sleep state, the
  162. lowest power (highest number) state it can be put into is also determined by the
  163. target state of the system. The kernel is then supposed to use the device's
  164. _SxW control method to obtain the number of that state. It also is supposed to
  165. use the device's _PRW control method to learn which power resources need to be
  166. enabled for the device to be able to generate wakeup signals.
  167. 1.4. Wakeup Signaling
  168. ---------------------
  169. Wakeup signals generated by PCI devices, either as native PCI PMEs, or as
  170. a result of the execution of the _DSW (or _PSW) ACPI control method before
  171. putting the device into a low-power state, have to be caught and handled as
  172. appropriate. If they are sent while the system is in the working state
  173. (ACPI S0), they should be translated into interrupts so that the kernel can
  174. put the devices generating them into the full-power state and take care of the
  175. events that triggered them. In turn, if they are sent while the system is
  176. sleeping, they should cause the system's core logic to trigger wakeup.
  177. On ACPI-based systems wakeup signals sent by conventional PCI devices are
  178. converted into ACPI General-Purpose Events (GPEs) which are hardware signals
  179. from the system core logic generated in response to various events that need to
  180. be acted upon. Every GPE is associated with one or more sources of potentially
  181. interesting events. In particular, a GPE may be associated with a PCI device
  182. capable of signaling wakeup. The information on the connections between GPEs
  183. and event sources is recorded in the system's ACPI BIOS from where it can be
  184. read by the kernel.
  185. If a PCI device known to the system's ACPI BIOS signals wakeup, the GPE
  186. associated with it (if there is one) is triggered. The GPEs associated with PCI
  187. bridges may also be triggered in response to a wakeup signal from one of the
  188. devices below the bridge (this also is the case for root bridges) and, for
  189. example, native PCI PMEs from devices unknown to the system's ACPI BIOS may be
  190. handled this way.
  191. A GPE may be triggered when the system is sleeping (i.e. when it is in one of
  192. the ACPI S1-S4 states), in which case system wakeup is started by its core logic
  193. (the device that was the source of the signal causing the system wakeup to occur
  194. may be identified later). The GPEs used in such situations are referred to as
  195. wakeup GPEs.
  196. Usually, however, GPEs are also triggered when the system is in the working
  197. state (ACPI S0) and in that case the system's core logic generates a System
  198. Control Interrupt (SCI) to notify the kernel of the event. Then, the SCI
  199. handler identifies the GPE that caused the interrupt to be generated which,
  200. in turn, allows the kernel to identify the source of the event (that may be
  201. a PCI device signaling wakeup). The GPEs used for notifying the kernel of
  202. events occurring while the system is in the working state are referred to as
  203. runtime GPEs.
  204. Unfortunately, there is no standard way of handling wakeup signals sent by
  205. conventional PCI devices on systems that are not ACPI-based, but there is one
  206. for PCI Express devices. Namely, the PCI Express Base Specification introduced
  207. a native mechanism for converting native PCI PMEs into interrupts generated by
  208. root ports. For conventional PCI devices native PMEs are out-of-band, so they
  209. are routed separately and they need not pass through bridges (in principle they
  210. may be routed directly to the system's core logic), but for PCI Express devices
  211. they are in-band messages that have to pass through the PCI Express hierarchy,
  212. including the root port on the path from the device to the Root Complex. Thus
  213. it was possible to introduce a mechanism by which a root port generates an
  214. interrupt whenever it receives a PME message from one of the devices below it.
  215. The PCI Express Requester ID of the device that sent the PME message is then
  216. recorded in one of the root port's configuration registers from where it may be
  217. read by the interrupt handler allowing the device to be identified. [PME
  218. messages sent by PCI Express endpoints integrated with the Root Complex don't
  219. pass through root ports, but instead they cause a Root Complex Event Collector
  220. (if there is one) to generate interrupts.]
  221. In principle the native PCI Express PME signaling may also be used on ACPI-based
  222. systems along with the GPEs, but to use it the kernel has to ask the system's
  223. ACPI BIOS to release control of root port configuration registers. The ACPI
  224. BIOS, however, is not required to allow the kernel to control these registers
  225. and if it doesn't do that, the kernel must not modify their contents. Of course
  226. the native PCI Express PME signaling cannot be used by the kernel in that case.
  227. 2. PCI Subsystem and Device Power Management
  228. ============================================
  229. 2.1. Device Power Management Callbacks
  230. --------------------------------------
  231. The PCI Subsystem participates in the power management of PCI devices in a
  232. number of ways. First of all, it provides an intermediate code layer between
  233. the device power management core (PM core) and PCI device drivers.
  234. Specifically, the pm field of the PCI subsystem's struct bus_type object,
  235. pci_bus_type, points to a struct dev_pm_ops object, pci_dev_pm_ops, containing
  236. pointers to several device power management callbacks::
  237. const struct dev_pm_ops pci_dev_pm_ops = {
  238. .prepare = pci_pm_prepare,
  239. .complete = pci_pm_complete,
  240. .suspend = pci_pm_suspend,
  241. .resume = pci_pm_resume,
  242. .freeze = pci_pm_freeze,
  243. .thaw = pci_pm_thaw,
  244. .poweroff = pci_pm_poweroff,
  245. .restore = pci_pm_restore,
  246. .suspend_noirq = pci_pm_suspend_noirq,
  247. .resume_noirq = pci_pm_resume_noirq,
  248. .freeze_noirq = pci_pm_freeze_noirq,
  249. .thaw_noirq = pci_pm_thaw_noirq,
  250. .poweroff_noirq = pci_pm_poweroff_noirq,
  251. .restore_noirq = pci_pm_restore_noirq,
  252. .runtime_suspend = pci_pm_runtime_suspend,
  253. .runtime_resume = pci_pm_runtime_resume,
  254. .runtime_idle = pci_pm_runtime_idle,
  255. };
  256. These callbacks are executed by the PM core in various situations related to
  257. device power management and they, in turn, execute power management callbacks
  258. provided by PCI device drivers. They also perform power management operations
  259. involving some standard configuration registers of PCI devices that device
  260. drivers need not know or care about.
  261. The structure representing a PCI device, struct pci_dev, contains several fields
  262. that these callbacks operate on::
  263. struct pci_dev {
  264. ...
  265. pci_power_t current_state; /* Current operating state. */
  266. int pm_cap; /* PM capability offset in the
  267. configuration space */
  268. unsigned int pme_support:5; /* Bitmask of states from which PME#
  269. can be generated */
  270. unsigned int pme_interrupt:1;/* Is native PCIe PME signaling used? */
  271. unsigned int d1_support:1; /* Low power state D1 is supported */
  272. unsigned int d2_support:1; /* Low power state D2 is supported */
  273. unsigned int no_d1d2:1; /* D1 and D2 are forbidden */
  274. unsigned int wakeup_prepared:1; /* Device prepared for wake up */
  275. unsigned int d3hot_delay; /* D3hot->D0 transition time in ms */
  276. ...
  277. };
  278. They also indirectly use some fields of the struct device that is embedded in
  279. struct pci_dev.
  280. 2.2. Device Initialization
  281. --------------------------
  282. The PCI subsystem's first task related to device power management is to
  283. prepare the device for power management and initialize the fields of struct
  284. pci_dev used for this purpose. This happens in two functions defined in
  285. drivers/pci/pci.c, pci_pm_init() and platform_pci_wakeup_init().
  286. The first of these functions checks if the device supports native PCI PM
  287. and if that's the case the offset of its power management capability structure
  288. in the configuration space is stored in the pm_cap field of the device's struct
  289. pci_dev object. Next, the function checks which PCI low-power states are
  290. supported by the device and from which low-power states the device can generate
  291. native PCI PMEs. The power management fields of the device's struct pci_dev and
  292. the struct device embedded in it are updated accordingly and the generation of
  293. PMEs by the device is disabled.
  294. The second function checks if the device can be prepared to signal wakeup with
  295. the help of the platform firmware, such as the ACPI BIOS. If that is the case,
  296. the function updates the wakeup fields in struct device embedded in the
  297. device's struct pci_dev and uses the firmware-provided method to prevent the
  298. device from signaling wakeup.
  299. At this point the device is ready for power management. For driverless devices,
  300. however, this functionality is limited to a few basic operations carried out
  301. during system-wide transitions to a sleep state and back to the working state.
  302. 2.3. Runtime Device Power Management
  303. ------------------------------------
  304. The PCI subsystem plays a vital role in the runtime power management of PCI
  305. devices. For this purpose it uses the general runtime power management
  306. (runtime PM) framework described in Documentation/power/runtime_pm.rst.
  307. Namely, it provides subsystem-level callbacks::
  308. pci_pm_runtime_suspend()
  309. pci_pm_runtime_resume()
  310. pci_pm_runtime_idle()
  311. that are executed by the core runtime PM routines. It also implements the
  312. entire mechanics necessary for handling runtime wakeup signals from PCI devices
  313. in low-power states, which at the time of this writing works for both the native
  314. PCI Express PME signaling and the ACPI GPE-based wakeup signaling described in
  315. Section 1.
  316. First, a PCI device is put into a low-power state, or suspended, with the help
  317. of pm_schedule_suspend() or pm_runtime_suspend() which for PCI devices call
  318. pci_pm_runtime_suspend() to do the actual job. For this to work, the device's
  319. driver has to provide a pm->runtime_suspend() callback (see below), which is
  320. run by pci_pm_runtime_suspend() as the first action. If the driver's callback
  321. returns successfully, the device's standard configuration registers are saved,
  322. the device is prepared to generate wakeup signals and, finally, it is put into
  323. the target low-power state.
  324. The low-power state to put the device into is the lowest-power (highest number)
  325. state from which it can signal wakeup. The exact method of signaling wakeup is
  326. system-dependent and is determined by the PCI subsystem on the basis of the
  327. reported capabilities of the device and the platform firmware. To prepare the
  328. device for signaling wakeup and put it into the selected low-power state, the
  329. PCI subsystem can use the platform firmware as well as the device's native PCI
  330. PM capabilities, if supported.
  331. It is expected that the device driver's pm->runtime_suspend() callback will
  332. not attempt to prepare the device for signaling wakeup or to put it into a
  333. low-power state. The driver ought to leave these tasks to the PCI subsystem
  334. that has all of the information necessary to perform them.
  335. A suspended device is brought back into the "active" state, or resumed,
  336. with the help of pm_request_resume() or pm_runtime_resume() which both call
  337. pci_pm_runtime_resume() for PCI devices. Again, this only works if the device's
  338. driver provides a pm->runtime_resume() callback (see below). However, before
  339. the driver's callback is executed, pci_pm_runtime_resume() brings the device
  340. back into the full-power state, prevents it from signaling wakeup while in that
  341. state and restores its standard configuration registers. Thus the driver's
  342. callback need not worry about the PCI-specific aspects of the device resume.
  343. Note that generally pci_pm_runtime_resume() may be called in two different
  344. situations. First, it may be called at the request of the device's driver, for
  345. example if there are some data for it to process. Second, it may be called
  346. as a result of a wakeup signal from the device itself (this sometimes is
  347. referred to as "remote wakeup"). Of course, for this purpose the wakeup signal
  348. is handled in one of the ways described in Section 1 and finally converted into
  349. a notification for the PCI subsystem after the source device has been
  350. identified.
  351. The pci_pm_runtime_idle() function, called for PCI devices by pm_runtime_idle()
  352. and pm_request_idle(), executes the device driver's pm->runtime_idle()
  353. callback, if defined, and if that callback doesn't return error code (or is not
  354. present at all), suspends the device with the help of pm_runtime_suspend().
  355. Sometimes pci_pm_runtime_idle() is called automatically by the PM core (for
  356. example, it is called right after the device has just been resumed), in which
  357. cases it is expected to suspend the device if that makes sense. Usually,
  358. however, the PCI subsystem doesn't really know if the device really can be
  359. suspended, so it lets the device's driver decide by running its
  360. pm->runtime_idle() callback.
  361. 2.4. System-Wide Power Transitions
  362. ----------------------------------
  363. There are a few different types of system-wide power transitions, described in
  364. Documentation/driver-api/pm/devices.rst. Each of them requires devices to be
  365. handled in a specific way and the PM core executes subsystem-level power
  366. management callbacks for this purpose. They are executed in phases such that
  367. each phase involves executing the same subsystem-level callback for every device
  368. belonging to the given subsystem before the next phase begins. These phases
  369. always run after tasks have been frozen.
  370. 2.4.1. System Suspend
  371. ^^^^^^^^^^^^^^^^^^^^^
  372. When the system is going into a sleep state in which the contents of memory will
  373. be preserved, such as one of the ACPI sleep states S1-S3, the phases are:
  374. prepare, suspend, suspend_noirq.
  375. The following PCI bus type's callbacks, respectively, are used in these phases::
  376. pci_pm_prepare()
  377. pci_pm_suspend()
  378. pci_pm_suspend_noirq()
  379. The pci_pm_prepare() routine first puts the device into the "fully functional"
  380. state with the help of pm_runtime_resume(). Then, it executes the device
  381. driver's pm->prepare() callback if defined (i.e. if the driver's struct
  382. dev_pm_ops object is present and the prepare pointer in that object is valid).
  383. The pci_pm_suspend() routine first checks if the device's driver implements
  384. legacy PCI suspend routines (see Section 3), in which case the driver's legacy
  385. suspend callback is executed, if present, and its result is returned. Next, if
  386. the device's driver doesn't provide a struct dev_pm_ops object (containing
  387. pointers to the driver's callbacks), pci_pm_default_suspend() is called, which
  388. simply turns off the device's bus master capability and runs
  389. pcibios_disable_device() to disable it, unless the device is a bridge (PCI
  390. bridges are ignored by this routine). Next, the device driver's pm->suspend()
  391. callback is executed, if defined, and its result is returned if it fails.
  392. Finally, pci_fixup_device() is called to apply hardware suspend quirks related
  393. to the device if necessary.
  394. Note that the suspend phase is carried out asynchronously for PCI devices, so
  395. the pci_pm_suspend() callback may be executed in parallel for any pair of PCI
  396. devices that don't depend on each other in a known way (i.e. none of the paths
  397. in the device tree from the root bridge to a leaf device contains both of them).
  398. The pci_pm_suspend_noirq() routine is executed after suspend_device_irqs() has
  399. been called, which means that the device driver's interrupt handler won't be
  400. invoked while this routine is running. It first checks if the device's driver
  401. implements legacy PCI suspends routines (Section 3), in which case the legacy
  402. late suspend routine is called and its result is returned (the standard
  403. configuration registers of the device are saved if the driver's callback hasn't
  404. done that). Second, if the device driver's struct dev_pm_ops object is not
  405. present, the device's standard configuration registers are saved and the routine
  406. returns success. Otherwise the device driver's pm->suspend_noirq() callback is
  407. executed, if present, and its result is returned if it fails. Next, if the
  408. device's standard configuration registers haven't been saved yet (one of the
  409. device driver's callbacks executed before might do that), pci_pm_suspend_noirq()
  410. saves them, prepares the device to signal wakeup (if necessary) and puts it into
  411. a low-power state.
  412. The low-power state to put the device into is the lowest-power (highest number)
  413. state from which it can signal wakeup while the system is in the target sleep
  414. state. Just like in the runtime PM case described above, the mechanism of
  415. signaling wakeup is system-dependent and determined by the PCI subsystem, which
  416. is also responsible for preparing the device to signal wakeup from the system's
  417. target sleep state as appropriate.
  418. PCI device drivers (that don't implement legacy power management callbacks) are
  419. generally not expected to prepare devices for signaling wakeup or to put them
  420. into low-power states. However, if one of the driver's suspend callbacks
  421. (pm->suspend() or pm->suspend_noirq()) saves the device's standard configuration
  422. registers, pci_pm_suspend_noirq() will assume that the device has been prepared
  423. to signal wakeup and put into a low-power state by the driver (the driver is
  424. then assumed to have used the helper functions provided by the PCI subsystem for
  425. this purpose). PCI device drivers are not encouraged to do that, but in some
  426. rare cases doing that in the driver may be the optimum approach.
  427. 2.4.2. System Resume
  428. ^^^^^^^^^^^^^^^^^^^^
  429. When the system is undergoing a transition from a sleep state in which the
  430. contents of memory have been preserved, such as one of the ACPI sleep states
  431. S1-S3, into the working state (ACPI S0), the phases are:
  432. resume_noirq, resume, complete.
  433. The following PCI bus type's callbacks, respectively, are executed in these
  434. phases::
  435. pci_pm_resume_noirq()
  436. pci_pm_resume()
  437. pci_pm_complete()
  438. The pci_pm_resume_noirq() routine first puts the device into the full-power
  439. state, restores its standard configuration registers and applies early resume
  440. hardware quirks related to the device, if necessary. This is done
  441. unconditionally, regardless of whether or not the device's driver implements
  442. legacy PCI power management callbacks (this way all PCI devices are in the
  443. full-power state and their standard configuration registers have been restored
  444. when their interrupt handlers are invoked for the first time during resume,
  445. which allows the kernel to avoid problems with the handling of shared interrupts
  446. by drivers whose devices are still suspended). If legacy PCI power management
  447. callbacks (see Section 3) are implemented by the device's driver, the legacy
  448. early resume callback is executed and its result is returned. Otherwise, the
  449. device driver's pm->resume_noirq() callback is executed, if defined, and its
  450. result is returned.
  451. The pci_pm_resume() routine first checks if the device's standard configuration
  452. registers have been restored and restores them if that's not the case (this
  453. only is necessary in the error path during a failing suspend). Next, resume
  454. hardware quirks related to the device are applied, if necessary, and if the
  455. device's driver implements legacy PCI power management callbacks (see
  456. Section 3), the driver's legacy resume callback is executed and its result is
  457. returned. Otherwise, the device's wakeup signaling mechanisms are blocked and
  458. its driver's pm->resume() callback is executed, if defined (the callback's
  459. result is then returned).
  460. The resume phase is carried out asynchronously for PCI devices, like the
  461. suspend phase described above, which means that if two PCI devices don't depend
  462. on each other in a known way, the pci_pm_resume() routine may be executed for
  463. the both of them in parallel.
  464. The pci_pm_complete() routine only executes the device driver's pm->complete()
  465. callback, if defined.
  466. 2.4.3. System Hibernation
  467. ^^^^^^^^^^^^^^^^^^^^^^^^^
  468. System hibernation is more complicated than system suspend, because it requires
  469. a system image to be created and written into a persistent storage medium. The
  470. image is created atomically and all devices are quiesced, or frozen, before that
  471. happens.
  472. The freezing of devices is carried out after enough memory has been freed (at
  473. the time of this writing the image creation requires at least 50% of system RAM
  474. to be free) in the following three phases:
  475. prepare, freeze, freeze_noirq
  476. that correspond to the PCI bus type's callbacks::
  477. pci_pm_prepare()
  478. pci_pm_freeze()
  479. pci_pm_freeze_noirq()
  480. This means that the prepare phase is exactly the same as for system suspend.
  481. The other two phases, however, are different.
  482. The pci_pm_freeze() routine is quite similar to pci_pm_suspend(), but it runs
  483. the device driver's pm->freeze() callback, if defined, instead of pm->suspend(),
  484. and it doesn't apply the suspend-related hardware quirks. It is executed
  485. asynchronously for different PCI devices that don't depend on each other in a
  486. known way.
  487. The pci_pm_freeze_noirq() routine, in turn, is similar to
  488. pci_pm_suspend_noirq(), but it calls the device driver's pm->freeze_noirq()
  489. routine instead of pm->suspend_noirq(). It also doesn't attempt to prepare the
  490. device for signaling wakeup and put it into a low-power state. Still, it saves
  491. the device's standard configuration registers if they haven't been saved by one
  492. of the driver's callbacks.
  493. Once the image has been created, it has to be saved. However, at this point all
  494. devices are frozen and they cannot handle I/O, while their ability to handle
  495. I/O is obviously necessary for the image saving. Thus they have to be brought
  496. back to the fully functional state and this is done in the following phases:
  497. thaw_noirq, thaw, complete
  498. using the following PCI bus type's callbacks::
  499. pci_pm_thaw_noirq()
  500. pci_pm_thaw()
  501. pci_pm_complete()
  502. respectively.
  503. The first of them, pci_pm_thaw_noirq(), is analogous to pci_pm_resume_noirq().
  504. It puts the device into the full power state and restores its standard
  505. configuration registers. It also executes the device driver's pm->thaw_noirq()
  506. callback, if defined, instead of pm->resume_noirq().
  507. The pci_pm_thaw() routine is similar to pci_pm_resume(), but it runs the device
  508. driver's pm->thaw() callback instead of pm->resume(). It is executed
  509. asynchronously for different PCI devices that don't depend on each other in a
  510. known way.
  511. The complete phase is the same as for system resume.
  512. After saving the image, devices need to be powered down before the system can
  513. enter the target sleep state (ACPI S4 for ACPI-based systems). This is done in
  514. three phases:
  515. prepare, poweroff, poweroff_noirq
  516. where the prepare phase is exactly the same as for system suspend. The other
  517. two phases are analogous to the suspend and suspend_noirq phases, respectively.
  518. The PCI subsystem-level callbacks they correspond to::
  519. pci_pm_poweroff()
  520. pci_pm_poweroff_noirq()
  521. work in analogy with pci_pm_suspend() and pci_pm_poweroff_noirq(), respectively,
  522. although they don't attempt to save the device's standard configuration
  523. registers.
  524. 2.4.4. System Restore
  525. ^^^^^^^^^^^^^^^^^^^^^
  526. System restore requires a hibernation image to be loaded into memory and the
  527. pre-hibernation memory contents to be restored before the pre-hibernation system
  528. activity can be resumed.
  529. As described in Documentation/driver-api/pm/devices.rst, the hibernation image
  530. is loaded into memory by a fresh instance of the kernel, called the boot kernel,
  531. which in turn is loaded and run by a boot loader in the usual way. After the
  532. boot kernel has loaded the image, it needs to replace its own code and data with
  533. the code and data of the "hibernated" kernel stored within the image, called the
  534. image kernel. For this purpose all devices are frozen just like before creating
  535. the image during hibernation, in the
  536. prepare, freeze, freeze_noirq
  537. phases described above. However, the devices affected by these phases are only
  538. those having drivers in the boot kernel; other devices will still be in whatever
  539. state the boot loader left them.
  540. Should the restoration of the pre-hibernation memory contents fail, the boot
  541. kernel would go through the "thawing" procedure described above, using the
  542. thaw_noirq, thaw, and complete phases (that will only affect the devices having
  543. drivers in the boot kernel), and then continue running normally.
  544. If the pre-hibernation memory contents are restored successfully, which is the
  545. usual situation, control is passed to the image kernel, which then becomes
  546. responsible for bringing the system back to the working state. To achieve this,
  547. it must restore the devices' pre-hibernation functionality, which is done much
  548. like waking up from the memory sleep state, although it involves different
  549. phases:
  550. restore_noirq, restore, complete
  551. The first two of these are analogous to the resume_noirq and resume phases
  552. described above, respectively, and correspond to the following PCI subsystem
  553. callbacks::
  554. pci_pm_restore_noirq()
  555. pci_pm_restore()
  556. These callbacks work in analogy with pci_pm_resume_noirq() and pci_pm_resume(),
  557. respectively, but they execute the device driver's pm->restore_noirq() and
  558. pm->restore() callbacks, if available.
  559. The complete phase is carried out in exactly the same way as during system
  560. resume.
  561. 3. PCI Device Drivers and Power Management
  562. ==========================================
  563. 3.1. Power Management Callbacks
  564. -------------------------------
  565. PCI device drivers participate in power management by providing callbacks to be
  566. executed by the PCI subsystem's power management routines described above and by
  567. controlling the runtime power management of their devices.
  568. At the time of this writing there are two ways to define power management
  569. callbacks for a PCI device driver, the recommended one, based on using a
  570. dev_pm_ops structure described in Documentation/driver-api/pm/devices.rst, and
  571. the "legacy" one, in which the .suspend() and .resume() callbacks from struct
  572. pci_driver are used. The legacy approach, however, doesn't allow one to define
  573. runtime power management callbacks and is not really suitable for any new
  574. drivers. Therefore it is not covered by this document (refer to the source code
  575. to learn more about it).
  576. It is recommended that all PCI device drivers define a struct dev_pm_ops object
  577. containing pointers to power management (PM) callbacks that will be executed by
  578. the PCI subsystem's PM routines in various circumstances. A pointer to the
  579. driver's struct dev_pm_ops object has to be assigned to the driver.pm field in
  580. its struct pci_driver object. Once that has happened, the "legacy" PM callbacks
  581. in struct pci_driver are ignored (even if they are not NULL).
  582. The PM callbacks in struct dev_pm_ops are not mandatory and if they are not
  583. defined (i.e. the respective fields of struct dev_pm_ops are unset) the PCI
  584. subsystem will handle the device in a simplified default manner. If they are
  585. defined, though, they are expected to behave as described in the following
  586. subsections.
  587. 3.1.1. prepare()
  588. ^^^^^^^^^^^^^^^^
  589. The prepare() callback is executed during system suspend, during hibernation
  590. (when a hibernation image is about to be created), during power-off after
  591. saving a hibernation image and during system restore, when a hibernation image
  592. has just been loaded into memory.
  593. This callback is only necessary if the driver's device has children that in
  594. general may be registered at any time. In that case the role of the prepare()
  595. callback is to prevent new children of the device from being registered until
  596. one of the resume_noirq(), thaw_noirq(), or restore_noirq() callbacks is run.
  597. In addition to that the prepare() callback may carry out some operations
  598. preparing the device to be suspended, although it should not allocate memory
  599. (if additional memory is required to suspend the device, it has to be
  600. preallocated earlier, for example in a suspend/hibernate notifier as described
  601. in Documentation/driver-api/pm/notifiers.rst).
  602. 3.1.2. suspend()
  603. ^^^^^^^^^^^^^^^^
  604. The suspend() callback is only executed during system suspend, after prepare()
  605. callbacks have been executed for all devices in the system.
  606. This callback is expected to quiesce the device and prepare it to be put into a
  607. low-power state by the PCI subsystem. It is not required (in fact it even is
  608. not recommended) that a PCI driver's suspend() callback save the standard
  609. configuration registers of the device, prepare it for waking up the system, or
  610. put it into a low-power state. All of these operations can very well be taken
  611. care of by the PCI subsystem, without the driver's participation.
  612. However, in some rare case it is convenient to carry out these operations in
  613. a PCI driver. Then, pci_save_state(), pci_prepare_to_sleep(), and
  614. pci_set_power_state() should be used to save the device's standard configuration
  615. registers, to prepare it for system wakeup (if necessary), and to put it into a
  616. low-power state, respectively. Moreover, if the driver calls pci_save_state(),
  617. the PCI subsystem will not execute either pci_prepare_to_sleep(), or
  618. pci_set_power_state() for its device, so the driver is then responsible for
  619. handling the device as appropriate.
  620. While the suspend() callback is being executed, the driver's interrupt handler
  621. can be invoked to handle an interrupt from the device, so all suspend-related
  622. operations relying on the driver's ability to handle interrupts should be
  623. carried out in this callback.
  624. 3.1.3. suspend_noirq()
  625. ^^^^^^^^^^^^^^^^^^^^^^
  626. The suspend_noirq() callback is only executed during system suspend, after
  627. suspend() callbacks have been executed for all devices in the system and
  628. after device interrupts have been disabled by the PM core.
  629. The difference between suspend_noirq() and suspend() is that the driver's
  630. interrupt handler will not be invoked while suspend_noirq() is running. Thus
  631. suspend_noirq() can carry out operations that would cause race conditions to
  632. arise if they were performed in suspend().
  633. 3.1.4. freeze()
  634. ^^^^^^^^^^^^^^^
  635. The freeze() callback is hibernation-specific and is executed in two situations,
  636. during hibernation, after prepare() callbacks have been executed for all devices
  637. in preparation for the creation of a system image, and during restore,
  638. after a system image has been loaded into memory from persistent storage and the
  639. prepare() callbacks have been executed for all devices.
  640. The role of this callback is analogous to the role of the suspend() callback
  641. described above. In fact, they only need to be different in the rare cases when
  642. the driver takes the responsibility for putting the device into a low-power
  643. state.
  644. In that cases the freeze() callback should not prepare the device system wakeup
  645. or put it into a low-power state. Still, either it or freeze_noirq() should
  646. save the device's standard configuration registers using pci_save_state().
  647. 3.1.5. freeze_noirq()
  648. ^^^^^^^^^^^^^^^^^^^^^
  649. The freeze_noirq() callback is hibernation-specific. It is executed during
  650. hibernation, after prepare() and freeze() callbacks have been executed for all
  651. devices in preparation for the creation of a system image, and during restore,
  652. after a system image has been loaded into memory and after prepare() and
  653. freeze() callbacks have been executed for all devices. It is always executed
  654. after device interrupts have been disabled by the PM core.
  655. The role of this callback is analogous to the role of the suspend_noirq()
  656. callback described above and it very rarely is necessary to define
  657. freeze_noirq().
  658. The difference between freeze_noirq() and freeze() is analogous to the
  659. difference between suspend_noirq() and suspend().
  660. 3.1.6. poweroff()
  661. ^^^^^^^^^^^^^^^^^
  662. The poweroff() callback is hibernation-specific. It is executed when the system
  663. is about to be powered off after saving a hibernation image to a persistent
  664. storage. prepare() callbacks are executed for all devices before poweroff() is
  665. called.
  666. The role of this callback is analogous to the role of the suspend() and freeze()
  667. callbacks described above, although it does not need to save the contents of
  668. the device's registers. In particular, if the driver wants to put the device
  669. into a low-power state itself instead of allowing the PCI subsystem to do that,
  670. the poweroff() callback should use pci_prepare_to_sleep() and
  671. pci_set_power_state() to prepare the device for system wakeup and to put it
  672. into a low-power state, respectively, but it need not save the device's standard
  673. configuration registers.
  674. 3.1.7. poweroff_noirq()
  675. ^^^^^^^^^^^^^^^^^^^^^^^
  676. The poweroff_noirq() callback is hibernation-specific. It is executed after
  677. poweroff() callbacks have been executed for all devices in the system.
  678. The role of this callback is analogous to the role of the suspend_noirq() and
  679. freeze_noirq() callbacks described above, but it does not need to save the
  680. contents of the device's registers.
  681. The difference between poweroff_noirq() and poweroff() is analogous to the
  682. difference between suspend_noirq() and suspend().
  683. 3.1.8. resume_noirq()
  684. ^^^^^^^^^^^^^^^^^^^^^
  685. The resume_noirq() callback is only executed during system resume, after the
  686. PM core has enabled the non-boot CPUs. The driver's interrupt handler will not
  687. be invoked while resume_noirq() is running, so this callback can carry out
  688. operations that might race with the interrupt handler.
  689. Since the PCI subsystem unconditionally puts all devices into the full power
  690. state in the resume_noirq phase of system resume and restores their standard
  691. configuration registers, resume_noirq() is usually not necessary. In general
  692. it should only be used for performing operations that would lead to race
  693. conditions if carried out by resume().
  694. 3.1.9. resume()
  695. ^^^^^^^^^^^^^^^
  696. The resume() callback is only executed during system resume, after
  697. resume_noirq() callbacks have been executed for all devices in the system and
  698. device interrupts have been enabled by the PM core.
  699. This callback is responsible for restoring the pre-suspend configuration of the
  700. device and bringing it back to the fully functional state. The device should be
  701. able to process I/O in a usual way after resume() has returned.
  702. 3.1.10. thaw_noirq()
  703. ^^^^^^^^^^^^^^^^^^^^
  704. The thaw_noirq() callback is hibernation-specific. It is executed after a
  705. system image has been created and the non-boot CPUs have been enabled by the PM
  706. core, in the thaw_noirq phase of hibernation. It also may be executed if the
  707. loading of a hibernation image fails during system restore (it is then executed
  708. after enabling the non-boot CPUs). The driver's interrupt handler will not be
  709. invoked while thaw_noirq() is running.
  710. The role of this callback is analogous to the role of resume_noirq(). The
  711. difference between these two callbacks is that thaw_noirq() is executed after
  712. freeze() and freeze_noirq(), so in general it does not need to modify the
  713. contents of the device's registers.
  714. 3.1.11. thaw()
  715. ^^^^^^^^^^^^^^
  716. The thaw() callback is hibernation-specific. It is executed after thaw_noirq()
  717. callbacks have been executed for all devices in the system and after device
  718. interrupts have been enabled by the PM core.
  719. This callback is responsible for restoring the pre-freeze configuration of
  720. the device, so that it will work in a usual way after thaw() has returned.
  721. 3.1.12. restore_noirq()
  722. ^^^^^^^^^^^^^^^^^^^^^^^
  723. The restore_noirq() callback is hibernation-specific. It is executed in the
  724. restore_noirq phase of hibernation, when the boot kernel has passed control to
  725. the image kernel and the non-boot CPUs have been enabled by the image kernel's
  726. PM core.
  727. This callback is analogous to resume_noirq() with the exception that it cannot
  728. make any assumption on the previous state of the device, even if the BIOS (or
  729. generally the platform firmware) is known to preserve that state over a
  730. suspend-resume cycle.
  731. For the vast majority of PCI device drivers there is no difference between
  732. resume_noirq() and restore_noirq().
  733. 3.1.13. restore()
  734. ^^^^^^^^^^^^^^^^^
  735. The restore() callback is hibernation-specific. It is executed after
  736. restore_noirq() callbacks have been executed for all devices in the system and
  737. after the PM core has enabled device drivers' interrupt handlers to be invoked.
  738. This callback is analogous to resume(), just like restore_noirq() is analogous
  739. to resume_noirq(). Consequently, the difference between restore_noirq() and
  740. restore() is analogous to the difference between resume_noirq() and resume().
  741. For the vast majority of PCI device drivers there is no difference between
  742. resume() and restore().
  743. 3.1.14. complete()
  744. ^^^^^^^^^^^^^^^^^^
  745. The complete() callback is executed in the following situations:
  746. - during system resume, after resume() callbacks have been executed for all
  747. devices,
  748. - during hibernation, before saving the system image, after thaw() callbacks
  749. have been executed for all devices,
  750. - during system restore, when the system is going back to its pre-hibernation
  751. state, after restore() callbacks have been executed for all devices.
  752. It also may be executed if the loading of a hibernation image into memory fails
  753. (in that case it is run after thaw() callbacks have been executed for all
  754. devices that have drivers in the boot kernel).
  755. This callback is entirely optional, although it may be necessary if the
  756. prepare() callback performs operations that need to be reversed.
  757. 3.1.15. runtime_suspend()
  758. ^^^^^^^^^^^^^^^^^^^^^^^^^
  759. The runtime_suspend() callback is specific to device runtime power management
  760. (runtime PM). It is executed by the PM core's runtime PM framework when the
  761. device is about to be suspended (i.e. quiesced and put into a low-power state)
  762. at run time.
  763. This callback is responsible for freezing the device and preparing it to be
  764. put into a low-power state, but it must allow the PCI subsystem to perform all
  765. of the PCI-specific actions necessary for suspending the device.
  766. 3.1.16. runtime_resume()
  767. ^^^^^^^^^^^^^^^^^^^^^^^^
  768. The runtime_resume() callback is specific to device runtime PM. It is executed
  769. by the PM core's runtime PM framework when the device is about to be resumed
  770. (i.e. put into the full-power state and programmed to process I/O normally) at
  771. run time.
  772. This callback is responsible for restoring the normal functionality of the
  773. device after it has been put into the full-power state by the PCI subsystem.
  774. The device is expected to be able to process I/O in the usual way after
  775. runtime_resume() has returned.
  776. 3.1.17. runtime_idle()
  777. ^^^^^^^^^^^^^^^^^^^^^^
  778. The runtime_idle() callback is specific to device runtime PM. It is executed
  779. by the PM core's runtime PM framework whenever it may be desirable to suspend
  780. the device according to the PM core's information. In particular, it is
  781. automatically executed right after runtime_resume() has returned in case the
  782. resume of the device has happened as a result of a spurious event.
  783. This callback is optional, but if it is not implemented or if it returns 0, the
  784. PCI subsystem will call pm_runtime_suspend() for the device, which in turn will
  785. cause the driver's runtime_suspend() callback to be executed.
  786. 3.1.18. Pointing Multiple Callback Pointers to One Routine
  787. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  788. Although in principle each of the callbacks described in the previous
  789. subsections can be defined as a separate function, it often is convenient to
  790. point two or more members of struct dev_pm_ops to the same routine. There are
  791. a few convenience macros that can be used for this purpose.
  792. The SIMPLE_DEV_PM_OPS macro declares a struct dev_pm_ops object with one
  793. suspend routine pointed to by the .suspend(), .freeze(), and .poweroff()
  794. members and one resume routine pointed to by the .resume(), .thaw(), and
  795. .restore() members. The other function pointers in this struct dev_pm_ops are
  796. unset.
  797. The UNIVERSAL_DEV_PM_OPS macro is similar to SIMPLE_DEV_PM_OPS, but it
  798. additionally sets the .runtime_resume() pointer to the same value as
  799. .resume() (and .thaw(), and .restore()) and the .runtime_suspend() pointer to
  800. the same value as .suspend() (and .freeze() and .poweroff()).
  801. The SET_SYSTEM_SLEEP_PM_OPS can be used inside of a declaration of struct
  802. dev_pm_ops to indicate that one suspend routine is to be pointed to by the
  803. .suspend(), .freeze(), and .poweroff() members and one resume routine is to
  804. be pointed to by the .resume(), .thaw(), and .restore() members.
  805. 3.1.19. Driver Flags for Power Management
  806. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  807. The PM core allows device drivers to set flags that influence the handling of
  808. power management for the devices by the core itself and by middle layer code
  809. including the PCI bus type. The flags should be set once at the driver probe
  810. time with the help of the dev_pm_set_driver_flags() function and they should not
  811. be updated directly afterwards.
  812. The DPM_FLAG_NO_DIRECT_COMPLETE flag prevents the PM core from using the
  813. direct-complete mechanism allowing device suspend/resume callbacks to be skipped
  814. if the device is in runtime suspend when the system suspend starts. That also
  815. affects all of the ancestors of the device, so this flag should only be used if
  816. absolutely necessary.
  817. The DPM_FLAG_SMART_PREPARE flag causes the PCI bus type to return a positive
  818. value from pci_pm_prepare() only if the ->prepare callback provided by the
  819. driver of the device returns a positive value. That allows the driver to opt
  820. out from using the direct-complete mechanism dynamically (whereas setting
  821. DPM_FLAG_NO_DIRECT_COMPLETE means permanent opt-out).
  822. The DPM_FLAG_SMART_SUSPEND flag tells the PCI bus type that from the driver's
  823. perspective the device can be safely left in runtime suspend during system
  824. suspend. That causes pci_pm_suspend(), pci_pm_freeze() and pci_pm_poweroff()
  825. to avoid resuming the device from runtime suspend unless there are PCI-specific
  826. reasons for doing that. Also, it causes pci_pm_suspend_late/noirq() and
  827. pci_pm_poweroff_late/noirq() to return early if the device remains in runtime
  828. suspend during the "late" phase of the system-wide transition under way.
  829. Moreover, if the device is in runtime suspend in pci_pm_resume_noirq() or
  830. pci_pm_restore_noirq(), its runtime PM status will be changed to "active" (as it
  831. is going to be put into D0 going forward).
  832. Setting the DPM_FLAG_MAY_SKIP_RESUME flag means that the driver allows its
  833. "noirq" and "early" resume callbacks to be skipped if the device can be left
  834. in suspend after a system-wide transition into the working state. This flag is
  835. taken into consideration by the PM core along with the power.may_skip_resume
  836. status bit of the device which is set by pci_pm_suspend_noirq() in certain
  837. situations. If the PM core determines that the driver's "noirq" and "early"
  838. resume callbacks should be skipped, the dev_pm_skip_resume() helper function
  839. will return "true" and that will cause pci_pm_resume_noirq() and
  840. pci_pm_resume_early() to return upfront without touching the device and
  841. executing the driver callbacks.
  842. 3.2. Device Runtime Power Management
  843. ------------------------------------
  844. In addition to providing device power management callbacks PCI device drivers
  845. are responsible for controlling the runtime power management (runtime PM) of
  846. their devices.
  847. The PCI device runtime PM is optional, but it is recommended that PCI device
  848. drivers implement it at least in the cases where there is a reliable way of
  849. verifying that the device is not used (like when the network cable is detached
  850. from an Ethernet adapter or there are no devices attached to a USB controller).
  851. To support the PCI runtime PM the driver first needs to implement the
  852. runtime_suspend() and runtime_resume() callbacks. It also may need to implement
  853. the runtime_idle() callback to prevent the device from being suspended again
  854. every time right after the runtime_resume() callback has returned
  855. (alternatively, the runtime_suspend() callback will have to check if the
  856. device should really be suspended and return -EAGAIN if that is not the case).
  857. The runtime PM of PCI devices is enabled by default by the PCI core. PCI
  858. device drivers do not need to enable it and should not attempt to do so.
  859. However, it is blocked by pci_pm_init() that runs the pm_runtime_forbid()
  860. helper function. In addition to that, the runtime PM usage counter of
  861. each PCI device is incremented by local_pci_probe() before executing the
  862. probe callback provided by the device's driver.
  863. If a PCI driver implements the runtime PM callbacks and intends to use the
  864. runtime PM framework provided by the PM core and the PCI subsystem, it needs
  865. to decrement the device's runtime PM usage counter in its probe callback
  866. function. If it doesn't do that, the counter will always be different from
  867. zero for the device and it will never be runtime-suspended. The simplest
  868. way to do that is by calling pm_runtime_put_noidle(), but if the driver
  869. wants to schedule an autosuspend right away, for example, it may call
  870. pm_runtime_put_autosuspend() instead for this purpose. Generally, it
  871. just needs to call a function that decrements the devices usage counter
  872. from its probe routine to make runtime PM work for the device.
  873. It is important to remember that the driver's runtime_suspend() callback
  874. may be executed right after the usage counter has been decremented, because
  875. user space may already have caused the pm_runtime_allow() helper function
  876. unblocking the runtime PM of the device to run via sysfs, so the driver must
  877. be prepared to cope with that.
  878. The driver itself should not call pm_runtime_allow(), though. Instead, it
  879. should let user space or some platform-specific code do that (user space can
  880. do it via sysfs as stated above), but it must be prepared to handle the
  881. runtime PM of the device correctly as soon as pm_runtime_allow() is called
  882. (which may happen at any time, even before the driver is loaded).
  883. When the driver's remove callback runs, it has to balance the decrementation
  884. of the device's runtime PM usage counter at the probe time. For this reason,
  885. if it has decremented the counter in its probe callback, it must run
  886. pm_runtime_get_noresume() in its remove callback. [Since the core carries
  887. out a runtime resume of the device and bumps up the device's usage counter
  888. before running the driver's remove callback, the runtime PM of the device
  889. is effectively disabled for the duration of the remove execution and all
  890. runtime PM helper functions incrementing the device's usage counter are
  891. then effectively equivalent to pm_runtime_get_noresume().]
  892. The runtime PM framework works by processing requests to suspend or resume
  893. devices, or to check if they are idle (in which cases it is reasonable to
  894. subsequently request that they be suspended). These requests are represented
  895. by work items put into the power management workqueue, pm_wq. Although there
  896. are a few situations in which power management requests are automatically
  897. queued by the PM core (for example, after processing a request to resume a
  898. device the PM core automatically queues a request to check if the device is
  899. idle), device drivers are generally responsible for queuing power management
  900. requests for their devices. For this purpose they should use the runtime PM
  901. helper functions provided by the PM core, discussed in
  902. Documentation/power/runtime_pm.rst.
  903. Devices can also be suspended and resumed synchronously, without placing a
  904. request into pm_wq. In the majority of cases this also is done by their
  905. drivers that use helper functions provided by the PM core for this purpose.
  906. For more information on the runtime PM of devices refer to
  907. Documentation/power/runtime_pm.rst.
  908. 4. Resources
  909. ============
  910. PCI Local Bus Specification, Rev. 3.0
  911. PCI Bus Power Management Interface Specification, Rev. 1.2
  912. Advanced Configuration and Power Interface (ACPI) Specification, Rev. 3.0b
  913. PCI Express Base Specification, Rev. 2.0
  914. Documentation/driver-api/pm/devices.rst
  915. Documentation/power/runtime_pm.rst