makefiles.rst 51 KB

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  1. ======================
  2. Linux Kernel Makefiles
  3. ======================
  4. This document describes the Linux kernel Makefiles.
  5. .. Table of Contents
  6. === 1 Overview
  7. === 2 Who does what
  8. === 3 The kbuild files
  9. --- 3.1 Goal definitions
  10. --- 3.2 Built-in object goals - obj-y
  11. --- 3.3 Loadable module goals - obj-m
  12. --- 3.4 Objects which export symbols
  13. --- 3.5 Library file goals - lib-y
  14. --- 3.6 Descending down in directories
  15. --- 3.7 Compilation flags
  16. --- 3.8 <deleted>
  17. --- 3.9 Dependency tracking
  18. --- 3.10 Special Rules
  19. --- 3.11 $(CC) support functions
  20. --- 3.12 $(LD) support functions
  21. --- 3.13 Script Invocation
  22. === 4 Host Program support
  23. --- 4.1 Simple Host Program
  24. --- 4.2 Composite Host Programs
  25. --- 4.3 Using C++ for host programs
  26. --- 4.4 Controlling compiler options for host programs
  27. --- 4.5 When host programs are actually built
  28. === 5 Userspace Program support
  29. --- 5.1 Simple Userspace Program
  30. --- 5.2 Composite Userspace Programs
  31. --- 5.3 Controlling compiler options for userspace programs
  32. --- 5.4 When userspace programs are actually built
  33. === 6 Kbuild clean infrastructure
  34. === 7 Architecture Makefiles
  35. --- 7.1 Set variables to tweak the build to the architecture
  36. --- 7.2 Add prerequisites to archheaders
  37. --- 7.3 Add prerequisites to archprepare
  38. --- 7.4 List directories to visit when descending
  39. --- 7.5 Architecture-specific boot images
  40. --- 7.6 Building non-kbuild targets
  41. --- 7.7 Commands useful for building a boot image
  42. --- 7.8 Custom kbuild commands
  43. --- 7.9 Preprocessing linker scripts
  44. --- 7.10 Generic header files
  45. --- 7.11 Post-link pass
  46. === 8 Kbuild syntax for exported headers
  47. --- 8.1 no-export-headers
  48. --- 8.2 generic-y
  49. --- 8.3 generated-y
  50. --- 8.4 mandatory-y
  51. === 9 Kbuild Variables
  52. === 10 Makefile language
  53. === 11 Credits
  54. === 12 TODO
  55. 1 Overview
  56. ==========
  57. The Makefiles have five parts::
  58. Makefile the top Makefile.
  59. .config the kernel configuration file.
  60. arch/$(ARCH)/Makefile the arch Makefile.
  61. scripts/Makefile.* common rules etc. for all kbuild Makefiles.
  62. kbuild Makefiles there are about 500 of these.
  63. The top Makefile reads the .config file, which comes from the kernel
  64. configuration process.
  65. The top Makefile is responsible for building two major products: vmlinux
  66. (the resident kernel image) and modules (any module files).
  67. It builds these goals by recursively descending into the subdirectories of
  68. the kernel source tree.
  69. The list of subdirectories which are visited depends upon the kernel
  70. configuration. The top Makefile textually includes an arch Makefile
  71. with the name arch/$(ARCH)/Makefile. The arch Makefile supplies
  72. architecture-specific information to the top Makefile.
  73. Each subdirectory has a kbuild Makefile which carries out the commands
  74. passed down from above. The kbuild Makefile uses information from the
  75. .config file to construct various file lists used by kbuild to build
  76. any built-in or modular targets.
  77. scripts/Makefile.* contains all the definitions/rules etc. that
  78. are used to build the kernel based on the kbuild makefiles.
  79. 2 Who does what
  80. ===============
  81. People have four different relationships with the kernel Makefiles.
  82. *Users* are people who build kernels. These people type commands such as
  83. "make menuconfig" or "make". They usually do not read or edit
  84. any kernel Makefiles (or any other source files).
  85. *Normal developers* are people who work on features such as device
  86. drivers, file systems, and network protocols. These people need to
  87. maintain the kbuild Makefiles for the subsystem they are
  88. working on. In order to do this effectively, they need some overall
  89. knowledge about the kernel Makefiles, plus detailed knowledge about the
  90. public interface for kbuild.
  91. *Arch developers* are people who work on an entire architecture, such
  92. as sparc or ia64. Arch developers need to know about the arch Makefile
  93. as well as kbuild Makefiles.
  94. *Kbuild developers* are people who work on the kernel build system itself.
  95. These people need to know about all aspects of the kernel Makefiles.
  96. This document is aimed towards normal developers and arch developers.
  97. 3 The kbuild files
  98. ==================
  99. Most Makefiles within the kernel are kbuild Makefiles that use the
  100. kbuild infrastructure. This chapter introduces the syntax used in the
  101. kbuild makefiles.
  102. The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
  103. be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
  104. file will be used.
  105. Section 3.1 "Goal definitions" is a quick intro; further chapters provide
  106. more details, with real examples.
  107. 3.1 Goal definitions
  108. --------------------
  109. Goal definitions are the main part (heart) of the kbuild Makefile.
  110. These lines define the files to be built, any special compilation
  111. options, and any subdirectories to be entered recursively.
  112. The most simple kbuild makefile contains one line:
  113. Example::
  114. obj-y += foo.o
  115. This tells kbuild that there is one object in that directory, named
  116. foo.o. foo.o will be built from foo.c or foo.S.
  117. If foo.o shall be built as a module, the variable obj-m is used.
  118. Therefore the following pattern is often used:
  119. Example::
  120. obj-$(CONFIG_FOO) += foo.o
  121. $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
  122. If CONFIG_FOO is neither y nor m, then the file will not be compiled
  123. nor linked.
  124. 3.2 Built-in object goals - obj-y
  125. ---------------------------------
  126. The kbuild Makefile specifies object files for vmlinux
  127. in the $(obj-y) lists. These lists depend on the kernel
  128. configuration.
  129. Kbuild compiles all the $(obj-y) files. It then calls
  130. "$(AR) rcSTP" to merge these files into one built-in.a file.
  131. This is a thin archive without a symbol table. It will be later
  132. linked into vmlinux by scripts/link-vmlinux.sh
  133. The order of files in $(obj-y) is significant. Duplicates in
  134. the lists are allowed: the first instance will be linked into
  135. built-in.a and succeeding instances will be ignored.
  136. Link order is significant, because certain functions
  137. (module_init() / __initcall) will be called during boot in the
  138. order they appear. So keep in mind that changing the link
  139. order may e.g. change the order in which your SCSI
  140. controllers are detected, and thus your disks are renumbered.
  141. Example::
  142. #drivers/isdn/i4l/Makefile
  143. # Makefile for the kernel ISDN subsystem and device drivers.
  144. # Each configuration option enables a list of files.
  145. obj-$(CONFIG_ISDN_I4L) += isdn.o
  146. obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
  147. 3.3 Loadable module goals - obj-m
  148. ---------------------------------
  149. $(obj-m) specifies object files which are built as loadable
  150. kernel modules.
  151. A module may be built from one source file or several source
  152. files. In the case of one source file, the kbuild makefile
  153. simply adds the file to $(obj-m).
  154. Example::
  155. #drivers/isdn/i4l/Makefile
  156. obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
  157. Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
  158. If a kernel module is built from several source files, you specify
  159. that you want to build a module in the same way as above; however,
  160. kbuild needs to know which object files you want to build your
  161. module from, so you have to tell it by setting a $(<module_name>-y)
  162. variable.
  163. Example::
  164. #drivers/isdn/i4l/Makefile
  165. obj-$(CONFIG_ISDN_I4L) += isdn.o
  166. isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o
  167. In this example, the module name will be isdn.o. Kbuild will
  168. compile the objects listed in $(isdn-y) and then run
  169. "$(LD) -r" on the list of these files to generate isdn.o.
  170. Due to kbuild recognizing $(<module_name>-y) for composite objects,
  171. you can use the value of a `CONFIG_` symbol to optionally include an
  172. object file as part of a composite object.
  173. Example::
  174. #fs/ext2/Makefile
  175. obj-$(CONFIG_EXT2_FS) += ext2.o
  176. ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \
  177. namei.o super.o symlink.o
  178. ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \
  179. xattr_trusted.o
  180. In this example, xattr.o, xattr_user.o and xattr_trusted.o are only
  181. part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR)
  182. evaluates to 'y'.
  183. Note: Of course, when you are building objects into the kernel,
  184. the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
  185. kbuild will build an ext2.o file for you out of the individual
  186. parts and then link this into built-in.a, as you would expect.
  187. 3.4 Objects which export symbols
  188. --------------------------------
  189. No special notation is required in the makefiles for
  190. modules exporting symbols.
  191. 3.5 Library file goals - lib-y
  192. ------------------------------
  193. Objects listed with obj-* are used for modules, or
  194. combined in a built-in.a for that specific directory.
  195. There is also the possibility to list objects that will
  196. be included in a library, lib.a.
  197. All objects listed with lib-y are combined in a single
  198. library for that directory.
  199. Objects that are listed in obj-y and additionally listed in
  200. lib-y will not be included in the library, since they will
  201. be accessible anyway.
  202. For consistency, objects listed in lib-m will be included in lib.a.
  203. Note that the same kbuild makefile may list files to be built-in
  204. and to be part of a library. Therefore the same directory
  205. may contain both a built-in.a and a lib.a file.
  206. Example::
  207. #arch/x86/lib/Makefile
  208. lib-y := delay.o
  209. This will create a library lib.a based on delay.o. For kbuild to
  210. actually recognize that there is a lib.a being built, the directory
  211. shall be listed in libs-y.
  212. See also "6.4 List directories to visit when descending".
  213. Use of lib-y is normally restricted to `lib/` and `arch/*/lib`.
  214. 3.6 Descending down in directories
  215. ----------------------------------
  216. A Makefile is only responsible for building objects in its own
  217. directory. Files in subdirectories should be taken care of by
  218. Makefiles in these subdirs. The build system will automatically
  219. invoke make recursively in subdirectories, provided you let it know of
  220. them.
  221. To do so, obj-y and obj-m are used.
  222. ext2 lives in a separate directory, and the Makefile present in fs/
  223. tells kbuild to descend down using the following assignment.
  224. Example::
  225. #fs/Makefile
  226. obj-$(CONFIG_EXT2_FS) += ext2/
  227. If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)
  228. the corresponding obj- variable will be set, and kbuild will descend
  229. down in the ext2 directory.
  230. Kbuild uses this information not only to decide that it needs to visit
  231. the directory, but also to decide whether or not to link objects from
  232. the directory into vmlinux.
  233. When Kbuild descends into the directory with 'y', all built-in objects
  234. from that directory are combined into the built-in.a, which will be
  235. eventually linked into vmlinux.
  236. When Kbuild descends into the directory with 'm', in contrast, nothing
  237. from that directory will be linked into vmlinux. If the Makefile in
  238. that directory specifies obj-y, those objects will be left orphan.
  239. It is very likely a bug of the Makefile or of dependencies in Kconfig.
  240. It is good practice to use a `CONFIG_` variable when assigning directory
  241. names. This allows kbuild to totally skip the directory if the
  242. corresponding `CONFIG_` option is neither 'y' nor 'm'.
  243. 3.7 Compilation flags
  244. ---------------------
  245. ccflags-y, asflags-y and ldflags-y
  246. These three flags apply only to the kbuild makefile in which they
  247. are assigned. They are used for all the normal cc, as and ld
  248. invocations happening during a recursive build.
  249. Note: Flags with the same behaviour were previously named:
  250. EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS.
  251. They are still supported but their usage is deprecated.
  252. ccflags-y specifies options for compiling with $(CC).
  253. Example::
  254. # drivers/acpi/acpica/Makefile
  255. ccflags-y := -Os -D_LINUX -DBUILDING_ACPICA
  256. ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT
  257. This variable is necessary because the top Makefile owns the
  258. variable $(KBUILD_CFLAGS) and uses it for compilation flags for the
  259. entire tree.
  260. asflags-y specifies assembler options.
  261. Example::
  262. #arch/sparc/kernel/Makefile
  263. asflags-y := -ansi
  264. ldflags-y specifies options for linking with $(LD).
  265. Example::
  266. #arch/cris/boot/compressed/Makefile
  267. ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds
  268. subdir-ccflags-y, subdir-asflags-y
  269. The two flags listed above are similar to ccflags-y and asflags-y.
  270. The difference is that the subdir- variants have effect for the kbuild
  271. file where they are present and all subdirectories.
  272. Options specified using subdir-* are added to the commandline before
  273. the options specified using the non-subdir variants.
  274. Example::
  275. subdir-ccflags-y := -Werror
  276. ccflags-remove-y, asflags-remove-y
  277. These flags are used to remove particular flags for the compiler,
  278. assembler invocations.
  279. Example::
  280. ccflags-remove-$(CONFIG_MCOUNT) += -pg
  281. CFLAGS_$@, AFLAGS_$@
  282. CFLAGS_$@ and AFLAGS_$@ only apply to commands in current
  283. kbuild makefile.
  284. $(CFLAGS_$@) specifies per-file options for $(CC). The $@
  285. part has a literal value which specifies the file that it is for.
  286. CFLAGS_$@ has the higher priority than ccflags-remove-y; CFLAGS_$@
  287. can re-add compiler flags that were removed by ccflags-remove-y.
  288. Example::
  289. # drivers/scsi/Makefile
  290. CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF
  291. CFLAGS_gdth.o = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \
  292. -DGDTH_STATISTICS
  293. These two lines specify compilation flags for aha152x.o and gdth.o.
  294. $(AFLAGS_$@) is a similar feature for source files in assembly
  295. languages.
  296. AFLAGS_$@ has the higher priority than asflags-remove-y; AFLAGS_$@
  297. can re-add assembler flags that were removed by asflags-remove-y.
  298. Example::
  299. # arch/arm/kernel/Makefile
  300. AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET)
  301. AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
  302. AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
  303. 3.9 Dependency tracking
  304. -----------------------
  305. Kbuild tracks dependencies on the following:
  306. 1) All prerequisite files (both `*.c` and `*.h`)
  307. 2) `CONFIG_` options used in all prerequisite files
  308. 3) Command-line used to compile target
  309. Thus, if you change an option to $(CC) all affected files will
  310. be re-compiled.
  311. 3.10 Special Rules
  312. ------------------
  313. Special rules are used when the kbuild infrastructure does
  314. not provide the required support. A typical example is
  315. header files generated during the build process.
  316. Another example are the architecture-specific Makefiles which
  317. need special rules to prepare boot images etc.
  318. Special rules are written as normal Make rules.
  319. Kbuild is not executing in the directory where the Makefile is
  320. located, so all special rules shall provide a relative
  321. path to prerequisite files and target files.
  322. Two variables are used when defining special rules:
  323. $(src)
  324. $(src) is a relative path which points to the directory
  325. where the Makefile is located. Always use $(src) when
  326. referring to files located in the src tree.
  327. $(obj)
  328. $(obj) is a relative path which points to the directory
  329. where the target is saved. Always use $(obj) when
  330. referring to generated files.
  331. Example::
  332. #drivers/scsi/Makefile
  333. $(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl
  334. $(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl
  335. This is a special rule, following the normal syntax
  336. required by make.
  337. The target file depends on two prerequisite files. References
  338. to the target file are prefixed with $(obj), references
  339. to prerequisites are referenced with $(src) (because they are not
  340. generated files).
  341. $(kecho)
  342. echoing information to user in a rule is often a good practice
  343. but when execution "make -s" one does not expect to see any output
  344. except for warnings/errors.
  345. To support this kbuild defines $(kecho) which will echo out the
  346. text following $(kecho) to stdout except if "make -s" is used.
  347. Example::
  348. #arch/blackfin/boot/Makefile
  349. $(obj)/vmImage: $(obj)/vmlinux.gz
  350. $(call if_changed,uimage)
  351. @$(kecho) 'Kernel: $@ is ready'
  352. 3.11 $(CC) support functions
  353. ----------------------------
  354. The kernel may be built with several different versions of
  355. $(CC), each supporting a unique set of features and options.
  356. kbuild provides basic support to check for valid options for $(CC).
  357. $(CC) is usually the gcc compiler, but other alternatives are
  358. available.
  359. as-option
  360. as-option is used to check if $(CC) -- when used to compile
  361. assembler (`*.S`) files -- supports the given option. An optional
  362. second option may be specified if the first option is not supported.
  363. Example::
  364. #arch/sh/Makefile
  365. cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
  366. In the above example, cflags-y will be assigned the option
  367. -Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).
  368. The second argument is optional, and if supplied will be used
  369. if first argument is not supported.
  370. as-instr
  371. as-instr checks if the assembler reports a specific instruction
  372. and then outputs either option1 or option2
  373. C escapes are supported in the test instruction
  374. Note: as-instr-option uses KBUILD_AFLAGS for assembler options
  375. cc-option
  376. cc-option is used to check if $(CC) supports a given option, and if
  377. not supported to use an optional second option.
  378. Example::
  379. #arch/x86/Makefile
  380. cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
  381. In the above example, cflags-y will be assigned the option
  382. -march=pentium-mmx if supported by $(CC), otherwise -march=i586.
  383. The second argument to cc-option is optional, and if omitted,
  384. cflags-y will be assigned no value if first option is not supported.
  385. Note: cc-option uses KBUILD_CFLAGS for $(CC) options
  386. cc-option-yn
  387. cc-option-yn is used to check if gcc supports a given option
  388. and return 'y' if supported, otherwise 'n'.
  389. Example::
  390. #arch/ppc/Makefile
  391. biarch := $(call cc-option-yn, -m32)
  392. aflags-$(biarch) += -a32
  393. cflags-$(biarch) += -m32
  394. In the above example, $(biarch) is set to y if $(CC) supports the -m32
  395. option. When $(biarch) equals 'y', the expanded variables $(aflags-y)
  396. and $(cflags-y) will be assigned the values -a32 and -m32,
  397. respectively.
  398. Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options
  399. cc-disable-warning
  400. cc-disable-warning checks if gcc supports a given warning and returns
  401. the commandline switch to disable it. This special function is needed,
  402. because gcc 4.4 and later accept any unknown -Wno-* option and only
  403. warn about it if there is another warning in the source file.
  404. Example::
  405. KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)
  406. In the above example, -Wno-unused-but-set-variable will be added to
  407. KBUILD_CFLAGS only if gcc really accepts it.
  408. cc-ifversion
  409. cc-ifversion tests the version of $(CC) and equals the fourth parameter
  410. if version expression is true, or the fifth (if given) if the version
  411. expression is false.
  412. Example::
  413. #fs/reiserfs/Makefile
  414. ccflags-y := $(call cc-ifversion, -lt, 0402, -O1)
  415. In this example, ccflags-y will be assigned the value -O1 if the
  416. $(CC) version is less than 4.2.
  417. cc-ifversion takes all the shell operators:
  418. -eq, -ne, -lt, -le, -gt, and -ge
  419. The third parameter may be a text as in this example, but it may also
  420. be an expanded variable or a macro.
  421. cc-cross-prefix
  422. cc-cross-prefix is used to check if there exists a $(CC) in path with
  423. one of the listed prefixes. The first prefix where there exist a
  424. prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found
  425. then nothing is returned.
  426. Additional prefixes are separated by a single space in the
  427. call of cc-cross-prefix.
  428. This functionality is useful for architecture Makefiles that try
  429. to set CROSS_COMPILE to well-known values but may have several
  430. values to select between.
  431. It is recommended only to try to set CROSS_COMPILE if it is a cross
  432. build (host arch is different from target arch). And if CROSS_COMPILE
  433. is already set then leave it with the old value.
  434. Example::
  435. #arch/m68k/Makefile
  436. ifneq ($(SUBARCH),$(ARCH))
  437. ifeq ($(CROSS_COMPILE),)
  438. CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu-)
  439. endif
  440. endif
  441. 3.12 $(LD) support functions
  442. ----------------------------
  443. ld-option
  444. ld-option is used to check if $(LD) supports the supplied option.
  445. ld-option takes two options as arguments.
  446. The second argument is an optional option that can be used if the
  447. first option is not supported by $(LD).
  448. Example::
  449. #Makefile
  450. LDFLAGS_vmlinux += $(call ld-option, -X)
  451. 3.13 Script invocation
  452. ----------------------
  453. Make rules may invoke scripts to build the kernel. The rules shall
  454. always provide the appropriate interpreter to execute the script. They
  455. shall not rely on the execute bits being set, and shall not invoke the
  456. script directly. For the convenience of manual script invocation, such
  457. as invoking ./scripts/checkpatch.pl, it is recommended to set execute
  458. bits on the scripts nonetheless.
  459. Kbuild provides variables $(CONFIG_SHELL), $(AWK), $(PERL),
  460. $(PYTHON) and $(PYTHON3) to refer to interpreters for the respective
  461. scripts.
  462. Example::
  463. #Makefile
  464. cmd_depmod = $(CONFIG_SHELL) $(srctree)/scripts/depmod.sh $(DEPMOD) \
  465. $(KERNELRELEASE)
  466. 4 Host Program support
  467. ======================
  468. Kbuild supports building executables on the host for use during the
  469. compilation stage.
  470. Two steps are required in order to use a host executable.
  471. The first step is to tell kbuild that a host program exists. This is
  472. done utilising the variable "hostprogs".
  473. The second step is to add an explicit dependency to the executable.
  474. This can be done in two ways. Either add the dependency in a rule,
  475. or utilise the variable "always-y".
  476. Both possibilities are described in the following.
  477. 4.1 Simple Host Program
  478. -----------------------
  479. In some cases there is a need to compile and run a program on the
  480. computer where the build is running.
  481. The following line tells kbuild that the program bin2hex shall be
  482. built on the build host.
  483. Example::
  484. hostprogs := bin2hex
  485. Kbuild assumes in the above example that bin2hex is made from a single
  486. c-source file named bin2hex.c located in the same directory as
  487. the Makefile.
  488. 4.2 Composite Host Programs
  489. ---------------------------
  490. Host programs can be made up based on composite objects.
  491. The syntax used to define composite objects for host programs is
  492. similar to the syntax used for kernel objects.
  493. $(<executable>-objs) lists all objects used to link the final
  494. executable.
  495. Example::
  496. #scripts/lxdialog/Makefile
  497. hostprogs := lxdialog
  498. lxdialog-objs := checklist.o lxdialog.o
  499. Objects with extension .o are compiled from the corresponding .c
  500. files. In the above example, checklist.c is compiled to checklist.o
  501. and lxdialog.c is compiled to lxdialog.o.
  502. Finally, the two .o files are linked to the executable, lxdialog.
  503. Note: The syntax <executable>-y is not permitted for host-programs.
  504. 4.3 Using C++ for host programs
  505. -------------------------------
  506. kbuild offers support for host programs written in C++. This was
  507. introduced solely to support kconfig, and is not recommended
  508. for general use.
  509. Example::
  510. #scripts/kconfig/Makefile
  511. hostprogs := qconf
  512. qconf-cxxobjs := qconf.o
  513. In the example above the executable is composed of the C++ file
  514. qconf.cc - identified by $(qconf-cxxobjs).
  515. If qconf is composed of a mixture of .c and .cc files, then an
  516. additional line can be used to identify this.
  517. Example::
  518. #scripts/kconfig/Makefile
  519. hostprogs := qconf
  520. qconf-cxxobjs := qconf.o
  521. qconf-objs := check.o
  522. 4.4 Controlling compiler options for host programs
  523. --------------------------------------------------
  524. When compiling host programs, it is possible to set specific flags.
  525. The programs will always be compiled utilising $(HOSTCC) passed
  526. the options specified in $(KBUILD_HOSTCFLAGS).
  527. To set flags that will take effect for all host programs created
  528. in that Makefile, use the variable HOST_EXTRACFLAGS.
  529. Example::
  530. #scripts/lxdialog/Makefile
  531. HOST_EXTRACFLAGS += -I/usr/include/ncurses
  532. To set specific flags for a single file the following construction
  533. is used:
  534. Example::
  535. #arch/ppc64/boot/Makefile
  536. HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
  537. It is also possible to specify additional options to the linker.
  538. Example::
  539. #scripts/kconfig/Makefile
  540. HOSTLDLIBS_qconf := -L$(QTDIR)/lib
  541. When linking qconf, it will be passed the extra option
  542. "-L$(QTDIR)/lib".
  543. 4.5 When host programs are actually built
  544. -----------------------------------------
  545. Kbuild will only build host-programs when they are referenced
  546. as a prerequisite.
  547. This is possible in two ways:
  548. (1) List the prerequisite explicitly in a special rule.
  549. Example::
  550. #drivers/pci/Makefile
  551. hostprogs := gen-devlist
  552. $(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
  553. ( cd $(obj); ./gen-devlist ) < $<
  554. The target $(obj)/devlist.h will not be built before
  555. $(obj)/gen-devlist is updated. Note that references to
  556. the host programs in special rules must be prefixed with $(obj).
  557. (2) Use always-y
  558. When there is no suitable special rule, and the host program
  559. shall be built when a makefile is entered, the always-y
  560. variable shall be used.
  561. Example::
  562. #scripts/lxdialog/Makefile
  563. hostprogs := lxdialog
  564. always-y := $(hostprogs)
  565. Kbuild provides the following shorthand for this:
  566. hostprogs-always-y := lxdialog
  567. This will tell kbuild to build lxdialog even if not referenced in
  568. any rule.
  569. 5 Userspace Program support
  570. ===========================
  571. Just like host programs, Kbuild also supports building userspace executables
  572. for the target architecture (i.e. the same architecture as you are building
  573. the kernel for).
  574. The syntax is quite similar. The difference is to use "userprogs" instead of
  575. "hostprogs".
  576. 5.1 Simple Userspace Program
  577. ----------------------------
  578. The following line tells kbuild that the program bpf-direct shall be
  579. built for the target architecture.
  580. Example::
  581. userprogs := bpf-direct
  582. Kbuild assumes in the above example that bpf-direct is made from a
  583. single C source file named bpf-direct.c located in the same directory
  584. as the Makefile.
  585. 5.2 Composite Userspace Programs
  586. --------------------------------
  587. Userspace programs can be made up based on composite objects.
  588. The syntax used to define composite objects for userspace programs is
  589. similar to the syntax used for kernel objects.
  590. $(<executable>-objs) lists all objects used to link the final
  591. executable.
  592. Example::
  593. #samples/seccomp/Makefile
  594. userprogs := bpf-fancy
  595. bpf-fancy-objs := bpf-fancy.o bpf-helper.o
  596. Objects with extension .o are compiled from the corresponding .c
  597. files. In the above example, bpf-fancy.c is compiled to bpf-fancy.o
  598. and bpf-helper.c is compiled to bpf-helper.o.
  599. Finally, the two .o files are linked to the executable, bpf-fancy.
  600. Note: The syntax <executable>-y is not permitted for userspace programs.
  601. 5.3 Controlling compiler options for userspace programs
  602. -------------------------------------------------------
  603. When compiling userspace programs, it is possible to set specific flags.
  604. The programs will always be compiled utilising $(CC) passed
  605. the options specified in $(KBUILD_USERCFLAGS).
  606. To set flags that will take effect for all userspace programs created
  607. in that Makefile, use the variable userccflags.
  608. Example::
  609. # samples/seccomp/Makefile
  610. userccflags += -I usr/include
  611. To set specific flags for a single file the following construction
  612. is used:
  613. Example::
  614. bpf-helper-userccflags += -I user/include
  615. It is also possible to specify additional options to the linker.
  616. Example::
  617. # net/bpfilter/Makefile
  618. bpfilter_umh-userldflags += -static
  619. When linking bpfilter_umh, it will be passed the extra option -static.
  620. From command line, :ref:`USERCFLAGS and USERLDFLAGS <userkbuildflags>` will also be used.
  621. 5.4 When userspace programs are actually built
  622. ----------------------------------------------
  623. Kbuild builds userspace programs only when told to do so.
  624. There are two ways to do this.
  625. (1) Add it as the prerequisite of another file
  626. Example::
  627. #net/bpfilter/Makefile
  628. userprogs := bpfilter_umh
  629. $(obj)/bpfilter_umh_blob.o: $(obj)/bpfilter_umh
  630. $(obj)/bpfilter_umh is built before $(obj)/bpfilter_umh_blob.o
  631. (2) Use always-y
  632. Example::
  633. userprogs := binderfs_example
  634. always-y := $(userprogs)
  635. Kbuild provides the following shorthand for this:
  636. userprogs-always-y := binderfs_example
  637. This will tell Kbuild to build binderfs_example when it visits this
  638. Makefile.
  639. 6 Kbuild clean infrastructure
  640. =============================
  641. "make clean" deletes most generated files in the obj tree where the kernel
  642. is compiled. This includes generated files such as host programs.
  643. Kbuild knows targets listed in $(hostprogs), $(always-y), $(always-m),
  644. $(always-), $(extra-y), $(extra-) and $(targets). They are all deleted
  645. during "make clean". Files matching the patterns "*.[oas]", "*.ko", plus
  646. some additional files generated by kbuild are deleted all over the kernel
  647. source tree when "make clean" is executed.
  648. Additional files or directories can be specified in kbuild makefiles by use of
  649. $(clean-files).
  650. Example::
  651. #lib/Makefile
  652. clean-files := crc32table.h
  653. When executing "make clean", the file "crc32table.h" will be deleted.
  654. Kbuild will assume files to be in the same relative directory as the
  655. Makefile, except if prefixed with $(objtree).
  656. To exclude certain files or directories from make clean, use the
  657. $(no-clean-files) variable.
  658. Usually kbuild descends down in subdirectories due to "obj-* := dir/",
  659. but in the architecture makefiles where the kbuild infrastructure
  660. is not sufficient this sometimes needs to be explicit.
  661. Example::
  662. #arch/x86/boot/Makefile
  663. subdir- := compressed
  664. The above assignment instructs kbuild to descend down in the
  665. directory compressed/ when "make clean" is executed.
  666. To support the clean infrastructure in the Makefiles that build the
  667. final bootimage there is an optional target named archclean:
  668. Example::
  669. #arch/x86/Makefile
  670. archclean:
  671. $(Q)$(MAKE) $(clean)=arch/x86/boot
  672. When "make clean" is executed, make will descend down in arch/x86/boot,
  673. and clean as usual. The Makefile located in arch/x86/boot/ may use
  674. the subdir- trick to descend further down.
  675. Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is
  676. included in the top level makefile, and the kbuild infrastructure
  677. is not operational at that point.
  678. Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will
  679. be visited during "make clean".
  680. 7 Architecture Makefiles
  681. ========================
  682. The top level Makefile sets up the environment and does the preparation,
  683. before starting to descend down in the individual directories.
  684. The top level makefile contains the generic part, whereas
  685. arch/$(ARCH)/Makefile contains what is required to set up kbuild
  686. for said architecture.
  687. To do so, arch/$(ARCH)/Makefile sets up a number of variables and defines
  688. a few targets.
  689. When kbuild executes, the following steps are followed (roughly):
  690. 1) Configuration of the kernel => produce .config
  691. 2) Store kernel version in include/linux/version.h
  692. 3) Updating all other prerequisites to the target prepare:
  693. - Additional prerequisites are specified in arch/$(ARCH)/Makefile
  694. 4) Recursively descend down in all directories listed in
  695. init-* core* drivers-* net-* libs-* and build all targets.
  696. - The values of the above variables are expanded in arch/$(ARCH)/Makefile.
  697. 5) All object files are then linked and the resulting file vmlinux is
  698. located at the root of the obj tree.
  699. The very first objects linked are listed in head-y, assigned by
  700. arch/$(ARCH)/Makefile.
  701. 6) Finally, the architecture-specific part does any required post processing
  702. and builds the final bootimage.
  703. - This includes building boot records
  704. - Preparing initrd images and the like
  705. 7.1 Set variables to tweak the build to the architecture
  706. --------------------------------------------------------
  707. KBUILD_LDFLAGS
  708. Generic $(LD) options
  709. Flags used for all invocations of the linker.
  710. Often specifying the emulation is sufficient.
  711. Example::
  712. #arch/s390/Makefile
  713. KBUILD_LDFLAGS := -m elf_s390
  714. Note: ldflags-y can be used to further customise
  715. the flags used. See section 3.7.
  716. LDFLAGS_vmlinux
  717. Options for $(LD) when linking vmlinux
  718. LDFLAGS_vmlinux is used to specify additional flags to pass to
  719. the linker when linking the final vmlinux image.
  720. LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
  721. Example::
  722. #arch/x86/Makefile
  723. LDFLAGS_vmlinux := -e stext
  724. OBJCOPYFLAGS
  725. objcopy flags
  726. When $(call if_changed,objcopy) is used to translate a .o file,
  727. the flags specified in OBJCOPYFLAGS will be used.
  728. $(call if_changed,objcopy) is often used to generate raw binaries on
  729. vmlinux.
  730. Example::
  731. #arch/s390/Makefile
  732. OBJCOPYFLAGS := -O binary
  733. #arch/s390/boot/Makefile
  734. $(obj)/image: vmlinux FORCE
  735. $(call if_changed,objcopy)
  736. In this example, the binary $(obj)/image is a binary version of
  737. vmlinux. The usage of $(call if_changed,xxx) will be described later.
  738. KBUILD_AFLAGS
  739. Assembler flags
  740. Default value - see top level Makefile
  741. Append or modify as required per architecture.
  742. Example::
  743. #arch/sparc64/Makefile
  744. KBUILD_AFLAGS += -m64 -mcpu=ultrasparc
  745. KBUILD_CFLAGS
  746. $(CC) compiler flags
  747. Default value - see top level Makefile
  748. Append or modify as required per architecture.
  749. Often, the KBUILD_CFLAGS variable depends on the configuration.
  750. Example::
  751. #arch/x86/boot/compressed/Makefile
  752. cflags-$(CONFIG_X86_32) := -march=i386
  753. cflags-$(CONFIG_X86_64) := -mcmodel=small
  754. KBUILD_CFLAGS += $(cflags-y)
  755. Many arch Makefiles dynamically run the target C compiler to
  756. probe supported options::
  757. #arch/x86/Makefile
  758. ...
  759. cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\
  760. -march=pentium2,-march=i686)
  761. ...
  762. # Disable unit-at-a-time mode ...
  763. KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time)
  764. ...
  765. The first example utilises the trick that a config option expands
  766. to 'y' when selected.
  767. KBUILD_AFLAGS_KERNEL
  768. Assembler options specific for built-in
  769. $(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile
  770. resident kernel code.
  771. KBUILD_AFLAGS_MODULE
  772. Assembler options specific for modules
  773. $(KBUILD_AFLAGS_MODULE) is used to add arch-specific options that
  774. are used for assembler.
  775. From commandline AFLAGS_MODULE shall be used (see kbuild.rst).
  776. KBUILD_CFLAGS_KERNEL
  777. $(CC) options specific for built-in
  778. $(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile
  779. resident kernel code.
  780. KBUILD_CFLAGS_MODULE
  781. Options for $(CC) when building modules
  782. $(KBUILD_CFLAGS_MODULE) is used to add arch-specific options that
  783. are used for $(CC).
  784. From commandline CFLAGS_MODULE shall be used (see kbuild.rst).
  785. KBUILD_LDFLAGS_MODULE
  786. Options for $(LD) when linking modules
  787. $(KBUILD_LDFLAGS_MODULE) is used to add arch-specific options
  788. used when linking modules. This is often a linker script.
  789. From commandline LDFLAGS_MODULE shall be used (see kbuild.rst).
  790. KBUILD_LDS
  791. The linker script with full path. Assigned by the top-level Makefile.
  792. KBUILD_LDS_MODULE
  793. The module linker script with full path. Assigned by the top-level
  794. Makefile and additionally by the arch Makefile.
  795. KBUILD_VMLINUX_OBJS
  796. All object files for vmlinux. They are linked to vmlinux in the same
  797. order as listed in KBUILD_VMLINUX_OBJS.
  798. KBUILD_VMLINUX_LIBS
  799. All .a "lib" files for vmlinux. KBUILD_VMLINUX_OBJS and
  800. KBUILD_VMLINUX_LIBS together specify all the object files used to
  801. link vmlinux.
  802. 7.2 Add prerequisites to archheaders
  803. ------------------------------------
  804. The archheaders: rule is used to generate header files that
  805. may be installed into user space by "make header_install".
  806. It is run before "make archprepare" when run on the
  807. architecture itself.
  808. 7.3 Add prerequisites to archprepare
  809. ------------------------------------
  810. The archprepare: rule is used to list prerequisites that need to be
  811. built before starting to descend down in the subdirectories.
  812. This is usually used for header files containing assembler constants.
  813. Example::
  814. #arch/arm/Makefile
  815. archprepare: maketools
  816. In this example, the file target maketools will be processed
  817. before descending down in the subdirectories.
  818. See also chapter XXX-TODO that describes how kbuild supports
  819. generating offset header files.
  820. 7.4 List directories to visit when descending
  821. ---------------------------------------------
  822. An arch Makefile cooperates with the top Makefile to define variables
  823. which specify how to build the vmlinux file. Note that there is no
  824. corresponding arch-specific section for modules; the module-building
  825. machinery is all architecture-independent.
  826. head-y, init-y, core-y, libs-y, drivers-y, net-y
  827. $(head-y) lists objects to be linked first in vmlinux.
  828. $(libs-y) lists directories where a lib.a archive can be located.
  829. The rest list directories where a built-in.a object file can be
  830. located.
  831. $(init-y) objects will be located after $(head-y).
  832. Then the rest follows in this order:
  833. $(core-y), $(libs-y), $(drivers-y) and $(net-y).
  834. The top level Makefile defines values for all generic directories,
  835. and arch/$(ARCH)/Makefile only adds architecture-specific
  836. directories.
  837. Example::
  838. #arch/sparc64/Makefile
  839. core-y += arch/sparc64/kernel/
  840. libs-y += arch/sparc64/prom/ arch/sparc64/lib/
  841. drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/
  842. 7.5 Architecture-specific boot images
  843. -------------------------------------
  844. An arch Makefile specifies goals that take the vmlinux file, compress
  845. it, wrap it in bootstrapping code, and copy the resulting files
  846. somewhere. This includes various kinds of installation commands.
  847. The actual goals are not standardized across architectures.
  848. It is common to locate any additional processing in a boot/
  849. directory below arch/$(ARCH)/.
  850. Kbuild does not provide any smart way to support building a
  851. target specified in boot/. Therefore arch/$(ARCH)/Makefile shall
  852. call make manually to build a target in boot/.
  853. The recommended approach is to include shortcuts in
  854. arch/$(ARCH)/Makefile, and use the full path when calling down
  855. into the arch/$(ARCH)/boot/Makefile.
  856. Example::
  857. #arch/x86/Makefile
  858. boot := arch/x86/boot
  859. bzImage: vmlinux
  860. $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
  861. "$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
  862. make in a subdirectory.
  863. There are no rules for naming architecture-specific targets,
  864. but executing "make help" will list all relevant targets.
  865. To support this, $(archhelp) must be defined.
  866. Example::
  867. #arch/x86/Makefile
  868. define archhelp
  869. echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)'
  870. endif
  871. When make is executed without arguments, the first goal encountered
  872. will be built. In the top level Makefile the first goal present
  873. is all:.
  874. An architecture shall always, per default, build a bootable image.
  875. In "make help", the default goal is highlighted with a '*'.
  876. Add a new prerequisite to all: to select a default goal different
  877. from vmlinux.
  878. Example::
  879. #arch/x86/Makefile
  880. all: bzImage
  881. When "make" is executed without arguments, bzImage will be built.
  882. 7.6 Building non-kbuild targets
  883. -------------------------------
  884. extra-y
  885. extra-y specifies additional targets created in the current
  886. directory, in addition to any targets specified by `obj-*`.
  887. Listing all targets in extra-y is required for two purposes:
  888. 1) Enable kbuild to check changes in command lines
  889. - When $(call if_changed,xxx) is used
  890. 2) kbuild knows what files to delete during "make clean"
  891. Example::
  892. #arch/x86/kernel/Makefile
  893. extra-y := head.o init_task.o
  894. In this example, extra-y is used to list object files that
  895. shall be built, but shall not be linked as part of built-in.a.
  896. 7.7 Commands useful for building a boot image
  897. ---------------------------------------------
  898. Kbuild provides a few macros that are useful when building a
  899. boot image.
  900. if_changed
  901. if_changed is the infrastructure used for the following commands.
  902. Usage::
  903. target: source(s) FORCE
  904. $(call if_changed,ld/objcopy/gzip/...)
  905. When the rule is evaluated, it is checked to see if any files
  906. need an update, or the command line has changed since the last
  907. invocation. The latter will force a rebuild if any options
  908. to the executable have changed.
  909. Any target that utilises if_changed must be listed in $(targets),
  910. otherwise the command line check will fail, and the target will
  911. always be built.
  912. Assignments to $(targets) are without $(obj)/ prefix.
  913. if_changed may be used in conjunction with custom commands as
  914. defined in 7.8 "Custom kbuild commands".
  915. Note: It is a typical mistake to forget the FORCE prerequisite.
  916. Another common pitfall is that whitespace is sometimes
  917. significant; for instance, the below will fail (note the extra space
  918. after the comma)::
  919. target: source(s) FORCE
  920. **WRONG!** $(call if_changed, ld/objcopy/gzip/...)
  921. Note:
  922. if_changed should not be used more than once per target.
  923. It stores the executed command in a corresponding .cmd
  924. file and multiple calls would result in overwrites and
  925. unwanted results when the target is up to date and only the
  926. tests on changed commands trigger execution of commands.
  927. ld
  928. Link target. Often, LDFLAGS_$@ is used to set specific options to ld.
  929. Example::
  930. #arch/x86/boot/Makefile
  931. LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary
  932. LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext
  933. targets += setup setup.o bootsect bootsect.o
  934. $(obj)/setup $(obj)/bootsect: %: %.o FORCE
  935. $(call if_changed,ld)
  936. In this example, there are two possible targets, requiring different
  937. options to the linker. The linker options are specified using the
  938. LDFLAGS_$@ syntax - one for each potential target.
  939. $(targets) are assigned all potential targets, by which kbuild knows
  940. the targets and will:
  941. 1) check for commandline changes
  942. 2) delete target during make clean
  943. The ": %: %.o" part of the prerequisite is a shorthand that
  944. frees us from listing the setup.o and bootsect.o files.
  945. Note:
  946. It is a common mistake to forget the "targets :=" assignment,
  947. resulting in the target file being recompiled for no
  948. obvious reason.
  949. objcopy
  950. Copy binary. Uses OBJCOPYFLAGS usually specified in
  951. arch/$(ARCH)/Makefile.
  952. OBJCOPYFLAGS_$@ may be used to set additional options.
  953. gzip
  954. Compress target. Use maximum compression to compress target.
  955. Example::
  956. #arch/x86/boot/compressed/Makefile
  957. $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE
  958. $(call if_changed,gzip)
  959. dtc
  960. Create flattened device tree blob object suitable for linking
  961. into vmlinux. Device tree blobs linked into vmlinux are placed
  962. in an init section in the image. Platform code *must* copy the
  963. blob to non-init memory prior to calling unflatten_device_tree().
  964. To use this command, simply add `*.dtb` into obj-y or targets, or make
  965. some other target depend on `%.dtb`
  966. A central rule exists to create `$(obj)/%.dtb` from `$(src)/%.dts`;
  967. architecture Makefiles do no need to explicitly write out that rule.
  968. Example::
  969. targets += $(dtb-y)
  970. DTC_FLAGS ?= -p 1024
  971. 7.8 Custom kbuild commands
  972. --------------------------
  973. When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
  974. of a command is normally displayed.
  975. To enable this behaviour for custom commands kbuild requires
  976. two variables to be set::
  977. quiet_cmd_<command> - what shall be echoed
  978. cmd_<command> - the command to execute
  979. Example::
  980. #
  981. quiet_cmd_image = BUILD $@
  982. cmd_image = $(obj)/tools/build $(BUILDFLAGS) \
  983. $(obj)/vmlinux.bin > $@
  984. targets += bzImage
  985. $(obj)/bzImage: $(obj)/vmlinux.bin $(obj)/tools/build FORCE
  986. $(call if_changed,image)
  987. @echo 'Kernel: $@ is ready'
  988. When updating the $(obj)/bzImage target, the line:
  989. BUILD arch/x86/boot/bzImage
  990. will be displayed with "make KBUILD_VERBOSE=0".
  991. 7.9 Preprocessing linker scripts
  992. --------------------------------
  993. When the vmlinux image is built, the linker script
  994. arch/$(ARCH)/kernel/vmlinux.lds is used.
  995. The script is a preprocessed variant of the file vmlinux.lds.S
  996. located in the same directory.
  997. kbuild knows .lds files and includes a rule `*lds.S` -> `*lds`.
  998. Example::
  999. #arch/x86/kernel/Makefile
  1000. extra-y := vmlinux.lds
  1001. #Makefile
  1002. export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH)
  1003. The assignment to extra-y is used to tell kbuild to build the
  1004. target vmlinux.lds.
  1005. The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the
  1006. specified options when building the target vmlinux.lds.
  1007. When building the `*.lds` target, kbuild uses the variables::
  1008. KBUILD_CPPFLAGS : Set in top-level Makefile
  1009. cppflags-y : May be set in the kbuild makefile
  1010. CPPFLAGS_$(@F) : Target-specific flags.
  1011. Note that the full filename is used in this
  1012. assignment.
  1013. The kbuild infrastructure for `*lds` files is used in several
  1014. architecture-specific files.
  1015. 7.10 Generic header files
  1016. -------------------------
  1017. The directory include/asm-generic contains the header files
  1018. that may be shared between individual architectures.
  1019. The recommended approach how to use a generic header file is
  1020. to list the file in the Kbuild file.
  1021. See "8.2 generic-y" for further info on syntax etc.
  1022. 7.11 Post-link pass
  1023. -------------------
  1024. If the file arch/xxx/Makefile.postlink exists, this makefile
  1025. will be invoked for post-link objects (vmlinux and modules.ko)
  1026. for architectures to run post-link passes on. Must also handle
  1027. the clean target.
  1028. This pass runs after kallsyms generation. If the architecture
  1029. needs to modify symbol locations, rather than manipulate the
  1030. kallsyms, it may be easier to add another postlink target for
  1031. .tmp_vmlinux? targets to be called from link-vmlinux.sh.
  1032. For example, powerpc uses this to check relocation sanity of
  1033. the linked vmlinux file.
  1034. 8 Kbuild syntax for exported headers
  1035. ------------------------------------
  1036. The kernel includes a set of headers that is exported to userspace.
  1037. Many headers can be exported as-is but other headers require a
  1038. minimal pre-processing before they are ready for user-space.
  1039. The pre-processing does:
  1040. - drop kernel-specific annotations
  1041. - drop include of compiler.h
  1042. - drop all sections that are kernel internal (guarded by `ifdef __KERNEL__`)
  1043. All headers under include/uapi/, include/generated/uapi/,
  1044. arch/<arch>/include/uapi/ and arch/<arch>/include/generated/uapi/
  1045. are exported.
  1046. A Kbuild file may be defined under arch/<arch>/include/uapi/asm/ and
  1047. arch/<arch>/include/asm/ to list asm files coming from asm-generic.
  1048. See subsequent chapter for the syntax of the Kbuild file.
  1049. 8.1 no-export-headers
  1050. ---------------------
  1051. no-export-headers is essentially used by include/uapi/linux/Kbuild to
  1052. avoid exporting specific headers (e.g. kvm.h) on architectures that do
  1053. not support it. It should be avoided as much as possible.
  1054. 8.2 generic-y
  1055. -------------
  1056. If an architecture uses a verbatim copy of a header from
  1057. include/asm-generic then this is listed in the file
  1058. arch/$(ARCH)/include/asm/Kbuild like this:
  1059. Example::
  1060. #arch/x86/include/asm/Kbuild
  1061. generic-y += termios.h
  1062. generic-y += rtc.h
  1063. During the prepare phase of the build a wrapper include
  1064. file is generated in the directory::
  1065. arch/$(ARCH)/include/generated/asm
  1066. When a header is exported where the architecture uses
  1067. the generic header a similar wrapper is generated as part
  1068. of the set of exported headers in the directory::
  1069. usr/include/asm
  1070. The generated wrapper will in both cases look like the following:
  1071. Example: termios.h::
  1072. #include <asm-generic/termios.h>
  1073. 8.3 generated-y
  1074. ---------------
  1075. If an architecture generates other header files alongside generic-y
  1076. wrappers, generated-y specifies them.
  1077. This prevents them being treated as stale asm-generic wrappers and
  1078. removed.
  1079. Example::
  1080. #arch/x86/include/asm/Kbuild
  1081. generated-y += syscalls_32.h
  1082. 8.4 mandatory-y
  1083. ---------------
  1084. mandatory-y is essentially used by include/(uapi/)asm-generic/Kbuild
  1085. to define the minimum set of ASM headers that all architectures must have.
  1086. This works like optional generic-y. If a mandatory header is missing
  1087. in arch/$(ARCH)/include/(uapi/)/asm, Kbuild will automatically generate
  1088. a wrapper of the asm-generic one.
  1089. 9 Kbuild Variables
  1090. ==================
  1091. The top Makefile exports the following variables:
  1092. VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION
  1093. These variables define the current kernel version. A few arch
  1094. Makefiles actually use these values directly; they should use
  1095. $(KERNELRELEASE) instead.
  1096. $(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic
  1097. three-part version number, such as "2", "4", and "0". These three
  1098. values are always numeric.
  1099. $(EXTRAVERSION) defines an even tinier sublevel for pre-patches
  1100. or additional patches. It is usually some non-numeric string
  1101. such as "-pre4", and is often blank.
  1102. KERNELRELEASE
  1103. $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable
  1104. for constructing installation directory names or showing in
  1105. version strings. Some arch Makefiles use it for this purpose.
  1106. ARCH
  1107. This variable defines the target architecture, such as "i386",
  1108. "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to
  1109. determine which files to compile.
  1110. By default, the top Makefile sets $(ARCH) to be the same as the
  1111. host system architecture. For a cross build, a user may
  1112. override the value of $(ARCH) on the command line::
  1113. make ARCH=m68k ...
  1114. INSTALL_PATH
  1115. This variable defines a place for the arch Makefiles to install
  1116. the resident kernel image and System.map file.
  1117. Use this for architecture-specific install targets.
  1118. INSTALL_MOD_PATH, MODLIB
  1119. $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module
  1120. installation. This variable is not defined in the Makefile but
  1121. may be passed in by the user if desired.
  1122. $(MODLIB) specifies the directory for module installation.
  1123. The top Makefile defines $(MODLIB) to
  1124. $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may
  1125. override this value on the command line if desired.
  1126. INSTALL_MOD_STRIP
  1127. If this variable is specified, it will cause modules to be stripped
  1128. after they are installed. If INSTALL_MOD_STRIP is '1', then the
  1129. default option --strip-debug will be used. Otherwise, the
  1130. INSTALL_MOD_STRIP value will be used as the option(s) to the strip
  1131. command.
  1132. 10 Makefile language
  1133. ====================
  1134. The kernel Makefiles are designed to be run with GNU Make. The Makefiles
  1135. use only the documented features of GNU Make, but they do use many
  1136. GNU extensions.
  1137. GNU Make supports elementary list-processing functions. The kernel
  1138. Makefiles use a novel style of list building and manipulation with few
  1139. "if" statements.
  1140. GNU Make has two assignment operators, ":=" and "=". ":=" performs
  1141. immediate evaluation of the right-hand side and stores an actual string
  1142. into the left-hand side. "=" is like a formula definition; it stores the
  1143. right-hand side in an unevaluated form and then evaluates this form each
  1144. time the left-hand side is used.
  1145. There are some cases where "=" is appropriate. Usually, though, ":="
  1146. is the right choice.
  1147. 11 Credits
  1148. ==========
  1149. - Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
  1150. - Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
  1151. - Updates by Sam Ravnborg <sam@ravnborg.org>
  1152. - Language QA by Jan Engelhardt <jengelh@gmx.de>
  1153. 12 TODO
  1154. =======
  1155. - Describe how kbuild supports shipped files with _shipped.
  1156. - Generating offset header files.
  1157. - Add more variables to chapters 7 or 9?