device-io.rst 6.0 KB

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  1. .. Copyright 2001 Matthew Wilcox
  2. ..
  3. .. This documentation is free software; you can redistribute
  4. .. it and/or modify it under the terms of the GNU General Public
  5. .. License as published by the Free Software Foundation; either
  6. .. version 2 of the License, or (at your option) any later
  7. .. version.
  8. ===============================
  9. Bus-Independent Device Accesses
  10. ===============================
  11. :Author: Matthew Wilcox
  12. :Author: Alan Cox
  13. Introduction
  14. ============
  15. Linux provides an API which abstracts performing IO across all busses
  16. and devices, allowing device drivers to be written independently of bus
  17. type.
  18. Memory Mapped IO
  19. ================
  20. Getting Access to the Device
  21. ----------------------------
  22. The most widely supported form of IO is memory mapped IO. That is, a
  23. part of the CPU's address space is interpreted not as accesses to
  24. memory, but as accesses to a device. Some architectures define devices
  25. to be at a fixed address, but most have some method of discovering
  26. devices. The PCI bus walk is a good example of such a scheme. This
  27. document does not cover how to receive such an address, but assumes you
  28. are starting with one. Physical addresses are of type unsigned long.
  29. This address should not be used directly. Instead, to get an address
  30. suitable for passing to the accessor functions described below, you
  31. should call ioremap(). An address suitable for accessing
  32. the device will be returned to you.
  33. After you've finished using the device (say, in your module's exit
  34. routine), call iounmap() in order to return the address
  35. space to the kernel. Most architectures allocate new address space each
  36. time you call ioremap(), and they can run out unless you
  37. call iounmap().
  38. Accessing the device
  39. --------------------
  40. The part of the interface most used by drivers is reading and writing
  41. memory-mapped registers on the device. Linux provides interfaces to read
  42. and write 8-bit, 16-bit, 32-bit and 64-bit quantities. Due to a
  43. historical accident, these are named byte, word, long and quad accesses.
  44. Both read and write accesses are supported; there is no prefetch support
  45. at this time.
  46. The functions are named readb(), readw(), readl(), readq(),
  47. readb_relaxed(), readw_relaxed(), readl_relaxed(), readq_relaxed(),
  48. writeb(), writew(), writel() and writeq().
  49. Some devices (such as framebuffers) would like to use larger transfers than
  50. 8 bytes at a time. For these devices, the memcpy_toio(),
  51. memcpy_fromio() and memset_io() functions are
  52. provided. Do not use memset or memcpy on IO addresses; they are not
  53. guaranteed to copy data in order.
  54. The read and write functions are defined to be ordered. That is the
  55. compiler is not permitted to reorder the I/O sequence. When the ordering
  56. can be compiler optimised, you can use __readb() and friends to
  57. indicate the relaxed ordering. Use this with care.
  58. While the basic functions are defined to be synchronous with respect to
  59. each other and ordered with respect to each other the busses the devices
  60. sit on may themselves have asynchronicity. In particular many authors
  61. are burned by the fact that PCI bus writes are posted asynchronously. A
  62. driver author must issue a read from the same device to ensure that
  63. writes have occurred in the specific cases the author cares. This kind
  64. of property cannot be hidden from driver writers in the API. In some
  65. cases, the read used to flush the device may be expected to fail (if the
  66. card is resetting, for example). In that case, the read should be done
  67. from config space, which is guaranteed to soft-fail if the card doesn't
  68. respond.
  69. The following is an example of flushing a write to a device when the
  70. driver would like to ensure the write's effects are visible prior to
  71. continuing execution::
  72. static inline void
  73. qla1280_disable_intrs(struct scsi_qla_host *ha)
  74. {
  75. struct device_reg *reg;
  76. reg = ha->iobase;
  77. /* disable risc and host interrupts */
  78. WRT_REG_WORD(&reg->ictrl, 0);
  79. /*
  80. * The following read will ensure that the above write
  81. * has been received by the device before we return from this
  82. * function.
  83. */
  84. RD_REG_WORD(&reg->ictrl);
  85. ha->flags.ints_enabled = 0;
  86. }
  87. PCI ordering rules also guarantee that PIO read responses arrive after any
  88. outstanding DMA writes from that bus, since for some devices the result of
  89. a readb() call may signal to the driver that a DMA transaction is
  90. complete. In many cases, however, the driver may want to indicate that the
  91. next readb() call has no relation to any previous DMA writes
  92. performed by the device. The driver can use readb_relaxed() for
  93. these cases, although only some platforms will honor the relaxed
  94. semantics. Using the relaxed read functions will provide significant
  95. performance benefits on platforms that support it. The qla2xxx driver
  96. provides examples of how to use readX_relaxed(). In many cases, a majority
  97. of the driver's readX() calls can safely be converted to readX_relaxed()
  98. calls, since only a few will indicate or depend on DMA completion.
  99. Port Space Accesses
  100. ===================
  101. Port Space Explained
  102. --------------------
  103. Another form of IO commonly supported is Port Space. This is a range of
  104. addresses separate to the normal memory address space. Access to these
  105. addresses is generally not as fast as accesses to the memory mapped
  106. addresses, and it also has a potentially smaller address space.
  107. Unlike memory mapped IO, no preparation is required to access port
  108. space.
  109. Accessing Port Space
  110. --------------------
  111. Accesses to this space are provided through a set of functions which
  112. allow 8-bit, 16-bit and 32-bit accesses; also known as byte, word and
  113. long. These functions are inb(), inw(),
  114. inl(), outb(), outw() and
  115. outl().
  116. Some variants are provided for these functions. Some devices require
  117. that accesses to their ports are slowed down. This functionality is
  118. provided by appending a ``_p`` to the end of the function.
  119. There are also equivalents to memcpy. The ins() and
  120. outs() functions copy bytes, words or longs to the given
  121. port.
  122. Public Functions Provided
  123. =========================
  124. .. kernel-doc:: arch/x86/include/asm/io.h
  125. :internal:
  126. .. kernel-doc:: lib/pci_iomap.c
  127. :export: