fire-emu.dts 44 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
  4. */
  5. /dts-v1/;
  6. #include "fire.dtsi"
  7. #include <dt-bindings/input/linux-event-codes.h>
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include "light-vi-devices.dtsi"
  10. / {
  11. model = "T-HEAD fire fpga board";
  12. compatible = "thead,fire-emu", "thead,fire";
  13. chosen {
  14. bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
  15. stdout-path = "serial0:115200n8";
  16. };
  17. leds {
  18. compatible = "gpio-leds";
  19. led0 {
  20. label = "SYS_STATUS";
  21. gpios = <&gpio1_porta 15 0>; /* GPIO_ACTIVE_HIGH: 0 */
  22. default-state = "off";
  23. };
  24. };
  25. lcd0_backlight: pwm-backlight@0 {
  26. compatible = "pwm-backlight";
  27. pwms = <&pwm 0 5000000>;
  28. brightness-levels = <0 4 8 16 32 64 128 255>;
  29. default-brightness-level = <7>;
  30. };
  31. lcd1_backlight: pwm-backlight@1 {
  32. compatible = "pwm-backlight";
  33. pwms = <&pwm 1 5000000>;
  34. brightness-levels = <0 4 8 16 32 64 128 255>;
  35. default-brightness-level = <7>;
  36. };
  37. light_iopmp: iopmp {
  38. compatible = "thead,light-iopmp";
  39. /* config#1: multiple valid regions */
  40. iopmp_emmc: IOPMP_EMMC {
  41. regions = <0x000000 0x100000>,
  42. <0x100000 0x200000>;
  43. attr = <0xFFFFFFFF>;
  44. dummy_slave= <0x800000>;
  45. };
  46. /* config#2: iopmp bypass */
  47. iopmp_sdio0: IOPMP_SDIO0 {
  48. bypass_en;
  49. };
  50. /* config#3: iopmp default region set */
  51. iopmp_sdio1: IOPMP_SDIO1 {
  52. attr = <0xFFFFFFFF>;
  53. is_default_region;
  54. };
  55. iopmp_usb0: IOPMP_USB0 {
  56. attr = <0xFFFFFFFF>;
  57. is_default_region;
  58. };
  59. iopmp_ao: IOPMP_AO {
  60. is_default_region;
  61. };
  62. iopmp_aud: IOPMP_AUD {
  63. is_default_region;
  64. };
  65. iopmp_chip_dbg: IOPMP_CHIP_DBG {
  66. is_default_region;
  67. };
  68. iopmp_eip120i: IOPMP_EIP120I {
  69. is_default_region;
  70. };
  71. iopmp_eip120ii: IOPMP_EIP120II {
  72. is_default_region;
  73. };
  74. iopmp_eip120iii: IOPMP_EIP120III {
  75. is_default_region;
  76. };
  77. iopmp_isp0: IOPMP_ISP0 {
  78. is_default_region;
  79. };
  80. iopmp_isp1: IOPMP_ISP1 {
  81. is_default_region;
  82. };
  83. iopmp_dw200: IOPMP_DW200 {
  84. is_default_region;
  85. };
  86. iopmp_vipre: IOPMP_VIPRE {
  87. is_default_region;
  88. };
  89. iopmp_venc: IOPMP_VENC {
  90. is_default_region;
  91. };
  92. iopmp_vdec: IOPMP_VDEC {
  93. is_default_region;
  94. };
  95. iopmp_g2d: IOPMP_G2D {
  96. is_default_region;
  97. };
  98. iopmp0_dpu: IOPMP0_DPU {
  99. bypass_en;
  100. };
  101. iopmp1_dpu: IOPMP1_DPU {
  102. bypass_en;
  103. };
  104. iopmp_gpu: IOPMP_GPU {
  105. is_default_region;
  106. };
  107. iopmp_gmac1: IOPMP_GMAC1 {
  108. is_default_region;
  109. };
  110. iopmp_gmac2: IOPMP_GMAC2 {
  111. is_default_region;
  112. };
  113. iopmp_dmac: IOPMP_DMAC {
  114. is_default_region;
  115. };
  116. iopmp_tee_dmac: IOPMP_TEE_DMAC {
  117. is_default_region;
  118. };
  119. iopmp_dsp0: IOPMP_DSP0 {
  120. is_default_region;
  121. };
  122. iopmp_dsp1: IOPMP_DSP1 {
  123. is_default_region;
  124. };
  125. };
  126. mbox_910t_client1: mbox_910t_client1 {
  127. compatible = "thead,light-mbox-client";
  128. mbox-names = "902";
  129. mboxes = <&mbox_910t 1 0>;
  130. status = "disabled";
  131. };
  132. mbox_910t_client2: mbox_910t_client2 {
  133. compatible = "thead,light-mbox-client";
  134. mbox-names = "906";
  135. mboxes = <&mbox_910t 2 0>;
  136. status = "disabled";
  137. };
  138. lightsound: lightsound@1 {
  139. compatible = "simple-audio-card";
  140. simple-audio-card,name = "Light-Sound-Card";
  141. #address-cells = <1>;
  142. #size-cells = <0>;
  143. status = "disabled";
  144. };
  145. dummy_codec: dummy_codec {
  146. #sound-dai-cells = <1>;
  147. compatible = "linux,bt-sco";
  148. status = "okay";
  149. };
  150. reg_vref_1v8: regulator-adc-verf {
  151. compatible = "regulator-fixed";
  152. regulator-name = "vref-1v8";
  153. regulator-min-microvolt = <1800000>;
  154. regulator-max-microvolt = <1800000>;
  155. status = "okay";
  156. };
  157. reg_tp_pwr_en: regulator-pwr-en {
  158. compatible = "regulator-fixed";
  159. regulator-name = "PWR_EN";
  160. regulator-min-microvolt = <2800000>;
  161. regulator-max-microvolt = <2800000>;
  162. gpio = <&pcal6408ahk_a 3 1>;
  163. enable-active-high;
  164. regulator-always-on;
  165. };
  166. reg_tp1_pwr_en: regulator-tp1-pwr-en {
  167. compatible = "regulator-fixed";
  168. regulator-name = "PWR_EN";
  169. regulator-min-microvolt = <2800000>;
  170. regulator-max-microvolt = <2800000>;
  171. gpio = <&pcal6408ahk_a 6 1>;
  172. enable-active-high;
  173. regulator-always-on;
  174. };
  175. lcd0_1v8: regulator-lcd0-vdd18 {
  176. compatible = "regulator-fixed";
  177. regulator-name = "lcd0_en";
  178. regulator-min-microvolt = <1800000>;
  179. regulator-max-microvolt = <1800000>;
  180. gpio = <&pcal6408ahk_a 2 0>;
  181. enable-active-high;
  182. };
  183. lcd0_5v7: regulator-lcd0-vspn57 {
  184. compatible = "regulator-fixed";
  185. regulator-name = "lcd0_bias_en";
  186. regulator-min-microvolt = <5700000>;
  187. regulator-max-microvolt = <5700000>;
  188. gpio = <&pcal6408ahk_a 4 0>;
  189. enable-active-high;
  190. };
  191. lcd1_1v8: regulator-lcd1-vdd18 {
  192. compatible = "regulator-fixed";
  193. regulator-name = "lcd1_en";
  194. regulator-min-microvolt = <1800000>;
  195. regulator-max-microvolt = <1800000>;
  196. gpio = <&pcal6408ahk_a 5 0>;
  197. enable-active-high;
  198. };
  199. lcd1_5v7: regulator-lcd1-vspn57 {
  200. compatible = "regulator-fixed";
  201. regulator-name = "lcd1_bias_en";
  202. regulator-min-microvolt = <5700000>;
  203. regulator-max-microvolt = <5700000>;
  204. gpio = <&pcal6408ahk_a 7 0>;
  205. enable-active-high;
  206. };
  207. wcn_wifi: wireless-wlan {
  208. compatible = "wlan-platdata";
  209. clock-names = "clk_wifi";
  210. ref-clock-frequency = <24000000>;
  211. keep_wifi_power_on;
  212. pinctrl-names = "default";
  213. wifi_chip_type = "rtl8723ds";
  214. WIFI,poweren_gpio = <&gpio2_porta 26 0>;
  215. WIFI,reset_n = <&gpio2_porta 28 0>;
  216. status = "disabled";
  217. };
  218. wcn_bt: wireless-bluetooth {
  219. compatible = "bluetooth-platdata";
  220. pinctrl-names = "default", "rts_gpio";
  221. BT,power_gpio = <&gpio2_porta 29 0>;
  222. status = "disabled";
  223. };
  224. gpio_keys: gpio_keys{
  225. compatible = "gpio-keys";
  226. pinctrl-0 = <&pinctrl_volume>;
  227. pinctrl-names = "default";
  228. status = "disabled";
  229. key-volumedown {
  230. label = "Volume Down Key";
  231. linux,code = <KEY_1>;
  232. debounce-interval = <2>;
  233. gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>;
  234. };
  235. key-volumeup {
  236. label = "Volume Up Key";
  237. linux,code = <KEY_2>;
  238. debounce-interval = <2>;
  239. gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>;
  240. };
  241. };
  242. aon {
  243. compatible = "thead,light-aon";
  244. mbox-names = "aon";
  245. mboxes = <&mbox_910t 1 0>;
  246. status = "okay";
  247. pd: light-aon-pd {
  248. compatible = "thead,light-aon-pd";
  249. #power-domain-cells = <1>;
  250. };
  251. aon_reg_dialog: light-dialog-reg {
  252. compatible = "thead,light-dialog-pmic";
  253. status = "disabled";
  254. dvdd_cpu_reg: appcpu_dvdd {
  255. regulator-name = "appcpu_dvdd";
  256. regulator-min-microvolt = <300000>;
  257. regulator-max-microvolt = <1570000>;
  258. regulator-boot-on;
  259. regulator-always-on;
  260. };
  261. dvddm_cpu_reg: appcpu_dvddm {
  262. regulator-name = "appcpu_dvddm";
  263. regulator-min-microvolt = <300000>;
  264. regulator-max-microvolt = <1570000>;
  265. regulator-boot-on;
  266. regulator-always-on;
  267. };
  268. soc_dvdd18_aon_reg: soc_dvdd18_aon {
  269. regulator-name = "soc_dvdd18_aon";
  270. regulator-boot-on;
  271. regulator-always-on;
  272. };
  273. soc_avdd33_usb3_reg: soc_avdd33_usb3 {
  274. regulator-name = "soc_avdd33_usb3";
  275. regulator-boot-on;
  276. regulator-always-on;
  277. };
  278. soc_dvdd08_aon_reg: soc_dvdd08_aon {
  279. regulator-name = "soc_dvdd08_aon";
  280. regulator-boot-on;
  281. regulator-always-on;
  282. };
  283. soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
  284. regulator-name = "soc_dvdd08_ddr";
  285. regulator-boot-on;
  286. regulator-always-on;
  287. };
  288. soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
  289. regulator-name = "soc_vdd_ddr_1v8";
  290. regulator-boot-on;
  291. regulator-always-on;
  292. };
  293. soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
  294. regulator-name = "soc_vdd_ddr_1v1";
  295. regulator-boot-on;
  296. regulator-always-on;
  297. };
  298. soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
  299. regulator-name = "soc_vdd_ddr_0v6";
  300. regulator-boot-on;
  301. regulator-always-on;
  302. };
  303. soc_dvdd18_ap_reg: soc_dvdd18_ap {
  304. regulator-name = "soc_dvdd18_ap";
  305. regulator-boot-on;
  306. regulator-always-on;
  307. };
  308. soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
  309. regulator-name = "soc_avdd08_mipi_hdmi";
  310. regulator-boot-on;
  311. regulator-always-on;
  312. };
  313. soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
  314. regulator-name = "soc_avdd18_mipi_hdmi";
  315. regulator-boot-on;
  316. regulator-always-on;
  317. };
  318. soc_vdd33_emmc_reg: soc_vdd33_emmc {
  319. regulator-name = "soc_vdd33_emmc";
  320. regulator-boot-on;
  321. regulator-always-on;
  322. };
  323. soc_vdd18_emmc_reg: soc_vdd18_emmc {
  324. regulator-name = "soc_vdd18_emmc";
  325. regulator-boot-on;
  326. regulator-always-on;
  327. };
  328. soc_dovdd18_scan_reg: soc_dovdd18_scan {
  329. regulator-name = "soc_dovdd18_scan";
  330. regulator-min-microvolt = <900000>;
  331. regulator-max-microvolt = <3600000>;
  332. };
  333. soc_vext_2v8_reg: soc_vext_2v8 {
  334. regulator-name = "soc_vext_2v8";
  335. regulator-boot-on;
  336. regulator-always-on;
  337. };
  338. soc_dvdd12_scan_reg: soc_dvdd12_scan {
  339. regulator-name = "soc_dvdd12_scan";
  340. regulator-min-microvolt = <900000>;
  341. regulator-max-microvolt = <3600000>;
  342. };
  343. soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
  344. regulator-name = "soc_avdd28_scan_en";
  345. };
  346. soc_avdd28_rgb_reg: soc_avdd28_rgb {
  347. regulator-name = "soc_avdd28_rgb";
  348. regulator-min-microvolt = <2200000>;
  349. regulator-max-microvolt = <3475000>;
  350. regulator-boot-on;
  351. regulator-always-on;
  352. };
  353. soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
  354. regulator-name = "soc_dovdd18_rgb";
  355. regulator-min-microvolt = <1200000>;
  356. regulator-max-microvolt = <3600000>;
  357. regulator-boot-on;
  358. regulator-always-on;
  359. };
  360. soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
  361. regulator-name = "soc_dvdd12_rgb";
  362. regulator-min-microvolt = <400000>;
  363. regulator-max-microvolt = <1675000>;
  364. regulator-boot-on;
  365. regulator-always-on;
  366. };
  367. soc_avdd25_ir_reg: soc_avdd25_ir {
  368. regulator-name = "soc_avdd25_ir";
  369. regulator-min-microvolt = <2200000>;
  370. regulator-max-microvolt = <3475000>;
  371. regulator-boot-on;
  372. regulator-always-on;
  373. };
  374. soc_dovdd18_ir_reg: soc_dovdd18_ir {
  375. regulator-name = "soc_dovdd18_ir";
  376. regulator-min-microvolt = <1200000>;
  377. regulator-max-microvolt = <3600000>;
  378. regulator-boot-on;
  379. regulator-always-on;
  380. };
  381. soc_dvdd12_ir_reg: soc_dvdd12_ir {
  382. regulator-name = "soc_dvdd12_ir";
  383. regulator-min-microvolt = <400000>;
  384. regulator-max-microvolt = <1675000>;
  385. regulator-boot-on;
  386. regulator-always-on;
  387. };
  388. };
  389. c910_cpufreq {
  390. compatible = "thead,light-mpw-cpufreq";
  391. status = "disabled";
  392. };
  393. test: light-aon-test {
  394. compatible = "thead,light-aon-test";
  395. };
  396. };
  397. };
  398. &cmamem {
  399. alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
  400. };
  401. &resmem {
  402. #address-cells = <2>;
  403. #size-cells = <2>;
  404. ranges;
  405. tee_mem: memory@1a000000 {
  406. reg = <0x0 0x1a000000 0 0x4000000>;
  407. no-map;
  408. };
  409. dsp0_mem: memory@20000000 { /**0x2000_0000~0x2040_0000 4M**/
  410. reg = <0x0 0x20000000 0x0 0x00280000 /* DSP FW code&data section 2.5M*/
  411. 0x0 0x20280000 0x0 0x00001000 /* DSP communication area 4K*/
  412. 0x0 0x20281000 0x0 0x00007000 /* Panic/log page 28K */
  413. 0x0 0x20288000 0x0 0x00178000>; /* DSP shared memory 1.5M-32K*/
  414. no-map;
  415. };
  416. dsp1_mem: memory@20400000 { /**0x2040_0000~0x2080_0000 4M**/
  417. reg = <0x0 0x20400000 0x0 0x00280000 /* DSP FW code&data section */
  418. 0x0 0x20680000 0x0 0x00001000 /* DSP communication area */
  419. 0x0 0x20681000 0x0 0x00007000 /* Panic/log page*/
  420. 0x0 0x20688000 0x0 0x00178000>; /* DSP shared memory */
  421. no-map;
  422. };
  423. vi_mem: framebuffer@0f800000 {
  424. reg = <0x0 0x0F800000 0x0 0x05400000 /* vi_mem_pool_region[0] 84 MB (default) */
  425. 0x0 0x14C00000 0x0 0x01D00000 /* vi_mem_pool_region[1] 29 MB */
  426. 0x0 0x16900000 0x0 0x03200000>; /* vi_mem_pool_region[2] 50 MB */
  427. no-map;
  428. };
  429. facelib_mem: memory@22000000 {
  430. reg = <0x0 0x22000000 0x0 0x10000000>;
  431. no-map;
  432. };
  433. };
  434. &clk {
  435. status = "disabled";
  436. };
  437. &adc {
  438. vref-supply = <&reg_vref_1v8>;
  439. status = "okay";
  440. };
  441. &i2c0 {
  442. clock-frequency = <400000>;
  443. status = "okay";
  444. eeprom@50 {
  445. compatible = "atmel,24c32";
  446. reg = <0x50>;
  447. pagesize = <32>;
  448. };
  449. codec: wm8960@1a {
  450. #sound-dai-cells = <0>;
  451. compatible = "wlf,wm8960";
  452. reg = <0x1a>;
  453. wlf,shared-lrclk;
  454. wlf,hp-cfg = <3 2 3>;
  455. wlf,gpio-cfg = <1 3>;
  456. };
  457. touch@5d {
  458. #gpio-cells = <2>;
  459. compatible = "goodix,gt911";
  460. reg = <0x5d>;
  461. interrupt-parent = <&gpio1_porta>;
  462. interrupts = <8 0>;
  463. irq-gpios = <&gpio1_porta 8 0>;
  464. reset-gpios = <&gpio1_porta 7 0>;
  465. AVDD28-supply = <&reg_tp_pwr_en>;
  466. touchscreen-size-x = <720>;
  467. touchscreen-size-y = <1280>;
  468. };
  469. };
  470. &audio_i2c0 {
  471. clock-frequency = <100000>;
  472. status = "okay";
  473. es8156_audio_codec: es8156@8 {
  474. #sound-dai-cells = <0>;
  475. compatible = "everest,es8156";
  476. reg = <0x08>;
  477. };
  478. es7210_audio_codec: es7210@40 {
  479. #sound-dai-cells = <0>;
  480. compatible = "MicArray_0";
  481. reg = <0x40>;
  482. };
  483. };
  484. &i2c1 {
  485. clock-frequency = <400000>;
  486. status = "okay";
  487. touch1@5d {
  488. #gpio-cells = <2>;
  489. compatible = "goodix,gt911";
  490. reg = <0x5d>;
  491. interrupt-parent = <&gpio1_porta>;
  492. interrupts = <12 0>;
  493. irq-gpios = <&gpio1_porta 12 0>;
  494. reset-gpios = <&gpio1_porta 11 0>;
  495. AVDD28-supply = <&reg_tp1_pwr_en>;
  496. touchscreen-size-x = <720>;
  497. touchscreen-size-y = <1280>;
  498. };
  499. };
  500. &spi0 {
  501. num-cs = <1>;
  502. cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
  503. rx-sample-delay-ns = <10>;
  504. status = "okay";
  505. spi_norflash@0 {
  506. #address-cells = <1>;
  507. #size-cells = <1>;
  508. compatible = "winbond,w25q64jwm", "jedec,spi-nor";
  509. reg = <0>;
  510. spi-max-frequency = <50000000>;
  511. w25q,fast-read;
  512. status = "disabled";
  513. };
  514. spidev@1 {
  515. compatible = "spidev";
  516. #address-cells = <0x1>;
  517. #size-cells = <0x1>;
  518. reg = <0x1>;
  519. spi-max-frequency = <50000000>;
  520. };
  521. };
  522. &uart0 {
  523. clock-frequency = <100000000>;
  524. };
  525. &qspi0 {
  526. num-cs = <1>;
  527. cs-gpios = <&gpio2_porta 3 0>;
  528. rx-sample-dly = <4>;
  529. status = "disabled";
  530. spi-flash@0 {
  531. #address-cells = <1>;
  532. #size-cells = <1>;
  533. compatible = "spi-nand";
  534. spi-max-frequency = <100000000>;
  535. spi-tx-bus-width = <4>;
  536. spi-rx-bus-width = <4>;
  537. reg = <0>;
  538. partition@0 {
  539. label = "ubi1";
  540. reg = <0x00000000 0x08000000>;
  541. };
  542. };
  543. };
  544. &qspi1 {
  545. num-cs = <1>;
  546. cs-gpios = <&gpio0_porta 1 0>;
  547. status = "disabled";
  548. spi-flash@0 {
  549. #address-cells = <1>;
  550. #size-cells = <1>;
  551. compatible = "spi-nand";
  552. spi-max-frequency = <66000000>;
  553. spi-tx-bus-width = <4>;
  554. spi-rx-bus-width = <4>;
  555. reg = <0>;
  556. partition@0 {
  557. label = "ubi2";
  558. reg = <0x00000000 0x08000000>;
  559. };
  560. };
  561. };
  562. &gmac0 {
  563. phy-mode = "rgmii-id";
  564. rx-clk-delay = <0x00>; /* for RGMII */
  565. tx-clk-delay = <0x00>; /* for RGMII */
  566. phy-handle = <&phy_88E1111_0>;
  567. status = "okay";
  568. mdio0 {
  569. #address-cells = <1>;
  570. #size-cells = <0>;
  571. compatible = "snps,dwmac-mdio";
  572. phy_88E1111_0: ethernet-phy@0 {
  573. reg = <0x1>;
  574. };
  575. phy_88E1111_1: ethernet-phy@1 {
  576. reg = <0x2>;
  577. };
  578. };
  579. };
  580. &gmac1 {
  581. phy-mode = "rgmii-id";
  582. rx-clk-delay = <0x00>; /* for RGMII */
  583. tx-clk-delay = <0x00>; /* for RGMII */
  584. phy-handle = <&phy_88E1111_1>;
  585. status = "okay";
  586. };
  587. &emmc {
  588. max-frequency = <198000000>;
  589. non-removable;
  590. mmc-hs400-1_8v;
  591. io_fixed_1v8;
  592. is_emmc;
  593. no-sdio;
  594. no-sd;
  595. pull_up;
  596. bus-width = <8>;
  597. status = "okay";
  598. };
  599. &sdhci0 {
  600. max-frequency = <198000000>;
  601. bus-width = <4>;
  602. pull_up;
  603. wprtn_ignore;
  604. status = "okay";
  605. };
  606. &sdhci1 {
  607. max-frequency = <100000000>;
  608. bus-width = <4>;
  609. pull_up;
  610. no-sd;
  611. no-mmc;
  612. non-removable;
  613. io_fixed_1v8;
  614. post-power-on-delay-ms = <50>;
  615. wprtn_ignore;
  616. cap-sd-highspeed;
  617. keep-power-in-suspend;
  618. wakeup-source;
  619. status = "disabled";
  620. };
  621. &padctrl0_apsys { /* right-pinctrl */
  622. light-evb-padctrl0 {
  623. /*
  624. * Pin Configuration Node:
  625. * Format: <pin_id mux_node config>
  626. */
  627. pinctrl_uart0: uart0grp {
  628. thead,pins = <
  629. FM_UART0_TXD 0x0 0x72
  630. FM_UART0_RXD 0x0 0x72
  631. >;
  632. };
  633. pinctrl_spi0: spi0grp {
  634. thead,pins = <
  635. FM_SPI_CSN 0x3 0x20a
  636. FM_SPI_SCLK 0x0 0x20a
  637. FM_SPI_MISO 0x0 0x23a
  638. FM_SPI_MOSI 0x0 0x23a
  639. >;
  640. };
  641. pinctrl_qspi0: qspi0grp {
  642. thead,pins = <
  643. FM_QSPI0_SCLK 0x0 0x20f
  644. FM_QSPI0_CSN0 0x3 0x20f
  645. FM_QSPI0_CSN1 0x0 0x20f
  646. FM_QSPI0_D0_MOSI 0x0 0x23f
  647. FM_QSPI0_D1_MISO 0x0 0x23f
  648. FM_QSPI0_D2_WP 0x0 0x23f
  649. FM_QSPI0_D3_HOLD 0x0 0x23f
  650. >;
  651. };
  652. pinctrl_audio_i2s0: i2s0grp {
  653. thead,pins = <
  654. FM_QSPI0_SCLK 0x2 0x208
  655. FM_QSPI0_CSN0 0x2 0x238
  656. FM_QSPI0_CSN1 0x2 0x208
  657. FM_QSPI0_D0_MOSI 0x2 0x238
  658. FM_QSPI0_D1_MISO 0x2 0x238
  659. FM_QSPI0_D2_WP 0x2 0x238
  660. FM_QSPI0_D3_HOLD 0x2 0x238
  661. >;
  662. };
  663. pinctrl_pwm: pwmgrp {
  664. thead,pins = <
  665. FM_GPIO3_2 0x1 0x208 /* pwm0 */
  666. FM_GPIO3_3 0x1 0x208 /* pwm1 */
  667. >;
  668. };
  669. };
  670. };
  671. &padctrl1_apsys { /* left-pinctrl */
  672. light-evb-padctrl1 {
  673. /*
  674. * Pin Configuration Node:
  675. * Format: <pin_id mux_node config>
  676. */
  677. pinctrl_uart3: uart3grp {
  678. thead,pins = <
  679. FM_UART3_TXD 0x0 0x72
  680. FM_UART3_RXD 0x0 0x72
  681. >;
  682. };
  683. pinctrl_uart4: uart4grp {
  684. thead,pins = <
  685. FM_UART4_TXD 0x0 0x72
  686. FM_UART4_RXD 0x0 0x72
  687. FM_UART4_CTSN 0x0 0x72
  688. FM_UART4_RTSN 0x0 0x72
  689. >;
  690. };
  691. pinctrl_qspi1: qspi1grp {
  692. thead,pins = <
  693. FM_QSPI1_SCLK 0x0 0x20a
  694. FM_QSPI1_CSN0 0x3 0x20a
  695. FM_QSPI1_D0_MOSI 0x0 0x23a
  696. FM_QSPI1_D1_MISO 0x0 0x23a
  697. FM_QSPI1_D2_WP 0x0 0x23a
  698. FM_QSPI1_D3_HOLD 0x0 0x23a
  699. >;
  700. };
  701. pinctrl_iso7816: iso7816grp {
  702. thead,pins = <
  703. FM_QSPI1_SCLK 0x1 0x208
  704. FM_QSPI1_D0_MOSI 0x1 0x238
  705. FM_QSPI1_D1_MISO 0x1 0x238
  706. FM_QSPI1_D2_WP 0x1 0x238
  707. FM_QSPI1_D3_HOLD 0x1 0x238
  708. >;
  709. };
  710. };
  711. };
  712. &padctrl_aosys {
  713. light-aon-padctrl {
  714. /*
  715. * Pin Configuration Node:
  716. * Format: <pin_id mux_node config>
  717. */
  718. pinctrl_audiopa1: audiopa1_grp {
  719. thead,pins = <
  720. FM_AUDIO_PA1 0x3 0x72
  721. >;
  722. };
  723. pinctrl_audiopa2: audiopa2_grp {
  724. thead,pins = <
  725. FM_AUDIO_PA2 0x0 0x72
  726. >;
  727. };
  728. pinctrl_volume: volume_grp {
  729. thead,pins = <
  730. FM_CPU_JTG_TDI 0x3 0x208
  731. FM_CPU_JTG_TDO 0x3 0x208
  732. >;
  733. };
  734. };
  735. };
  736. &i2c2 {
  737. clock-frequency = <400000>;
  738. status = "okay";
  739. eeprom@50 {
  740. compatible = "atmel,24c32";
  741. reg = <0x50>;
  742. pagesize = <32>;
  743. };
  744. };
  745. &i2c3 {
  746. clock-frequency = <400000>;
  747. status = "okay";
  748. eeprom@50 {
  749. compatible = "atmel,24c32";
  750. reg = <0x50>;
  751. pagesize = <32>;
  752. };
  753. };
  754. &i2c4 {
  755. clock-frequency = <400000>;
  756. status = "okay";
  757. eeprom@50 {
  758. compatible = "atmel,24c32";
  759. reg = <0x50>;
  760. pagesize = <32>;
  761. };
  762. pcal6408ahk_a: gpio@20 {
  763. compatible = "nxp,pcal9554b";
  764. reg = <0x20>;
  765. gpio-controller;
  766. #gpio-cells = <2>;
  767. };
  768. };
  769. &isp0 {
  770. status = "okay";
  771. };
  772. &isp1 {
  773. status = "okay";
  774. };
  775. &isp_ry0 {
  776. status = "okay";
  777. };
  778. &dewarp {
  779. status = "okay";
  780. };
  781. &dec400_isp0 {
  782. status = "okay";
  783. };
  784. &dec400_isp1 {
  785. status = "okay";
  786. };
  787. &dec400_isp2 {
  788. status = "okay";
  789. };
  790. &bm_visys {
  791. status = "okay";
  792. };
  793. &bm_csi0 {
  794. status = "okay";
  795. };
  796. &bm_csi1 {
  797. status = "okay";
  798. };
  799. &bm_csi2 {
  800. status = "okay";
  801. };
  802. &vi_pre {
  803. //vi_pre_irq_en = <1>;
  804. status = "okay";
  805. };
  806. &xtensa_dsp {
  807. status = "okay";
  808. };
  809. &xtensa_dsp0 {
  810. status = "okay";
  811. memory-region = <&dsp0_mem>;
  812. };
  813. &xtensa_dsp1{
  814. status = "okay";
  815. memory-region = <&dsp1_mem>;
  816. };
  817. &vvcam_flash_led0{
  818. flash_led_name = "aw36413_aw36515";
  819. floodlight_i2c_bus = /bits/ 8 <2>;
  820. floodlight_en_pin = <&gpio1_porta 25 0>;
  821. //projection_i2c_bus = /bits/ 8 <2>;
  822. flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
  823. status = "okay";
  824. };
  825. &vvcam_sensor0 {
  826. sensor_name = "SC2310";
  827. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  828. sensor_regulator_voltage_uV = <1800000 1200000 2800000>;
  829. sensor_regulator_timing_us = <70 50 20>;
  830. sensor_rst = <&gpio1_porta 16 0>;
  831. sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
  832. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  833. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  834. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  835. i2c_reg_width = /bits/ 8 <2>;
  836. i2c_data_width = /bits/ 8 <1>;
  837. i2c_addr = /bits/ 8 <0x30>;
  838. i2c_bus = /bits/ 8 <3>;
  839. status = "okay";
  840. };
  841. &vvcam_sensor1 {
  842. sensor_name = "OV5693";
  843. i2c_bus = /bits/ 8 <3>;
  844. i2c_reg_width = /bits/ 8 <1>;
  845. i2c_data_width = /bits/ 8 <1>;
  846. status = "disabled";
  847. };
  848. &vvcam_sensor2 {
  849. sensor_name = "GC5035";
  850. sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
  851. sensor_regulator_timing_us = <100 50 0>;
  852. sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
  853. sensor_rst = <&gpio1_porta 29 0>;
  854. sensor_pdn_delay_us = <60>; //powerdown pin / shutdown pin actived till I2C ready
  855. DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
  856. DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
  857. AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
  858. i2c_addr = /bits/ 8 <0x37>;
  859. i2c_bus = /bits/ 8 <4>;
  860. i2c_reg_width = /bits/ 8 <1>;
  861. i2c_data_width = /bits/ 8 <1>;
  862. status = "okay";
  863. };
  864. &vvcam_sensor3 {
  865. sensor_name = "SC2310";
  866. sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
  867. sensor_regulator_timing_us = <70 50 20>;
  868. sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
  869. sensor_rst = <&gpio1_porta 29 0>;
  870. sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
  871. DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
  872. DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
  873. AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
  874. i2c_bus = /bits/ 8 <4>;
  875. status = "okay";
  876. };
  877. &vvcam_sensor4 {
  878. sensor_name = "SC132GS";
  879. sensor_regulators = "DOVDD18_IR", "DVDD12_IR", "AVDD25_IR";
  880. sensor_regulator_timing_us = <70 1000 2000>;
  881. i2c_addr = /bits/ 8 <0x31>;
  882. sensor_rst = <&gpio1_porta 24 0>;
  883. sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
  884. DOVDD18_IR-supply = <&soc_dovdd18_ir_reg>;
  885. DVDD12_IR-supply = <&soc_dvdd12_ir_reg>;
  886. AVDD25_IR-supply = <&soc_avdd25_ir_reg>;
  887. i2c_reg_width = /bits/ 8 <2>;
  888. i2c_data_width = /bits/ 8 <1>;
  889. i2c_bus = /bits/ 8 <2>;
  890. status = "okay";
  891. };
  892. &vvcam_sensor5 {
  893. sensor_name = "OV12870";
  894. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  895. sensor_regulator_voltage_uV = <1800000 1200000 2800000>;
  896. sensor_regulator_timing_us = <100 50 0>;
  897. sensor_rst = <&gpio1_porta 16 0>;
  898. sensor_pdn_delay_us = <60>; //powerdown pin / shutdown pin actived till I2C ready
  899. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  900. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  901. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  902. i2c_addr = /bits/ 8 <0x10>;
  903. i2c_reg_width = /bits/ 8 <2>;
  904. i2c_data_width = /bits/ 8 <1>;
  905. i2c_bus = /bits/ 8 <3>;
  906. status = "okay";
  907. };
  908. &vvcam_sensor6 {
  909. sensor_name = "GC02M1B";
  910. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  911. sensor_regulator_voltage_uV = <1800000 1675000 2800000>;
  912. sensor_regulator_timing_us = <70 50 20>;
  913. sensor_rst = <&gpio1_porta 16 0>;
  914. sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
  915. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  916. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  917. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  918. i2c_reg_width = /bits/ 8 <1>;
  919. i2c_data_width = /bits/ 8 <1>;
  920. i2c_addr = /bits/ 8 <0x37>;
  921. i2c_bus = /bits/ 8 <3>;
  922. status = "okay";
  923. };
  924. &video0{
  925. vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
  926. channel0 {
  927. sensor0 {
  928. subdev_name = "vivcam";
  929. idx = <2>; //<2>=vivcam2 : gc5035
  930. csi_idx = <1>; //<1>=CSI2X2_B
  931. mode_idx = <3>;
  932. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  933. };
  934. sensor1 {
  935. subdev_name = "vivcam";
  936. idx = <3>; //<3>=vivcam3 : sc2310
  937. csi_idx = <1>; //<1>=CSI2X2_B
  938. mode_idx = <1>;
  939. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  940. };
  941. isp {
  942. subdev_name = "isp";
  943. idx = <0>;
  944. path_type = "ISP_MI_PATH_MP";
  945. output {
  946. max_width = <1920>;
  947. max_height = <1088>;
  948. bit_per_pixel = <12>;
  949. frame_count = <3>;
  950. };
  951. };
  952. };
  953. channel1 {
  954. sensor0 {
  955. subdev_name = "vivcam";
  956. idx = <2>; //<2>=vivcam2 : gc5035
  957. csi_idx = <1>; //<1>=CSI2X2_B
  958. mode_idx = <3>;
  959. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  960. };
  961. sensor1 {
  962. subdev_name = "vivcam";
  963. idx = <3>; //<3>=vivcam3 : sc2310
  964. csi_idx = <1>; //<1>=CSI2X2_B
  965. mode_idx = <1>;
  966. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  967. };
  968. isp {
  969. subdev_name = "isp";
  970. idx = <0>;
  971. path_type = "ISP_MI_PATH_SP";
  972. output {
  973. max_width = <1920>;
  974. max_height = <1088>;
  975. bit_per_pixel = <12>;
  976. frame_count = <3>;
  977. };
  978. };
  979. };
  980. channel2 {
  981. sensor0 {
  982. subdev_name = "vivcam";
  983. idx = <2>; //<2>=vivcam2 : gc5035
  984. csi_idx = <1>; //<1>=CSI2X2_B
  985. mode_idx = <3>;
  986. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  987. };
  988. sensor1 {
  989. subdev_name = "vivcam";
  990. idx = <3>; //<3>=vivcam3 : sc2310
  991. csi_idx = <1>; //<1>=CSI2X2_B
  992. mode_idx = <1>;
  993. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  994. };
  995. isp {
  996. subdev_name = "isp";
  997. idx = <0>;
  998. path_type = "ISP_MI_PATH_SP2_BP";
  999. output {
  1000. max_width = <1920>;
  1001. max_height = <1088>;
  1002. bit_per_pixel = <12>;
  1003. frame_count = <3>;
  1004. };
  1005. };
  1006. };
  1007. };
  1008. &video1{
  1009. vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
  1010. channel0 {
  1011. sensor0 {
  1012. subdev_name = "vivcam";
  1013. idx = <2>; //<2>=vivcam2 : gc5035
  1014. csi_idx = <1>; //<1>=CSI2X2_B
  1015. mode_idx = <3>;
  1016. path_type = "SENSOR_1296x972_RAW10_LINER";
  1017. };
  1018. sensor1 {
  1019. subdev_name = "vivcam";
  1020. idx = <3>; //<3>=vivcam3 : sc2310
  1021. csi_idx = <1>; //<1>=CSI2X2_B
  1022. mode_idx = <1>;
  1023. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1024. };
  1025. isp {
  1026. subdev_name = "isp";
  1027. idx = <0>;
  1028. path_type = "ISP_MI_PATH_MP";
  1029. output {
  1030. max_width = <1920>;
  1031. max_height = <1088>;
  1032. bit_per_pixel = <12>;
  1033. frame_count = <3>;
  1034. };
  1035. };
  1036. dw {
  1037. subdev_name = "dw";
  1038. idx = <0>;
  1039. path_type = "DW_DWE_VSE0";
  1040. dw_dst_depth = <2>;
  1041. };
  1042. };
  1043. channel1 {
  1044. sensor0 {
  1045. subdev_name = "vivcam";
  1046. idx = <2>; //<2>=vivcam2 : gc5035
  1047. csi_idx = <1>; //<1>=CSI2X2_B
  1048. mode_idx = <3>;
  1049. path_type = "SENSOR_1296x972_RAW10_LINER";
  1050. };
  1051. sensor1 {
  1052. subdev_name = "vivcam";
  1053. idx = <3>; //<3>=vivcam3 : sc2310
  1054. csi_idx = <1>; //<1>=CSI2X2_B
  1055. mode_idx = <1>;
  1056. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1057. };
  1058. isp {
  1059. subdev_name = "isp";
  1060. idx = <0>;
  1061. path_type = "ISP_MI_PATH_MP";
  1062. output {
  1063. max_width = <1920>;
  1064. max_height = <1088>;
  1065. bit_per_pixel = <12>;
  1066. frame_count = <3>;
  1067. };
  1068. };
  1069. dw {
  1070. subdev_name = "dw";
  1071. idx = <0>;
  1072. path_type = "DW_DWE_VSE1";
  1073. dw_dst_depth = <2>;
  1074. };
  1075. };
  1076. channel2 {
  1077. sensor0 {
  1078. subdev_name = "vivcam";
  1079. idx = <2>; //<2>=vivcam2 : gc5035
  1080. csi_idx = <1>; //<1>=CSI2X2_B
  1081. mode_idx = <3>;
  1082. path_type = "SENSOR_1296x972_RAW10_LINER";
  1083. };
  1084. sensor1 {
  1085. subdev_name = "vivcam";
  1086. idx = <3>; //<3>=vivcam3 : sc2310
  1087. csi_idx = <1>; //<1>=CSI2X2_B
  1088. mode_idx = <1>;
  1089. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1090. };
  1091. isp {
  1092. subdev_name = "isp";
  1093. idx = <0>;
  1094. path_type = "ISP_MI_PATH_MP";
  1095. output {
  1096. max_width = <1920>;
  1097. max_height = <1088>;
  1098. bit_per_pixel = <12>;
  1099. frame_count = <3>;
  1100. };
  1101. };
  1102. dw {
  1103. subdev_name = "dw";
  1104. idx = <0>;
  1105. path_type = "DW_DWE_VSE2";
  1106. dw_dst_depth = <2>;
  1107. };
  1108. };
  1109. };
  1110. &video2{
  1111. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1112. channel0 {
  1113. sensor0 {
  1114. subdev_name = "vivcam";
  1115. idx = <0>; //sc2310
  1116. csi_idx = <0>; //<0>=CSI2
  1117. mode_idx = <1>;
  1118. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1119. };
  1120. sensor1 {
  1121. subdev_name = "vivcam";
  1122. idx = <6>; //gc02m1b
  1123. csi_idx = <0>; //<0>=CSI2
  1124. mode_idx = <0>;
  1125. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1126. };
  1127. isp {
  1128. subdev_name = "isp";
  1129. idx = <1>;
  1130. path_type = "ISP_MI_PATH_MP";
  1131. output {
  1132. max_width = <1920>;
  1133. max_height = <1088>;
  1134. bit_per_pixel = <16>;
  1135. frame_count = <3>;
  1136. };
  1137. };
  1138. };
  1139. channel1 {
  1140. sensor0 {
  1141. subdev_name = "vivcam";
  1142. idx = <0>; //sc2310
  1143. csi_idx = <0>; //<0>=CSI2
  1144. mode_idx = <1>;
  1145. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1146. };
  1147. sensor1 {
  1148. subdev_name = "vivcam";
  1149. idx = <6>; //gc02m1b
  1150. csi_idx = <0>; //<0>=CSI2
  1151. mode_idx = <0>;
  1152. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1153. };
  1154. isp {
  1155. subdev_name = "isp";
  1156. idx = <1>;
  1157. path_type = "ISP_MI_PATH_SP";
  1158. output {
  1159. max_width = <1920>;
  1160. max_height = <1088>;
  1161. bit_per_pixel = <16>;
  1162. frame_count = <3>;
  1163. };
  1164. };
  1165. };
  1166. channel2 {
  1167. sensor0 {
  1168. subdev_name = "vivcam";
  1169. idx = <0>; //sc2310
  1170. csi_idx = <0>; //<0>=CSI2
  1171. mode_idx = <1>;
  1172. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1173. };
  1174. sensor1 {
  1175. subdev_name = "vivcam";
  1176. idx = <6>; //gc02m1b
  1177. csi_idx = <0>; //<0>=CSI2
  1178. mode_idx = <0>;
  1179. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1180. };
  1181. isp {
  1182. subdev_name = "isp";
  1183. idx = <1>;
  1184. path_type = "ISP_MI_PATH_SP2_BP";
  1185. output {
  1186. max_width = <1920>;
  1187. max_height = <1088>;
  1188. bit_per_pixel = <16>;
  1189. frame_count = <3>;
  1190. };
  1191. };
  1192. };
  1193. };
  1194. &video3{
  1195. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1196. channel0 {
  1197. sensor0 {
  1198. subdev_name = "vivcam";
  1199. idx = <0>; //sc2310
  1200. csi_idx = <0>; //<0>=CSI2
  1201. mode_idx = <1>;
  1202. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1203. };
  1204. sensor1 {
  1205. subdev_name = "vivcam";
  1206. idx = <6>; //gc02m1b
  1207. csi_idx = <0>; //<0>=CSI2
  1208. mode_idx = <0>;
  1209. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1210. };
  1211. isp {
  1212. subdev_name = "isp";
  1213. idx = <1>;
  1214. path_type = "ISP_MI_PATH_MP";
  1215. output {
  1216. max_width = <1920>;
  1217. max_height = <1088>;
  1218. bit_per_pixel = <12>;
  1219. frame_count = <3>;
  1220. };
  1221. };
  1222. dw {
  1223. subdev_name = "dw";
  1224. idx = <0>;
  1225. path_type = "DW_DWE_VSE0";
  1226. dw_dst_depth = <2>;
  1227. };
  1228. };
  1229. channel1 {
  1230. sensor0 {
  1231. subdev_name = "vivcam";
  1232. idx = <0>; //sc2310
  1233. csi_idx = <0>; //<0>=CSI2
  1234. mode_idx = <1>;
  1235. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1236. };
  1237. sensor1 {
  1238. subdev_name = "vivcam";
  1239. idx = <6>; //gc02m1b
  1240. csi_idx = <0>; //<0>=CSI2
  1241. mode_idx = <0>;
  1242. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1243. };
  1244. isp {
  1245. subdev_name = "isp";
  1246. idx = <1>;
  1247. path_type = "ISP_MI_PATH_MP";
  1248. output {
  1249. max_width = <1920>;
  1250. max_height = <1088>;
  1251. bit_per_pixel = <12>;
  1252. frame_count = <3>;
  1253. };
  1254. };
  1255. dw {
  1256. subdev_name = "dw";
  1257. idx = <0>;
  1258. path_type = "DW_DWE_VSE1";
  1259. dw_dst_depth = <2>;
  1260. };
  1261. };
  1262. channel2 {
  1263. sensor0 {
  1264. subdev_name = "vivcam";
  1265. idx = <0>; //sc2310
  1266. csi_idx = <0>; //<0>=CSI2
  1267. mode_idx = <1>;
  1268. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1269. };
  1270. sensor1 {
  1271. subdev_name = "vivcam";
  1272. idx = <6>; //gc02m1b
  1273. csi_idx = <0>; //<0>=CSI2
  1274. mode_idx = <0>;
  1275. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1276. };
  1277. isp {
  1278. subdev_name = "isp";
  1279. idx = <1>;
  1280. path_type = "ISP_MI_PATH_MP";
  1281. output {
  1282. max_width = <1920>;
  1283. max_height = <1088>;
  1284. bit_per_pixel = <12>;
  1285. frame_count = <3>;
  1286. };
  1287. };
  1288. dw {
  1289. subdev_name = "dw";
  1290. idx = <0>;
  1291. path_type = "DW_DWE_VSE2";
  1292. dw_dst_depth = <2>;
  1293. };
  1294. };
  1295. };
  1296. &video4{
  1297. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1298. channel0 {
  1299. sensor0 {
  1300. subdev_name = "vivcam";
  1301. idx = <0>; //sc2310
  1302. csi_idx = <0>; //<0>=CSI2
  1303. mode_idx = <1>;
  1304. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1305. };
  1306. sensor1 {
  1307. subdev_name = "vivcam";
  1308. idx = <6>; //gc02m1b
  1309. csi_idx = <0>; //<0>=CSI2
  1310. mode_idx = <0>;
  1311. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1312. };
  1313. isp {
  1314. subdev_name = "isp";
  1315. idx = <1>;
  1316. path_type = "ISP_MI_PATH_PP";
  1317. output {
  1318. max_width = <1920>;
  1319. max_height = <1088>;
  1320. bit_per_pixel = <12>;
  1321. frame_count = <3>;
  1322. };
  1323. };
  1324. dsp {
  1325. subdev_name = "dsp";
  1326. idx = <0>;
  1327. path_type = "DSP_PATH_ISP_RY";
  1328. output {
  1329. max_width = <1920>;
  1330. max_height = <1088>;
  1331. bit_per_pixel = <12>;
  1332. frame_count = <3>;
  1333. };
  1334. };
  1335. ry {
  1336. subdev_name = "ry";
  1337. idx = <0>;
  1338. path_type = "ISP_RY_MI_PATH_MP";
  1339. output {
  1340. max_width = <1920>;
  1341. max_height = <1088>;
  1342. bit_per_pixel = <12>;
  1343. frame_count = <3>;
  1344. };
  1345. };
  1346. };
  1347. channel1 {
  1348. sensor0 {
  1349. subdev_name = "vivcam";
  1350. idx = <0>; //sc2310
  1351. csi_idx = <0>; //<0>=CSI2
  1352. mode_idx = <1>;
  1353. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1354. };
  1355. sensor1 {
  1356. subdev_name = "vivcam";
  1357. idx = <6>; //gc02m1b
  1358. csi_idx = <0>; //<0>=CSI2
  1359. mode_idx = <0>;
  1360. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1361. };
  1362. isp {
  1363. subdev_name = "isp";
  1364. idx = <1>;
  1365. path_type = "ISP_MI_PATH_PP";
  1366. output {
  1367. max_width = <1920>;
  1368. max_height = <1088>;
  1369. bit_per_pixel = <12>;
  1370. frame_count = <3>;
  1371. };
  1372. };
  1373. dsp {
  1374. subdev_name = "dsp";
  1375. idx = <0>;
  1376. path_type = "DSP_PATH_ISP_RY";
  1377. output {
  1378. max_width = <1920>;
  1379. max_height = <1088>;
  1380. bit_per_pixel = <12>;
  1381. frame_count = <3>;
  1382. };
  1383. };
  1384. ry {
  1385. subdev_name = "ry";
  1386. idx = <0>;
  1387. path_type = "ISP_RY_MI_PATH_SP";
  1388. output {
  1389. max_width = <1920>;
  1390. max_height = <1088>;
  1391. bit_per_pixel = <12>;
  1392. frame_count = <3>;
  1393. };
  1394. };
  1395. };
  1396. channel2 {
  1397. sensor0 {
  1398. subdev_name = "vivcam";
  1399. idx = <0>; //sc2310
  1400. csi_idx = <0>; //<0>=CSI2
  1401. mode_idx = <1>;
  1402. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1403. };
  1404. sensor1 {
  1405. subdev_name = "vivcam";
  1406. idx = <6>; //gc02m1b
  1407. csi_idx = <0>; //<0>=CSI2
  1408. mode_idx = <0>;
  1409. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1410. };
  1411. isp {
  1412. subdev_name = "isp";
  1413. idx = <1>;
  1414. path_type = "ISP_MI_PATH_PP";
  1415. output {
  1416. max_width = <1920>;
  1417. max_height = <1088>;
  1418. bit_per_pixel = <12>;
  1419. frame_count = <3>;
  1420. };
  1421. };
  1422. dsp {
  1423. subdev_name = "dsp";
  1424. idx = <0>;
  1425. path_type = "DSP_PATH_ISP_RY";
  1426. output {
  1427. max_width = <1920>;
  1428. max_height = <1088>;
  1429. bit_per_pixel = <12>;
  1430. frame_count = <3>;
  1431. };
  1432. };
  1433. ry {
  1434. subdev_name = "ry";
  1435. idx = <0>;
  1436. path_type = "ISP_RY_MI_PATH_SP2_BP";
  1437. output {
  1438. max_width = <1920>;
  1439. max_height = <1088>;
  1440. bit_per_pixel = <12>;
  1441. frame_count = <3>;
  1442. };
  1443. };
  1444. };
  1445. };
  1446. &video5{
  1447. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1448. channel0 {
  1449. sensor0 {
  1450. subdev_name = "vivcam";
  1451. idx = <0>; //sc2310
  1452. csi_idx = <0>; //<0>=CSI2
  1453. mode_idx = <1>;
  1454. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1455. };
  1456. sensor1 {
  1457. subdev_name = "vivcam";
  1458. idx = <6>; //gc02m1b
  1459. csi_idx = <0>; //<0>=CSI2
  1460. mode_idx = <0>;
  1461. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1462. };
  1463. isp {
  1464. subdev_name = "isp";
  1465. idx = <1>;
  1466. path_type = "ISP_MI_PATH_PP";
  1467. output {
  1468. max_width = <1920>;
  1469. max_height = <1088>;
  1470. bit_per_pixel = <12>;
  1471. frame_count = <3>;
  1472. };
  1473. };
  1474. dsp {
  1475. subdev_name = "dsp";
  1476. idx = <0>;
  1477. path_type = "DSP_PATH_ISP_RY";
  1478. output {
  1479. max_width = <1920>;
  1480. max_height = <1088>;
  1481. bit_per_pixel = <12>;
  1482. frame_count = <3>;
  1483. };
  1484. };
  1485. ry {
  1486. subdev_name = "ry";
  1487. idx = <0>;
  1488. path_type = "ISP_RY_MI_PATH_MP";
  1489. output {
  1490. max_width = <1920>;
  1491. max_height = <1088>;
  1492. bit_per_pixel = <12>;
  1493. frame_count = <3>;
  1494. };
  1495. };
  1496. dw {
  1497. subdev_name = "dw";
  1498. idx = <0>;
  1499. path_type = "DW_DWE_VSE0";
  1500. dw_dst_depth = <2>;
  1501. };
  1502. };
  1503. channel1 {
  1504. sensor0 {
  1505. subdev_name = "vivcam";
  1506. idx = <0>; //sc2310
  1507. csi_idx = <0>; //<0>=CSI2
  1508. mode_idx = <1>;
  1509. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1510. };
  1511. sensor1 {
  1512. subdev_name = "vivcam";
  1513. idx = <6>; //gc02m1b
  1514. csi_idx = <0>; //<0>=CSI2
  1515. mode_idx = <0>;
  1516. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1517. };
  1518. isp {
  1519. subdev_name = "isp";
  1520. idx = <1>;
  1521. path_type = "ISP_MI_PATH_PP";
  1522. output {
  1523. max_width = <1920>;
  1524. max_height = <1088>;
  1525. bit_per_pixel = <12>;
  1526. frame_count = <3>;
  1527. };
  1528. };
  1529. dsp {
  1530. subdev_name = "dsp";
  1531. idx = <0>;
  1532. path_type = "DSP_PATH_ISP_RY";
  1533. output {
  1534. max_width = <1920>;
  1535. max_height = <1088>;
  1536. bit_per_pixel = <12>;
  1537. frame_count = <3>;
  1538. };
  1539. };
  1540. ry {
  1541. subdev_name = "ry";
  1542. idx = <0>;
  1543. path_type = "ISP_RY_MI_PATH_MP";
  1544. output {
  1545. max_width = <1920>;
  1546. max_height = <1088>;
  1547. bit_per_pixel = <12>;
  1548. frame_count = <3>;
  1549. };
  1550. };
  1551. dw {
  1552. subdev_name = "dw";
  1553. idx = <0>;
  1554. path_type = "DW_DWE_VSE1";
  1555. dw_dst_depth = <2>;
  1556. };
  1557. };
  1558. channel2 {
  1559. sensor0 {
  1560. subdev_name = "vivcam";
  1561. idx = <0>; //sc2310
  1562. csi_idx = <0>; //<0>=CSI2
  1563. mode_idx = <1>;
  1564. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1565. };
  1566. sensor1 {
  1567. subdev_name = "vivcam";
  1568. idx = <6>; //gc02m1b
  1569. csi_idx = <0>; //<0>=CSI2
  1570. mode_idx = <0>;
  1571. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1572. };
  1573. isp {
  1574. subdev_name = "isp";
  1575. idx = <1>;
  1576. path_type = "ISP_MI_PATH_PP";
  1577. output {
  1578. max_width = <1920>;
  1579. max_height = <1088>;
  1580. bit_per_pixel = <12>;
  1581. frame_count = <3>;
  1582. };
  1583. };
  1584. dsp {
  1585. subdev_name = "dsp";
  1586. idx = <0>;
  1587. path_type = "DSP_PATH_ISP_RY";
  1588. output {
  1589. max_width = <1920>;
  1590. max_height = <1088>;
  1591. bit_per_pixel = <12>;
  1592. frame_count = <3>;
  1593. };
  1594. };
  1595. ry {
  1596. subdev_name = "ry";
  1597. idx = <0>;
  1598. path_type = "ISP_RY_MI_PATH_MP";
  1599. output {
  1600. max_width = <1920>;
  1601. max_height = <1088>;
  1602. bit_per_pixel = <12>;
  1603. frame_count = <3>;
  1604. };
  1605. };
  1606. dw {
  1607. subdev_name = "dw";
  1608. idx = <0>;
  1609. path_type = "DW_DWE_VSE2";
  1610. dw_dst_depth = <2>;
  1611. };
  1612. };
  1613. };
  1614. &video6{
  1615. vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
  1616. channel0 {
  1617. sensor0 {
  1618. subdev_name = "vivcam";
  1619. idx = <4>; //sc132gs
  1620. csi_idx = <2>; //<2>=CSI2X2_A
  1621. flash_led_idx = <0>;
  1622. mode_idx = <0>;
  1623. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1624. };
  1625. dsp{
  1626. output {
  1627. max_width = <1080>;
  1628. max_height = <1280>;
  1629. bit_per_pixel = <16>;
  1630. frame_count = <3>;
  1631. };
  1632. };
  1633. };
  1634. channel1 {
  1635. sensor0 {
  1636. subdev_name = "vivcam";
  1637. idx = <4>; //sc132gs
  1638. csi_idx = <2>; //<2>=CSI2X2_A
  1639. flash_led_idx = <0>;
  1640. mode_idx = <0>;
  1641. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1642. };
  1643. dsp{
  1644. output {
  1645. max_width = <1080>;
  1646. max_height = <1280>;
  1647. bit_per_pixel = <16>;
  1648. frame_count = <3>;
  1649. };
  1650. };
  1651. };
  1652. };
  1653. &video7{
  1654. channel0 {
  1655. sensor0 {
  1656. subdev_name = "vivcam";
  1657. idx = <2>; //<2>=vivcam2 : gc5035
  1658. csi_idx = <1>; //<1>=CSI2X2_B
  1659. mode_idx = <3>;
  1660. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1661. };
  1662. sensor1 {
  1663. subdev_name = "vivcam";
  1664. idx = <3>; //<3>=vivcam3 : sc2310
  1665. csi_idx = <1>; //<1>=CSI2X2_B
  1666. mode_idx = <1>;
  1667. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1668. };
  1669. isp {
  1670. subdev_name = "isp";
  1671. idx = <0>;
  1672. path_type = "ISP_MI_PATH_PP";
  1673. output {
  1674. max_width = <1920>;
  1675. max_height = <1088>;
  1676. bit_per_pixel = <12>;
  1677. frame_count = <3>;
  1678. };
  1679. };
  1680. dsp {
  1681. subdev_name = "dsp";
  1682. idx = <1>;
  1683. path_type = "DSP_PATH_ISP_RY";
  1684. output {
  1685. max_width = <1920>;
  1686. max_height = <1088>;
  1687. bit_per_pixel = <12>;
  1688. frame_count = <3>;
  1689. };
  1690. };
  1691. ry {
  1692. subdev_name = "ry";
  1693. idx = <0>;
  1694. path_type = "ISP_RY_MI_PATH_MP";
  1695. output {
  1696. max_width = <1920>;
  1697. max_height = <1088>;
  1698. bit_per_pixel = <12>;
  1699. frame_count = <3>;
  1700. };
  1701. };
  1702. dw {
  1703. subdev_name = "dw";
  1704. idx = <0>;
  1705. path_type = "DW_DWE_VSE0";
  1706. dw_dst_depth = <2>;
  1707. };
  1708. };
  1709. channel1 {
  1710. sensor0 {
  1711. subdev_name = "vivcam";
  1712. idx = <2>; //<2>=vivcam2 : gc5035
  1713. csi_idx = <1>; //<1>=CSI2X2_B
  1714. mode_idx = <3>;
  1715. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1716. };
  1717. sensor1 {
  1718. subdev_name = "vivcam";
  1719. idx = <3>; //<3>=vivcam3 : sc2310
  1720. csi_idx = <1>; //<1>=CSI2X2_B
  1721. mode_idx = <1>;
  1722. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1723. };
  1724. isp {
  1725. subdev_name = "isp";
  1726. idx = <0>;
  1727. path_type = "ISP_MI_PATH_PP";
  1728. output {
  1729. max_width = <1920>;
  1730. max_height = <1088>;
  1731. bit_per_pixel = <12>;
  1732. frame_count = <3>;
  1733. };
  1734. };
  1735. dsp {
  1736. subdev_name = "dsp";
  1737. idx = <1>;
  1738. path_type = "DSP_PATH_ISP_RY";
  1739. output {
  1740. max_width = <1920>;
  1741. max_height = <1088>;
  1742. bit_per_pixel = <12>;
  1743. frame_count = <3>;
  1744. };
  1745. };
  1746. ry {
  1747. subdev_name = "ry";
  1748. idx = <0>;
  1749. path_type = "ISP_RY_MI_PATH_MP";
  1750. output {
  1751. max_width = <1920>;
  1752. max_height = <1088>;
  1753. bit_per_pixel = <12>;
  1754. frame_count = <3>;
  1755. };
  1756. };
  1757. dw {
  1758. subdev_name = "dw";
  1759. idx = <0>;
  1760. path_type = "DW_DWE_VSE1";
  1761. dw_dst_depth = <2>;
  1762. };
  1763. };
  1764. channel2 {
  1765. sensor0 {
  1766. subdev_name = "vivcam";
  1767. idx = <2>; //<2>=vivcam2 : gc5035
  1768. csi_idx = <1>; //<1>=CSI2X2_B
  1769. mode_idx = <3>;
  1770. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1771. };
  1772. sensor1 {
  1773. subdev_name = "vivcam";
  1774. idx = <3>; //<3>=vivcam3 : sc2310
  1775. csi_idx = <1>; //<1>=CSI2X2_B
  1776. mode_idx = <1>;
  1777. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1778. };
  1779. isp {
  1780. subdev_name = "isp";
  1781. idx = <0>;
  1782. path_type = "ISP_MI_PATH_PP";
  1783. output {
  1784. max_width = <1920>;
  1785. max_height = <1088>;
  1786. bit_per_pixel = <12>;
  1787. frame_count = <3>;
  1788. };
  1789. };
  1790. dsp {
  1791. subdev_name = "dsp";
  1792. idx = <1>;
  1793. path_type = "DSP_PATH_ISP_RY";
  1794. output {
  1795. max_width = <1920>;
  1796. max_height = <1088>;
  1797. bit_per_pixel = <12>;
  1798. frame_count = <3>;
  1799. };
  1800. };
  1801. ry {
  1802. subdev_name = "ry";
  1803. idx = <0>;
  1804. path_type = "ISP_RY_MI_PATH_MP";
  1805. output {
  1806. max_width = <1920>;
  1807. max_height = <1088>;
  1808. bit_per_pixel = <12>;
  1809. frame_count = <3>;
  1810. };
  1811. };
  1812. dw {
  1813. subdev_name = "dw";
  1814. idx = <0>;
  1815. path_type = "DW_DWE_VSE2";
  1816. dw_dst_depth = <2>;
  1817. };
  1818. };
  1819. };
  1820. &video8{
  1821. vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
  1822. channel0 {
  1823. sensor0 {
  1824. subdev_name = "vivcam";
  1825. idx = <2>; //<2>=vivcam2 : gc5035
  1826. csi_idx = <1>; //<1>=CSI2X2_B
  1827. mode_idx = <3>;
  1828. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1829. };
  1830. sensor1 {
  1831. subdev_name = "vivcam";
  1832. idx = <3>; //<3>=vivcam3 : sc2310
  1833. csi_idx = <1>; //<1>=CSI2X2_B
  1834. mode_idx = <1>;
  1835. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1836. };
  1837. dsp {
  1838. subdev_name = "dsp";
  1839. idx = <0>;
  1840. path_type = "DSP_PATH_VIPRE_DDR";
  1841. output {
  1842. max_width = <1920>;
  1843. max_height = <1088>;
  1844. bit_per_pixel = <12>;
  1845. frame_count = <3>;
  1846. };
  1847. };
  1848. };
  1849. };
  1850. &video9{
  1851. channel0 {
  1852. sensor0 {
  1853. subdev_name = "vivcam";
  1854. idx = <4>; //sc132gs
  1855. csi_idx = <2>; //<2>=CSI2X2_A
  1856. mode_idx = <0>;
  1857. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1858. };
  1859. dsp{
  1860. output {
  1861. max_width = <1080>;
  1862. max_height = <1280>;
  1863. bit_per_pixel = <16>;
  1864. frame_count = <3>;
  1865. };
  1866. };
  1867. };
  1868. };
  1869. &video10{
  1870. channel0 {
  1871. sensor0 {
  1872. subdev_name = "vivcam";
  1873. idx = <2>; //<2>=vivcam2 : gc5035
  1874. csi_idx = <1>; //<1>=CSI2X2_B
  1875. mode_idx = <1>;
  1876. path_type = "SENSOR_1080P_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1877. skip_init = <1>;
  1878. };
  1879. sensor1 {
  1880. subdev_name = "vivcam";
  1881. idx = <3>; //<3>=vivcam3 : sc2310
  1882. csi_idx = <1>; //<1>=CSI2X2_B
  1883. mode_idx = <1>;
  1884. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1885. skip_init = <1>;
  1886. };
  1887. };
  1888. };
  1889. &video11{
  1890. channel0 {
  1891. channel_id = <0>;
  1892. status = "okay";
  1893. sensor0 {
  1894. subdev_name = "vivcam";
  1895. idx = <4>; //sc132gs
  1896. csi_idx = <2>; //<2>=CSI2X2_A
  1897. flash_led_idx = <0>;
  1898. mode_idx = <0>;
  1899. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1900. };
  1901. isp {
  1902. subdev_name = "isp";
  1903. idx = <0>;
  1904. path_type = "ISP_MI_PATH_MP";
  1905. output {
  1906. max_width = <1920>;
  1907. max_height = <1088>;
  1908. bit_per_pixel = <12>;
  1909. frame_count = <3>;
  1910. };
  1911. };
  1912. };
  1913. };
  1914. &video12{ // TUNINGTOOL
  1915. channel0 { // CSI2
  1916. sensor0 {
  1917. subdev_name = "vivcam";
  1918. idx = <0>; //sc2310
  1919. csi_idx = <0>; //<0>=CSI2
  1920. mode_idx = <1>;
  1921. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1922. skip_init = <1>;
  1923. };
  1924. sensor1 {
  1925. subdev_name = "vivcam";
  1926. idx = <6>; //gc02m1b
  1927. csi_idx = <0>; //<0>=CSI2
  1928. mode_idx = <0>;
  1929. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1930. skip_init = <1>;
  1931. };
  1932. };
  1933. };
  1934. &trng {
  1935. status = "disabled";
  1936. };
  1937. &eip_28 {
  1938. status = "okay";
  1939. };
  1940. &vdec {
  1941. status = "okay";
  1942. };
  1943. &venc {
  1944. status = "okay";
  1945. };
  1946. &isp_venc_shake {
  1947. status = "okay";
  1948. };
  1949. &vidmem {
  1950. status = "okay";
  1951. memory-region = <&vi_mem>;
  1952. };
  1953. &gpu {
  1954. status = "okay";
  1955. };
  1956. &cpus {
  1957. c910_0: cpu@0 {
  1958. operating-points = <
  1959. /* kHz uV */
  1960. 300000 650000
  1961. 800000 700000
  1962. 1500000 800000
  1963. 1848000 1000000
  1964. >;
  1965. light,dvddm-operating-points = <
  1966. /* kHz uV */
  1967. 300000 800000
  1968. 800000 800000
  1969. 1500000 800000
  1970. 1848000 1000000
  1971. >;
  1972. };
  1973. c910_1: cpu@1 {
  1974. operating-points = <
  1975. /* kHz uV */
  1976. 300000 650000
  1977. 800000 700000
  1978. 1500000 800000
  1979. 1848000 1000000
  1980. >;
  1981. light,dvddm-operating-points = <
  1982. /* kHz uV */
  1983. 300000 800000
  1984. 800000 800000
  1985. 1500000 800000
  1986. 1848000 1000000
  1987. >;
  1988. };
  1989. c910_2: cpu@2 {
  1990. operating-points = <
  1991. /* kHz uV */
  1992. 300000 650000
  1993. 800000 700000
  1994. 1500000 800000
  1995. 1848000 1000000
  1996. >;
  1997. light,dvddm-operating-points = <
  1998. /* kHz uV */
  1999. 300000 800000
  2000. 800000 800000
  2001. 1500000 800000
  2002. 1848000 1000000
  2003. >;
  2004. };
  2005. c910_3: cpu@3 {
  2006. operating-points = <
  2007. /* kHz uV */
  2008. 300000 650000
  2009. 800000 700000
  2010. 1500000 800000
  2011. 1848000 1000000
  2012. >;
  2013. light,dvddm-operating-points = <
  2014. /* kHz uV */
  2015. 300000 800000
  2016. 800000 800000
  2017. 1500000 800000
  2018. 1848000 1000000
  2019. >;
  2020. };
  2021. };