thead_sys.c 5.6 KB

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  1. /*************************************************************************/ /*!
  2. @File
  3. @Title System Configuration
  4. @Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
  5. @Description System Configuration functions
  6. @License Dual MIT/GPLv2
  7. The contents of this file are subject to the MIT license as set out below.
  8. Permission is hereby granted, free of charge, to any person obtaining a copy
  9. of this software and associated documentation files (the "Software"), to deal
  10. in the Software without restriction, including without limitation the rights
  11. to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. copies of the Software, and to permit persons to whom the Software is
  13. furnished to do so, subject to the following conditions:
  14. The above copyright notice and this permission notice shall be included in
  15. all copies or substantial portions of the Software.
  16. Alternatively, the contents of this file may be used under the terms of
  17. the GNU General Public License Version 2 ("GPL") in which case the provisions
  18. of GPL are applicable instead of those above.
  19. If you wish to allow use of your version of this file only under the terms of
  20. GPL, and not to allow others to use your version of this file under the terms
  21. of the MIT license, indicate your decision by deleting the provisions above
  22. and replace them with the notice and other provisions required by GPL as set
  23. out in the file called "GPL-COPYING" included in this distribution. If you do
  24. not delete the provisions above, a recipient may use your version of this file
  25. under the terms of either the MIT license or GPL.
  26. This License is also included in this distribution in the file called
  27. "MIT-COPYING".
  28. EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
  29. PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
  30. BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  31. PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
  32. COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  33. IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  34. CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  35. */ /**************************************************************************/
  36. #include <linux/clk.h>
  37. #include <linux/io.h>
  38. #include <linux/mutex.h>
  39. #include <linux/of.h>
  40. #include <linux/of_address.h>
  41. #include <linux/of_irq.h>
  42. #include <linux/platform_device.h>
  43. #include <linux/pm_opp.h>
  44. #include <linux/pm_runtime.h>
  45. #include <linux/regulator/consumer.h>
  46. #include <linux/thermal.h>
  47. #include <linux/regmap.h>
  48. #include <linux/mfd/syscon.h>
  49. #include "thead_sys.h"
  50. int thead_mfg_enable(struct gpu_plat_if *mfg)
  51. {
  52. int ret;
  53. int val;
  54. ret = pm_runtime_get_sync(mfg->dev);
  55. if (ret)
  56. return ret;
  57. thead_debug("23thead_mfg_enable aclk\n");
  58. if (mfg->gpu_aclk) {
  59. ret = clk_prepare_enable(mfg->gpu_aclk);
  60. if (ret) {
  61. thead_debug("thead_mfg_enable aclk\n");
  62. goto err_pm_runtime_put;
  63. }
  64. }
  65. if (mfg->gpu_cclk) {
  66. ret = clk_prepare_enable(mfg->gpu_cclk);
  67. if (ret) {
  68. thead_debug("thead_mfg_enable cclk\n");
  69. clk_disable_unprepare(mfg->gpu_aclk);
  70. goto err_pm_runtime_put;
  71. }
  72. }
  73. /* rst gpu clkgen */
  74. regmap_update_bits(mfg->vosys_regmap, 0x0, 2, 2);
  75. regmap_read(mfg->vosys_regmap, 0x0, &val);
  76. if (!(val & 0x2)) {
  77. pr_info("[GPU_CLK_RST]" "val is %x\r\n", val);
  78. clk_disable_unprepare(mfg->gpu_cclk);
  79. clk_disable_unprepare(mfg->gpu_aclk);
  80. goto err_pm_runtime_put;
  81. }
  82. udelay(1);
  83. /* rst gpu */
  84. regmap_update_bits(mfg->vosys_regmap, 0x0, 1, 1);
  85. regmap_read(mfg->vosys_regmap, 0x0, &val);
  86. if (!(val & 0x1)) {
  87. pr_info("[GPU_RST]" "val is %x\r\n", val);
  88. clk_disable_unprepare(mfg->gpu_cclk);
  89. clk_disable_unprepare(mfg->gpu_aclk);
  90. goto err_pm_runtime_put;
  91. }
  92. return 0;
  93. err_pm_runtime_put:
  94. pm_runtime_put_sync(mfg->dev);
  95. return ret;
  96. }
  97. void thead_mfg_disable(struct gpu_plat_if *mfg)
  98. {
  99. int val;
  100. regmap_update_bits(mfg->vosys_regmap, 0x0, 3, 0);
  101. regmap_read(mfg->vosys_regmap, 0x0, &val);
  102. if (val) {
  103. pr_info("[GPU_RST]" "val is %x\r\n", val);
  104. return;
  105. }
  106. if (mfg->gpu_aclk) {
  107. clk_disable_unprepare(mfg->gpu_aclk);
  108. thead_debug("thead_mfg_disable aclk\n");
  109. }
  110. if (mfg->gpu_cclk) {
  111. clk_disable_unprepare(mfg->gpu_cclk);
  112. thead_debug("thead_mfg_disable cclk\n");
  113. }
  114. thead_debug("22thead_mfg_disable cclk\n");
  115. pm_runtime_put_sync(mfg->dev);
  116. }
  117. struct gpu_plat_if *dt_hw_init(struct device *dev)
  118. {
  119. struct gpu_plat_if *mfg;
  120. thead_debug("gpu_plat_if_create Begin\n");
  121. mfg = devm_kzalloc(dev, sizeof(*mfg), GFP_KERNEL);
  122. if (!mfg)
  123. return ERR_PTR(-ENOMEM);
  124. mfg->dev = dev;
  125. mfg->gpu_cclk = devm_clk_get(dev, "cclk");
  126. if (IS_ERR(mfg->gpu_cclk)) {
  127. dev_err(dev, "devm_clk_get cclk failed !!!\n");
  128. pm_runtime_disable(dev);
  129. return ERR_PTR(PTR_ERR(mfg->gpu_aclk));
  130. }
  131. mfg->gpu_aclk = devm_clk_get(dev, "aclk");
  132. if (IS_ERR(mfg->gpu_cclk)) {
  133. dev_err(dev, "devm_clk_get aclk failed !!!\n");
  134. pm_runtime_disable(dev);
  135. return ERR_PTR(PTR_ERR(mfg->gpu_aclk));
  136. }
  137. mfg->vosys_regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "vosys-regmap");
  138. if (IS_ERR(mfg->vosys_regmap)) {
  139. dev_err(dev, "syscon_regmap_lookup_by_phandle vosys-regmap failed !!!\n");
  140. pm_runtime_disable(dev);
  141. return ERR_PTR(PTR_ERR(mfg->vosys_regmap));
  142. }
  143. mutex_init(&mfg->set_power_state);
  144. pm_runtime_enable(dev);
  145. thead_debug("gpu_plat_if_create End\n");
  146. return mfg;
  147. }
  148. void dt_hw_uninit(struct gpu_plat_if *mfg)
  149. {
  150. pm_runtime_disable(mfg->dev);
  151. }